1 /*
2 * Copyright (C) ST-Ericsson SA 2011
3 *
4 * Author: BIBEK BASU <bibek.basu@stericsson.com>
5 * License terms: GNU General Public License (GPL) version 2
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11 #include <linux/kernel.h>
12 #include <linux/types.h>
13 #include <linux/slab.h>
14 #include <linux/init.h>
15 #include <linux/module.h>
16 #include <linux/err.h>
17 #include <linux/platform_device.h>
18 #include <linux/slab.h>
19 #include <linux/gpio.h>
20 #include <linux/irq.h>
21 #include <linux/interrupt.h>
22 #include <linux/mfd/ab8500.h>
23 #include <linux/mfd/abx500.h>
24 #include <linux/mfd/ab8500/gpio.h>
25
26 /*
27 * GPIO registers offset
28 * Bank: 0x10
29 */
30 #define AB8500_GPIO_SEL1_REG 0x00
31 #define AB8500_GPIO_SEL2_REG 0x01
32 #define AB8500_GPIO_SEL3_REG 0x02
33 #define AB8500_GPIO_SEL4_REG 0x03
34 #define AB8500_GPIO_SEL5_REG 0x04
35 #define AB8500_GPIO_SEL6_REG 0x05
36
37 #define AB8500_GPIO_DIR1_REG 0x10
38 #define AB8500_GPIO_DIR2_REG 0x11
39 #define AB8500_GPIO_DIR3_REG 0x12
40 #define AB8500_GPIO_DIR4_REG 0x13
41 #define AB8500_GPIO_DIR5_REG 0x14
42 #define AB8500_GPIO_DIR6_REG 0x15
43
44 #define AB8500_GPIO_OUT1_REG 0x20
45 #define AB8500_GPIO_OUT2_REG 0x21
46 #define AB8500_GPIO_OUT3_REG 0x22
47 #define AB8500_GPIO_OUT4_REG 0x23
48 #define AB8500_GPIO_OUT5_REG 0x24
49 #define AB8500_GPIO_OUT6_REG 0x25
50
51 #define AB8500_GPIO_PUD1_REG 0x30
52 #define AB8500_GPIO_PUD2_REG 0x31
53 #define AB8500_GPIO_PUD3_REG 0x32
54 #define AB8500_GPIO_PUD4_REG 0x33
55 #define AB8500_GPIO_PUD5_REG 0x34
56 #define AB8500_GPIO_PUD6_REG 0x35
57
58 #define AB8500_GPIO_IN1_REG 0x40
59 #define AB8500_GPIO_IN2_REG 0x41
60 #define AB8500_GPIO_IN3_REG 0x42
61 #define AB8500_GPIO_IN4_REG 0x43
62 #define AB8500_GPIO_IN5_REG 0x44
63 #define AB8500_GPIO_IN6_REG 0x45
64 #define AB8500_GPIO_ALTFUN_REG 0x45
65 #define ALTFUN_REG_INDEX 6
66 #define AB8500_NUM_GPIO 42
67 #define AB8500_NUM_VIR_GPIO_IRQ 16
68
69 enum ab8500_gpio_action {
70 NONE,
71 STARTUP,
72 SHUTDOWN,
73 MASK,
74 UNMASK
75 };
76
77 struct ab8500_gpio {
78 struct gpio_chip chip;
79 struct ab8500 *parent;
80 struct device *dev;
81 struct mutex lock;
82 u32 irq_base;
83 enum ab8500_gpio_action irq_action;
84 u16 rising;
85 u16 falling;
86 };
87 /**
88 * to_ab8500_gpio() - get the pointer to ab8500_gpio
89 * @chip: Member of the structure ab8500_gpio
90 */
to_ab8500_gpio(struct gpio_chip * chip)91 static inline struct ab8500_gpio *to_ab8500_gpio(struct gpio_chip *chip)
92 {
93 return container_of(chip, struct ab8500_gpio, chip);
94 }
95
ab8500_gpio_set_bits(struct gpio_chip * chip,u8 reg,unsigned offset,int val)96 static int ab8500_gpio_set_bits(struct gpio_chip *chip, u8 reg,
97 unsigned offset, int val)
98 {
99 struct ab8500_gpio *ab8500_gpio = to_ab8500_gpio(chip);
100 u8 pos = offset % 8;
101 int ret;
102
103 reg = reg + (offset / 8);
104 ret = abx500_mask_and_set_register_interruptible(ab8500_gpio->dev,
105 AB8500_MISC, reg, 1 << pos, val << pos);
106 if (ret < 0)
107 dev_err(ab8500_gpio->dev, "%s write failed\n", __func__);
108 return ret;
109 }
110 /**
111 * ab8500_gpio_get() - Get the particular GPIO value
112 * @chip: Gpio device
113 * @offset: GPIO number to read
114 */
ab8500_gpio_get(struct gpio_chip * chip,unsigned offset)115 static int ab8500_gpio_get(struct gpio_chip *chip, unsigned offset)
116 {
117 struct ab8500_gpio *ab8500_gpio = to_ab8500_gpio(chip);
118 u8 mask = 1 << (offset % 8);
119 u8 reg = AB8500_GPIO_OUT1_REG + (offset / 8);
120 int ret;
121 u8 data;
122 ret = abx500_get_register_interruptible(ab8500_gpio->dev, AB8500_MISC,
123 reg, &data);
124 if (ret < 0) {
125 dev_err(ab8500_gpio->dev, "%s read failed\n", __func__);
126 return ret;
127 }
128 return (data & mask) >> (offset % 8);
129 }
130
ab8500_gpio_set(struct gpio_chip * chip,unsigned offset,int val)131 static void ab8500_gpio_set(struct gpio_chip *chip, unsigned offset, int val)
132 {
133 struct ab8500_gpio *ab8500_gpio = to_ab8500_gpio(chip);
134 int ret;
135 /* Write the data */
136 ret = ab8500_gpio_set_bits(chip, AB8500_GPIO_OUT1_REG, offset, 1);
137 if (ret < 0)
138 dev_err(ab8500_gpio->dev, "%s write failed\n", __func__);
139 }
140
ab8500_gpio_direction_output(struct gpio_chip * chip,unsigned offset,int val)141 static int ab8500_gpio_direction_output(struct gpio_chip *chip, unsigned offset,
142 int val)
143 {
144 int ret;
145 /* set direction as output */
146 ret = ab8500_gpio_set_bits(chip, AB8500_GPIO_DIR1_REG, offset, 1);
147 if (ret < 0)
148 return ret;
149 /* disable pull down */
150 ret = ab8500_gpio_set_bits(chip, AB8500_GPIO_PUD1_REG, offset, 1);
151 if (ret < 0)
152 return ret;
153 /* set the output as 1 or 0 */
154 return ab8500_gpio_set_bits(chip, AB8500_GPIO_OUT1_REG, offset, val);
155
156 }
157
ab8500_gpio_direction_input(struct gpio_chip * chip,unsigned offset)158 static int ab8500_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
159 {
160 /* set the register as input */
161 return ab8500_gpio_set_bits(chip, AB8500_GPIO_DIR1_REG, offset, 0);
162 }
163
ab8500_gpio_to_irq(struct gpio_chip * chip,unsigned offset)164 static int ab8500_gpio_to_irq(struct gpio_chip *chip, unsigned offset)
165 {
166 /*
167 * Only some GPIOs are interrupt capable, and they are
168 * organized in discontiguous clusters:
169 *
170 * GPIO6 to GPIO13
171 * GPIO24 and GPIO25
172 * GPIO36 to GPIO41
173 */
174 static struct ab8500_gpio_irq_cluster {
175 int start;
176 int end;
177 } clusters[] = {
178 {.start = 6, .end = 13},
179 {.start = 24, .end = 25},
180 {.start = 36, .end = 41},
181 };
182 struct ab8500_gpio *ab8500_gpio = to_ab8500_gpio(chip);
183 int base = ab8500_gpio->irq_base;
184 int i;
185
186 for (i = 0; i < ARRAY_SIZE(clusters); i++) {
187 struct ab8500_gpio_irq_cluster *cluster = &clusters[i];
188
189 if (offset >= cluster->start && offset <= cluster->end)
190 return base + offset - cluster->start;
191
192 /* Advance by the number of gpios in this cluster */
193 base += cluster->end - cluster->start + 1;
194 }
195
196 return -EINVAL;
197 }
198
199 static struct gpio_chip ab8500gpio_chip = {
200 .label = "ab8500_gpio",
201 .owner = THIS_MODULE,
202 .direction_input = ab8500_gpio_direction_input,
203 .get = ab8500_gpio_get,
204 .direction_output = ab8500_gpio_direction_output,
205 .set = ab8500_gpio_set,
206 .to_irq = ab8500_gpio_to_irq,
207 };
208
irq_to_rising(unsigned int irq)209 static unsigned int irq_to_rising(unsigned int irq)
210 {
211 struct ab8500_gpio *ab8500_gpio = get_irq_chip_data(irq);
212 int offset = irq - ab8500_gpio->irq_base;
213 int new_irq = offset + AB8500_INT_GPIO6R
214 + ab8500_gpio->parent->irq_base;
215 return new_irq;
216 }
217
irq_to_falling(unsigned int irq)218 static unsigned int irq_to_falling(unsigned int irq)
219 {
220 struct ab8500_gpio *ab8500_gpio = get_irq_chip_data(irq);
221 int offset = irq - ab8500_gpio->irq_base;
222 int new_irq = offset + AB8500_INT_GPIO6F
223 + ab8500_gpio->parent->irq_base;
224 return new_irq;
225
226 }
227
rising_to_irq(unsigned int irq,void * dev)228 static unsigned int rising_to_irq(unsigned int irq, void *dev)
229 {
230 struct ab8500_gpio *ab8500_gpio = dev;
231 int offset = irq - AB8500_INT_GPIO6R
232 - ab8500_gpio->parent->irq_base ;
233 int new_irq = offset + ab8500_gpio->irq_base;
234 return new_irq;
235 }
236
falling_to_irq(unsigned int irq,void * dev)237 static unsigned int falling_to_irq(unsigned int irq, void *dev)
238 {
239 struct ab8500_gpio *ab8500_gpio = dev;
240 int offset = irq - AB8500_INT_GPIO6F
241 - ab8500_gpio->parent->irq_base ;
242 int new_irq = offset + ab8500_gpio->irq_base;
243 return new_irq;
244
245 }
246
247 /*
248 * IRQ handler
249 */
250
handle_rising(int irq,void * dev)251 static irqreturn_t handle_rising(int irq, void *dev)
252 {
253
254 handle_nested_irq(rising_to_irq(irq , dev));
255 return IRQ_HANDLED;
256 }
257
handle_falling(int irq,void * dev)258 static irqreturn_t handle_falling(int irq, void *dev)
259 {
260
261 handle_nested_irq(falling_to_irq(irq, dev));
262 return IRQ_HANDLED;
263 }
264
ab8500_gpio_irq_lock(unsigned int irq)265 static void ab8500_gpio_irq_lock(unsigned int irq)
266 {
267 struct ab8500_gpio *ab8500_gpio = get_irq_chip_data(irq);
268 mutex_lock(&ab8500_gpio->lock);
269 }
270
ab8500_gpio_irq_sync_unlock(unsigned int irq)271 static void ab8500_gpio_irq_sync_unlock(unsigned int irq)
272 {
273 struct ab8500_gpio *ab8500_gpio = get_irq_chip_data(irq);
274 int offset = irq - ab8500_gpio->irq_base;
275 bool rising = ab8500_gpio->rising & BIT(offset);
276 bool falling = ab8500_gpio->falling & BIT(offset);
277 int ret;
278
279 switch (ab8500_gpio->irq_action) {
280 case STARTUP:
281 if (rising)
282 ret = request_threaded_irq(irq_to_rising(irq),
283 NULL, handle_rising,
284 IRQF_TRIGGER_RISING,
285 "ab8500-gpio-r", ab8500_gpio);
286 if (falling)
287 ret = request_threaded_irq(irq_to_falling(irq),
288 NULL, handle_falling,
289 IRQF_TRIGGER_FALLING,
290 "ab8500-gpio-f", ab8500_gpio);
291 break;
292 case SHUTDOWN:
293 if (rising)
294 free_irq(irq_to_rising(irq), ab8500_gpio);
295 if (falling)
296 free_irq(irq_to_falling(irq), ab8500_gpio);
297 break;
298 case MASK:
299 if (rising)
300 disable_irq(irq_to_rising(irq));
301 if (falling)
302 disable_irq(irq_to_falling(irq));
303 break;
304 case UNMASK:
305 if (rising)
306 enable_irq(irq_to_rising(irq));
307 if (falling)
308 enable_irq(irq_to_falling(irq));
309 break;
310 case NONE:
311 break;
312 }
313 ab8500_gpio->irq_action = NONE;
314 ab8500_gpio->rising &= ~(BIT(offset));
315 ab8500_gpio->falling &= ~(BIT(offset));
316 mutex_unlock(&ab8500_gpio->lock);
317 }
318
319
ab8500_gpio_irq_mask(unsigned int irq)320 static void ab8500_gpio_irq_mask(unsigned int irq)
321 {
322 struct ab8500_gpio *ab8500_gpio = get_irq_chip_data(irq);
323 ab8500_gpio->irq_action = MASK;
324 }
325
ab8500_gpio_irq_unmask(unsigned int irq)326 static void ab8500_gpio_irq_unmask(unsigned int irq)
327 {
328 struct ab8500_gpio *ab8500_gpio = get_irq_chip_data(irq);
329 ab8500_gpio->irq_action = UNMASK;
330 }
331
ab8500_gpio_irq_set_type(unsigned int irq,unsigned int type)332 static int ab8500_gpio_irq_set_type(unsigned int irq, unsigned int type)
333 {
334 struct ab8500_gpio *ab8500_gpio = get_irq_chip_data(irq);
335 int offset = irq - ab8500_gpio->irq_base;
336
337 if (type == IRQ_TYPE_EDGE_BOTH) {
338 ab8500_gpio->rising = BIT(offset);
339 ab8500_gpio->falling = BIT(offset);
340 } else if (type == IRQ_TYPE_EDGE_RISING) {
341 ab8500_gpio->rising = BIT(offset);
342 } else {
343 ab8500_gpio->falling = BIT(offset);
344 }
345 return 0;
346 }
347
ab8500_gpio_irq_startup(unsigned int irq)348 unsigned int ab8500_gpio_irq_startup(unsigned int irq)
349 {
350 struct ab8500_gpio *ab8500_gpio = get_irq_chip_data(irq);
351 ab8500_gpio->irq_action = STARTUP;
352 return 0;
353 }
354
ab8500_gpio_irq_shutdown(unsigned int irq)355 void ab8500_gpio_irq_shutdown(unsigned int irq)
356 {
357 struct ab8500_gpio *ab8500_gpio = get_irq_chip_data(irq);
358 ab8500_gpio->irq_action = SHUTDOWN;
359 }
360
361 static struct irq_chip ab8500_gpio_irq_chip = {
362 .name = "ab8500-gpio",
363 .startup = ab8500_gpio_irq_startup,
364 .shutdown = ab8500_gpio_irq_shutdown,
365 .bus_lock = ab8500_gpio_irq_lock,
366 .bus_sync_unlock = ab8500_gpio_irq_sync_unlock,
367 .mask = ab8500_gpio_irq_mask,
368 .unmask = ab8500_gpio_irq_unmask,
369 .set_type = ab8500_gpio_irq_set_type,
370 };
371
ab8500_gpio_irq_init(struct ab8500_gpio * ab8500_gpio)372 static int ab8500_gpio_irq_init(struct ab8500_gpio *ab8500_gpio)
373 {
374 u32 base = ab8500_gpio->irq_base;
375 int irq;
376
377 for (irq = base; irq < base + AB8500_NUM_VIR_GPIO_IRQ ; irq++) {
378 set_irq_chip_data(irq, ab8500_gpio);
379 set_irq_chip_and_handler(irq, &ab8500_gpio_irq_chip,
380 handle_simple_irq);
381 set_irq_nested_thread(irq, 1);
382 #ifdef CONFIG_ARM
383 set_irq_flags(irq, IRQF_VALID);
384 #else
385 set_irq_noprobe(irq);
386 #endif
387 }
388
389 return 0;
390 }
391
ab8500_gpio_irq_remove(struct ab8500_gpio * ab8500_gpio)392 static void ab8500_gpio_irq_remove(struct ab8500_gpio *ab8500_gpio)
393 {
394 int base = ab8500_gpio->irq_base;
395 int irq;
396
397 for (irq = base; irq < base + AB8500_NUM_VIR_GPIO_IRQ; irq++) {
398 #ifdef CONFIG_ARM
399 set_irq_flags(irq, 0);
400 #endif
401 set_irq_chip_and_handler(irq, NULL, NULL);
402 set_irq_chip_data(irq, NULL);
403 }
404 }
405
ab8500_gpio_probe(struct platform_device * pdev)406 static int __devinit ab8500_gpio_probe(struct platform_device *pdev)
407 {
408 struct ab8500_platform_data *ab8500_pdata =
409 dev_get_platdata(pdev->dev.parent);
410 struct ab8500_gpio_platform_data *pdata;
411 struct ab8500_gpio *ab8500_gpio;
412 int ret;
413 int i;
414
415 pdata = ab8500_pdata->gpio;
416 if (!pdata) {
417 dev_err(&pdev->dev, "gpio platform data missing\n");
418 return -ENODEV;
419 }
420
421 ab8500_gpio = kzalloc(sizeof(struct ab8500_gpio), GFP_KERNEL);
422 if (ab8500_gpio == NULL) {
423 dev_err(&pdev->dev, "failed to allocate memory\n");
424 return -ENOMEM;
425 }
426 ab8500_gpio->dev = &pdev->dev;
427 ab8500_gpio->parent = dev_get_drvdata(pdev->dev.parent);
428 ab8500_gpio->chip = ab8500gpio_chip;
429 ab8500_gpio->chip.ngpio = AB8500_NUM_GPIO;
430 ab8500_gpio->chip.dev = &pdev->dev;
431 ab8500_gpio->chip.base = pdata->gpio_base;
432 ab8500_gpio->irq_base = pdata->irq_base;
433 /* initialize the lock */
434 mutex_init(&ab8500_gpio->lock);
435 /*
436 * AB8500 core will handle and clear the IRQ
437 * configre GPIO based on config-reg value.
438 * These values are for selecting the PINs as
439 * GPIO or alternate function
440 */
441 for (i = AB8500_GPIO_SEL1_REG; i <= AB8500_GPIO_SEL6_REG; i++) {
442 ret = abx500_set_register_interruptible(ab8500_gpio->dev,
443 AB8500_MISC, i,
444 pdata->config_reg[i]);
445 if (ret < 0)
446 goto out_free;
447 }
448 ret = abx500_set_register_interruptible(ab8500_gpio->dev, AB8500_MISC,
449 AB8500_GPIO_ALTFUN_REG,
450 pdata->config_reg[ALTFUN_REG_INDEX]);
451 if (ret < 0)
452 goto out_free;
453
454 ret = ab8500_gpio_irq_init(ab8500_gpio);
455 if (ret)
456 goto out_free;
457 ret = gpiochip_add(&ab8500_gpio->chip);
458 if (ret) {
459 dev_err(&pdev->dev, "unable to add gpiochip: %d\n",
460 ret);
461 goto out_rem_irq;
462 }
463 platform_set_drvdata(pdev, ab8500_gpio);
464 return 0;
465
466 out_rem_irq:
467 ab8500_gpio_irq_remove(ab8500_gpio);
468 out_free:
469 mutex_destroy(&ab8500_gpio->lock);
470 kfree(ab8500_gpio);
471 return ret;
472 }
473
474 /*
475 * ab8500_gpio_remove() - remove Ab8500-gpio driver
476 * @pdev : Platform device registered
477 */
ab8500_gpio_remove(struct platform_device * pdev)478 static int __devexit ab8500_gpio_remove(struct platform_device *pdev)
479 {
480 struct ab8500_gpio *ab8500_gpio = platform_get_drvdata(pdev);
481 int ret;
482
483 ret = gpiochip_remove(&ab8500_gpio->chip);
484 if (ret < 0) {
485 dev_err(ab8500_gpio->dev, "unable to remove gpiochip:\
486 %d\n", ret);
487 return ret;
488 }
489
490 platform_set_drvdata(pdev, NULL);
491 mutex_destroy(&ab8500_gpio->lock);
492 kfree(ab8500_gpio);
493
494 return 0;
495 }
496
497 static struct platform_driver ab8500_gpio_driver = {
498 .driver = {
499 .name = "ab8500-gpio",
500 .owner = THIS_MODULE,
501 },
502 .probe = ab8500_gpio_probe,
503 .remove = __devexit_p(ab8500_gpio_remove),
504 };
505
ab8500_gpio_init(void)506 static int __init ab8500_gpio_init(void)
507 {
508 return platform_driver_register(&ab8500_gpio_driver);
509 }
510 arch_initcall(ab8500_gpio_init);
511
ab8500_gpio_exit(void)512 static void __exit ab8500_gpio_exit(void)
513 {
514 platform_driver_unregister(&ab8500_gpio_driver);
515 }
516 module_exit(ab8500_gpio_exit);
517
518 MODULE_AUTHOR("BIBEK BASU <bibek.basu@stericsson.com>");
519 MODULE_DESCRIPTION("Driver allows to use AB8500 unused pins\
520 to be used as GPIO");
521 MODULE_ALIAS("AB8500 GPIO driver");
522 MODULE_LICENSE("GPL v2");
523