1 /*
2  * LparMap.h
3  * Copyright (C) 2001  Mike Corrigan IBM Corporation
4  *
5  * This program is free software; you can redistribute it and/or modify
6  * it under the terms of the GNU General Public License as published by
7  * the Free Software Foundation; either version 2 of the License, or
8  * (at your option) any later version.
9  *
10  * This program is distributed in the hope that it will be useful,
11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
13  * GNU General Public License for more details.
14  *
15  * You should have received a copy of the GNU General Public License
16  * along with this program; if not, write to the Free Software
17  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
18  */
19 
20 #ifndef	_PPC_TYPES_H
21 #include	<asm/types.h>
22 #endif
23 
24 #ifndef _LPARMAP_H
25 #define _LPARMAP_H
26 
27 /* The iSeries hypervisor will set up mapping for one or more
28  * ESID/VSID pairs (in SLB/segment registers) and will set up
29  * mappings of one or more ranges of pages to VAs.
30  * We will have the hypervisor set up the ESID->VSID mapping
31  * for the four kernel segments (C-F).  With shared processors,
32  * the hypervisor will clear all segment registers and reload
33  * these four whenever the processor is switched from one
34  * partition to another.
35  */
36 
37 /* The Vsid and Esid identified below will be used by the hypervisor
38  * to set up a memory mapping for part of the load area before giving
39  * control to the Linux kernel.  The load area is 64 MB, but this must
40  * not attempt to map the whole load area.  The Hashed Page Table may
41  * need to be located within the load area (if the total partition size
42  * is 64 MB), but cannot be mapped.  Typically, this should specify
43  * to map half (32 MB) of the load area.
44  *
45  * The hypervisor will set up page table entries for the number of
46  * pages specified.
47  *
48  * In 32-bit mode, the hypervisor will load all four of the
49  * segment registers (identified by the low-order four bits of the
50  * Esid field.  In 64-bit mode, the hypervisor will load one SLB
51  * entry to map the Esid to the Vsid.
52 */
53 
54 // Hypervisor initially maps 32MB of the load area
55 #define HvPagesToMap 8192
56 
57 struct LparMap
58 {
59 	u64	  xNumberEsids;		// Number of ESID/VSID pairs (1)
60 	u64	  xNumberRanges;	// Number of VA ranges to map (1)
61 	u64	  xSegmentTableOffs;	// Page number within load area of seg table (0)
62 	u64	  xRsvd[5];		// Reserved (0)
63 	u64	  xKernelEsid;  	// Esid used to map kernel load (0x0C00000000)
64 	u64	  xKernelVsid;		// Vsid used to map kernel load (0x0C00000000)
65 	u64	  xPages;		// Number of pages to be mapped	(8192)
66 	u64	  xOffset;		// Offset from start of load area (0)
67 	u64	  xVPN;			// Virtual Page Number (0x000C000000000000)
68 };
69 
70 #endif /* _LPARMAP_H */
71