Searched refs:tisr (Results 1 – 3 of 3) sorted by relevance
17 volatile unsigned long tisr; member
167 if (jmr3927_tmrptr->tisr & TXx927_TMTISR_TIIS) { in jmr3927_do_gettimeoffset()409 tx3927_tmrptr(i)->tisr = 0; in tx3927_setup()
140 jmr3927_tmrptr->tisr = 0; /* ack interrupt */ in jmr3927_irq_ack()