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/linux-2.4.37.9/crypto/
Dsha256.c66 u32 t1 = input[(4 * I)] & 0xff; in LOAD_OP() local
68 t1 <<= 8; in LOAD_OP()
69 t1 |= input[(4 * I) + 1] & 0xff; in LOAD_OP()
70 t1 <<= 8; in LOAD_OP()
71 t1 |= input[(4 * I) + 2] & 0xff; in LOAD_OP()
72 t1 <<= 8; in LOAD_OP()
73 t1 |= input[(4 * I) + 3] & 0xff; in LOAD_OP()
74 W[I] = t1; in LOAD_OP()
84 u32 a, b, c, d, e, f, g, h, t1, t2; in sha256_transform() local
101 t1 = h + e1(e) + Ch(e,f,g) + 0x428a2f98 + W[ 0]; in sha256_transform()
[all …]
Dsha512.c107 u64 t1 = input[(8*I) ] & 0xff; in LOAD_OP() local
108 t1 <<= 8; in LOAD_OP()
109 t1 |= input[(8*I)+1] & 0xff; in LOAD_OP()
110 t1 <<= 8; in LOAD_OP()
111 t1 |= input[(8*I)+2] & 0xff; in LOAD_OP()
112 t1 <<= 8; in LOAD_OP()
113 t1 |= input[(8*I)+3] & 0xff; in LOAD_OP()
114 t1 <<= 8; in LOAD_OP()
115 t1 |= input[(8*I)+4] & 0xff; in LOAD_OP()
116 t1 <<= 8; in LOAD_OP()
[all …]
/linux-2.4.37.9/arch/mips/vr41xx/common/
Dint-handler.S61 mfc0 t1, CP0_STATUS
63 and t0, t0, t1
65 andi t1, t0, CAUSEF_IP7 # MIPS timer interrupt
66 bnez t1, handle_irq
69 andi t1, t0, 0x7800 # check for Int1-4
70 beqz t1, 1f
72 andi t1, t0, CAUSEF_IP3 # check for Int1
73 bnez t1, handle_int
76 andi t1, t0, CAUSEF_IP4 # check for Int2
77 bnez t1, handle_int
[all …]
/linux-2.4.37.9/arch/mips/kernel/
Dr4k_switch.S50 mfc0 t1, CP0_STATUS
51 sw t1, THREAD_STATUS(a0)
59 li t1, PF_USEDFPU
60 and t2, t0, t1
62 nor t1, zero, t1
67 and t0, t0, t1
74 li t1, ~ST0_CU1
75 and t0, t0, t1
90 la t1, kernelsp
93 addu t1, a3, t1
[all …]
Dr2300_switch.S52 mfc0 t1, CP0_STATUS
53 sw t1, THREAD_STATUS(a0)
61 li t1, PF_USEDFPU
62 and t2, t0, t1
64 nor t1, zero, t1
69 and t0, t0, t1
76 li t1, ~ST0_CU1
77 and t0, t0, t1
91 mfc0 t1, CP0_STATUS /* Do we really need this? */
93 and t1, a3
[all …]
/linux-2.4.37.9/arch/mips/momentum/ocelot_g/
Dint-handler.S34 andi t1, t0, STATUSF_IP2 /* int0 hardware line */
35 bnez t1, ll_pri_enet_irq
36 andi t1, t0, STATUSF_IP3 /* int1 hardware line */
37 bnez t1, ll_sec_enet_irq
38 andi t1, t0, STATUSF_IP4 /* int2 hardware line */
39 bnez t1, ll_uart_irq
40 andi t1, t0, STATUSF_IP5 /* int3 hardware line */
41 bnez t1, ll_cpci_irq
42 andi t1, t0, STATUSF_IP6 /* int4 hardware line */
43 bnez t1, ll_galileo_p0_irq
[all …]
/linux-2.4.37.9/arch/mips/gt64120/momenco_ocelot/
Dint-handler.S33 andi t1, t0, STATUSF_IP2 /* int0 hardware line */
34 bnez t1, ll_pri_enet_irq
35 andi t1, t0, STATUSF_IP3 /* int1 hardware line */
36 bnez t1, ll_sec_enet_irq
37 andi t1, t0, STATUSF_IP4 /* int2 hardware line */
38 bnez t1, ll_uart1_irq
39 andi t1, t0, STATUSF_IP5 /* int3 hardware line */
40 bnez t1, ll_cpci_irq
41 andi t1, t0, STATUSF_IP6 /* int4 hardware line */
42 bnez t1, ll_galileo_irq
[all …]
/linux-2.4.37.9/drivers/net/wan/8253x/
Dendian.h231 } t1 = { "\x01\x02\x03\x04" }; \
237 fnm_assert_stmt((t1.a_c[0] == 1) && (t1.a_c[1] == 2) && \
238 (t1.a_c[2] == 3) && (t1.a_c[3] == 4)); \
240 fnm_assert_stmt(fnm_convert_ui_big_endian(t1.ul) == 0x01020304); \
241 fnm_assert_stmt(fnm_convert_ui_little_endian(t1.ul) == 0x04030201); \
242 fnm_assert_stmt(fnm_convert_us_big_endian(t1.a_us[0]) == 0x0102); \
243 fnm_assert_stmt(fnm_convert_us_little_endian(t1.a_us[0]) == 0x0201); \
245 p = (unsigned char*)(&t1); \
251 fnm_assert_stmt((p-4) == ((unsigned char*)(&t1))); \
253 p = (unsigned char*)(&t1); \
[all …]
/linux-2.4.37.9/arch/alpha/lib/
Dstxcpy.S48 mskqh t1, a1, t3 # e0 :
49 ornot t1, t2, t2 # .. e1 :
52 or t0, t3, t1 # e0 :
60 stq_u t1, 0(a0) # e0 :
62 ldq_u t1, 0(a1) # e0 :
64 cmpbge zero, t1, t8 # e0 (stall)
84 zapnot t1, t6, t1 # e0 : clear src bytes >= null
87 or t0, t1, t1 # e1 :
89 1: stq_u t1, 0(a0) # e0 :
108 ldq_u t1, 0(a1) # e0 : load first src word
[all …]
Dev6-stxcpy.S59 mskqh t1, a1, t3 # U :
60 ornot t1, t2, t2 # E : (stall)
64 or t0, t3, t1 # E : (stall)
73 stq_u t1, 0(a0) # L :
78 ldq_u t1, 0(a1) # L : Latency=3
80 cmpbge zero, t1, t8 # E : (3 cycle stall)
99 zapnot t1, t6, t1 # U : clear src bytes >= null (stall)
103 or t0, t1, t1 # E : (stall)
107 1: stq_u t1, 0(a0) # L :
128 ldq_u t1, 0(a1) # L : load first src word
[all …]
Dstrlen_user.S49 lda t1, -1(zero)
50 insqh t1, a0, t1
52 or t1, t0, t0
54 cmpbge zero, t0, t1 # t1 <- bitmask: bit i == 1 <==> i-th byte == 0
57 bne t1, $found
67 cmpbge zero, t0, t1
68 beq t1, $loop
70 $found: negq t1, t2 # clear all but least set bit
71 and t1, t2, t1
73 and t1, 0xf0, t2 # binary search for that set bit
[all …]
Dstrncpy_from_user.S45 mskqh t1, a1, t3 # e0 :
46 ornot t1, t2, t2 # .. e1 :
84 ldq_u t1, 0(a0) # e0 :
89 zap t1, t8, t1 # .. e1 : clear dst bytes <= null
90 or t0, t1, t0 # e1 :
109 xor a0, a1, t1 # e0 :
111 and t1, 7, t1 # e0 :
118 bne t1, $unaligned # .. e1 :
122 EX( ldq_u t1, 0(a1) ) # e0 : load first src word
149 or t1, t4, t1 # e1 : first aligned src word complete
[all …]
/linux-2.4.37.9/arch/mips/momentum/jaguar_atx/
Dint-handler.S37 andi t1, t0, STATUSF_IP0 /* sw0 software interrupt */
38 bnez t1, ll_sw0_irq
39 andi t1, t0, STATUSF_IP1 /* sw1 software interrupt */
40 bnez t1, ll_sw1_irq
41 andi t1, t0, STATUSF_IP2 /* int0 hardware line */
42 bnez t1, ll_pcixa_irq
43 andi t1, t0, STATUSF_IP3 /* int1 hardware line */
44 bnez t1, ll_pcixb_irq
45 andi t1, t0, STATUSF_IP4 /* int2 hardware line */
46 bnez t1, ll_pcia_irq
[all …]
/linux-2.4.37.9/arch/mips/sibyte/sb1250/
Dirq_handler.S65 mfc0 t1, CP0_COUNT
66 mtc0 t1, CP0_COMPARE /* pause to clear IP[7] bit of cause ? */
73 andi t1, s0, CAUSEF_IP7
74 beqz t1, 0f
75 srl t1, s0, (CAUSEB_BD-2) /* Shift BD bit to bit 2 */
76 and t1, t1, 0x4 /* mask to get just BD bit */
79 addu a0, a0, t1 /* a0 = EPC + (BD ? 4 : 0) */
86 andi t1, s0, CAUSEF_IP4
87 beqz t1, 1f
97 andi t1, s0, CAUSEF_IP3
[all …]
/linux-2.4.37.9/arch/mips64/kernel/
Dr4k_switch.S45 mfc0 t1, CP0_STATUS
46 sd t1, THREAD_STATUS(a0)
54 li t1, PF_USEDFPU
55 and t2, t0, t1
57 nor t1, zero, t1
62 and t0, t0, t1
69 li t1, ~ST0_CU1
70 and t0, t0, t1
79 fpu_save_16even a0 t1 # clobbers t1
90 set_saved_sp a1, t0, t1
[all …]
/linux-2.4.37.9/arch/mips/pmc-sierra/yosemite/
Dirq-handler.S34 andi t1, t0, STATUSF_IP0 /* INTB0 hardware line */
35 bnez t1, ll_pcia_irq /* 64-bit PCI */
36 andi t1, t0, STATUSF_IP1 /* INTB1 hardware line */
37 bnez t1, ll_pcib_irq /* second 64-bit PCI slot */
38 andi t1, t0, STATUSF_IP2 /* INTB2 hardware line */
39 bnez t1, ll_duart_irq /* UART */
40 andi t1, t0, STATUSF_IP3 /* INTB3 hardware line*/
41 bnez t1, ll_ht_smp_irq /* Hypertransport */
42 andi t1, t0, STATUSF_IP5 /* INTB5 hardware line */
43 bnez t1, ll_timer_irq /* Timer */
[all …]
/linux-2.4.37.9/arch/mips/vr4181/common/
Dint_handler.S48 andi t1, t0, STATUSF_IP3
49 bnez t1, ll_cpu_ip3
50 andi t1, t0, STATUSF_IP2
51 bnez t1, ll_cpu_ip2
52 andi t1, t0, STATUSF_IP7 /* cpu timer */
53 bnez t1, ll_cputimer_irq
54 andi t1, t0, STATUSF_IP4
55 bnez t1, ll_cpu_ip4
56 andi t1, t0, STATUSF_IP5
57 bnez t1, ll_cpu_ip5
[all …]
/linux-2.4.37.9/arch/mips/momentum/ocelot_c/
Dint-handler.S36 andi t1, t0, STATUSF_IP0 /* sw0 software interrupt */
37 bnez t1, ll_sw0_irq
38 andi t1, t0, STATUSF_IP1 /* sw1 software interrupt */
39 bnez t1, ll_sw1_irq
40 andi t1, t0, STATUSF_IP2 /* int0 hardware line */
41 bnez t1, ll_scsi_irq
42 andi t1, t0, STATUSF_IP3 /* int1 hardware line */
43 bnez t1, ll_uart_decode_irq
44 andi t1, t0, STATUSF_IP4 /* int2 hardware line */
45 bnez t1, ll_pmc_irq
[all …]
/linux-2.4.37.9/arch/mips/ddb5xxx/ddb5476/
Dint-handler.S36 andi t1, t0, STATUSF_IP7 /* cpu timer */
37 bnez t1, ll_cpu_ip7
38 andi t1, t0, STATUSF_IP2 /* vrc5476 & i8259 */
39 bnez t1, ll_cpu_ip2
40 andi t1, t0, STATUSF_IP3
41 bnez t1, ll_cpu_ip3
42 andi t1, t0, STATUSF_IP4
43 bnez t1, ll_cpu_ip4
44 andi t1, t0, STATUSF_IP5
45 bnez t1, ll_cpu_ip5
[all …]
/linux-2.4.37.9/arch/mips64/lib/
Dmemset.S45 dsll t1, a1, 8
46 or a1, t1
47 dsll t1, a1, 16
48 or a1, t1
49 dsll t1, a1, 32
50 or a1, t1
71 1: ori t1, a2, 0x3f /* # of full blocks */
72 xori t1, 0x3f
73 beqz t1, memset_partial /* no block to fill */
76 daddu t1, a0 /* end address */
[all …]
/linux-2.4.37.9/include/asm-mips/sibyte/
Dboard.h41 #define setleds(t0,t1,c0,c1,c2,c3) \
43 li t1, c0; \
44 sb t1, 0x18(t0); \
45 li t1, c1; \
46 sb t1, 0x10(t0); \
47 li t1, c2; \
48 sb t1, 0x08(t0); \
49 li t1, c3; \
50 sb t1, 0x00(t0)
52 #define setleds(t0,t1,c0,c1,c2,c3)
/linux-2.4.37.9/include/asm-mips64/sibyte/
Dboard.h41 #define setleds(t0,t1,c0,c1,c2,c3) \
43 li t1, c0; \
44 sb t1, 0x18(t0); \
45 li t1, c1; \
46 sb t1, 0x10(t0); \
47 li t1, c2; \
48 sb t1, 0x08(t0); \
49 li t1, c3; \
50 sb t1, 0x00(t0)
52 #define setleds(t0,t1,c0,c1,c2,c3)
/linux-2.4.37.9/arch/mips/dec/
Dint-handler.S134 mfc0 t1,CP0_STATUS
139 and t0,t1 # isolate allowed ones
151 PTR_LA t1,cpu_mask_nr_tbl
152 1: lw t2,(t1)
156 addu t1,2*PTRSIZE # delay slot
161 lw a0,(-PTRSIZE)(t1)
180 andi t1,t0,KN02_IRQ_ALL
190 lw t1,IO_REG_SIMR(t2) # get mask: IOASIC simr
193 1: and t0,t1 # mask out allowed ones
200 PTR_LA t1,asic_mask_nr_tbl
[all …]
/linux-2.4.37.9/arch/mips/lib/
Dcsum_partial.S16 #define CSUM_BIGCHUNK(src, offset, sum, t0, t1, t2, t3) \ argument
18 lw t1, (offset + 0x04)(src); \
22 ADDC(sum, t1); \
26 lw t1, (offset + 0x14)(src); \
30 ADDC(sum, t1); \
56 ulw t1, (src)
58 ADDC(sum, t1)
60 1: move t1, zero
65 ulhu t1, (src)
69 sll t1, t1, 16
[all …]
/linux-2.4.37.9/arch/mips/sni/
Dint-handler.S37 mfc0 t1, CP0_CAUSE
38 and t0, t1
40 andi t1, t0, 0x4a00 # hardware interrupt 1
41 bnez t1, _hwint134
42 andi t1, t0, 0x1000 # hardware interrupt 2
43 bnez t1, _hwint2
44 andi t1, t0, 0x8000 # hardware interrupt 5
45 bnez t1, _hwint5
46 andi t1, t0, 0x0400 # hardware interrupt 0
47 bnez t1, _hwint0

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