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Searched refs:sg_pci (Results 1 – 16 of 16) sorted by relevance

/linux-2.4.37.9/arch/alpha/kernel/
Dcore_titan.c352 hose->sg_pci = iommu_arena_new(hose, 0xc0000000, 0x40000000, 0); in titan_init_one_pachip_port()
353 hose->sg_pci->align_entry = 4; /* Titan caches 4 PTEs at a time */ in titan_init_one_pachip_port()
363 port->wsba[2].csr = hose->sg_pci->dma_base | 3; in titan_init_one_pachip_port()
364 port->wsm[2].csr = (hose->sg_pci->size - 1) & 0xfff00000; in titan_init_one_pachip_port()
365 port->tba[2].csr = virt_to_phys(hose->sg_pci->ptes); in titan_init_one_pachip_port()
541 if (hose->sg_pci && in titan_ioremap()
542 baddr >= (unsigned long)hose->sg_pci->dma_base && in titan_ioremap()
543 last < (unsigned long)hose->sg_pci->dma_base + hose->sg_pci->size){ in titan_ioremap()
548 baddr -= hose->sg_pci->dma_base; in titan_ioremap()
549 last -= hose->sg_pci->dma_base; in titan_ioremap()
[all …]
Dcore_marvel.c304 hose->sg_pci = iommu_arena_new_node(marvel_cpuid_to_nid(io7->pe), in io7_init_hose()
306 hose->sg_pci->align_entry = 8; /* cache line boundary */ in io7_init_hose()
308 hose->sg_pci->dma_base | wbase_m_ena | wbase_m_sg; in io7_init_hose()
309 csrs->POx_WMASK[2].csr = (hose->sg_pci->size - 1) & wbase_m_addr; in io7_init_hose()
310 csrs->POx_TBASE[2].csr = virt_to_phys(hose->sg_pci->ptes); in io7_init_hose()
694 if (hose->sg_pci && in marvel_ioremap()
695 baddr >= (unsigned long)hose->sg_pci->dma_base && in marvel_ioremap()
696 last < (unsigned long)hose->sg_pci->dma_base + hose->sg_pci->size){ in marvel_ioremap()
701 baddr -= hose->sg_pci->dma_base; in marvel_ioremap()
702 last -= hose->sg_pci->dma_base; in marvel_ioremap()
[all …]
Dcore_tsunami.c361 hose->sg_pci = iommu_arena_new(hose, 0x40000000, in tsunami_init_one_pchip()
363 hose->sg_pci->align_entry = 4; /* Tsunami caches 4 PTEs at a time */ in tsunami_init_one_pchip()
372 pchip->wsba[1].csr = hose->sg_pci->dma_base | 3; in tsunami_init_one_pchip()
373 pchip->wsm[1].csr = (hose->sg_pci->size - 1) & 0xfff00000; in tsunami_init_one_pchip()
374 pchip->tba[1].csr = virt_to_phys(hose->sg_pci->ptes); in tsunami_init_one_pchip()
Dcore_mcpcia.c413 hose->sg_pci = iommu_arena_new(hose, 0x40000000, in mcpcia_startup_hose()
423 *(vuip)MCPCIA_W1_BASE(mid) = hose->sg_pci->dma_base | 3; in mcpcia_startup_hose()
424 *(vuip)MCPCIA_W1_MASK(mid) = (hose->sg_pci->size - 1) & 0xfff00000; in mcpcia_startup_hose()
425 *(vuip)MCPCIA_T1_BASE(mid) = virt_to_phys(hose->sg_pci->ptes) >> 8; in mcpcia_startup_hose()
Dpci_iommu.c264 arena = hose->sg_pci; in pci_map_single_1()
350 arena = hose->sg_pci; in pci_unmap_single()
639 arena = hose->sg_pci; in pci_map_sg()
702 arena = hose->sg_pci; in pci_unmap_sg()
782 arena = hose->sg_pci; in pci_dma_supported()
Dpci.c97 struct pci_iommu_arena *pci = hose->sg_pci; in quirk_cypress()
284 u32 sg_base = hose->sg_pci ? hose->sg_pci->dma_base : ~0; in pcibios_fixup_bus()
Dcore_wildfire.c117 hose->sg_pci = iommu_arena_new(hose, 0xc0000000, 0x08000000, 0); in wildfire_init_hose()
133 pci->pci_window[3].wbase.csr = hose->sg_pci->dma_base | 3; in wildfire_init_hose()
134 pci->pci_window[3].wmask.csr = (hose->sg_pci->size - 1) & 0xfff00000; in wildfire_init_hose()
135 pci->pci_window[3].tbase.csr = virt_to_phys(hose->sg_pci->ptes); in wildfire_init_hose()
Dsys_jensen.c235 hose->sg_isa = hose->sg_pci = NULL; in jensen_init_arch()
Dcore_polaris.c205 hose->sg_isa = hose->sg_pci = NULL; in polaris_init_arch()
Dcore_apecs.c393 hose->sg_pci = NULL; in apecs_init_arch()
Dcore_irongate.c328 hose->sg_isa = hose->sg_pci = NULL; in irongate_init_arch()
Dcore_lca.c319 hose->sg_pci = NULL; in lca_init_arch()
Dsys_dp264.c559 hose_head->sg_pci->align_entry = 4; in webbrick_init_arch()
Dcore_t2.c401 hose->sg_pci = NULL; in t2_sg_map_window2()
Dcore_cia.c768 hose->sg_pci = NULL; in do_init_arch()
/linux-2.4.37.9/include/asm-alpha/
Dpci.h44 struct pci_iommu_arena *sg_pci; member