1 /************************************************************************/
2 /* Provides the Hypervisor PCI calls for iSeries Linux Parition. */
3 /* Copyright (C) 20yy <Wayne G Holm> <IBM Corporation> */
4 /* */
5 /* This program is free software; you can redistribute it and/or modify */
6 /* it under the terms of the GNU General Public License as published by */
7 /* the Free Software Foundation; either version 2 of the License, or */
8 /* (at your option) any later version. */
9 /* */
10 /* This program is distributed in the hope that it will be useful, */
11 /* but WITHOUT ANY WARRANTY; without even the implied warranty of */
12 /* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the */
13 /* GNU General Public License for more details. */
14 /* */
15 /* You should have received a copy of the GNU General Public License */
16 /* along with this program; if not, write to the: */
17 /* Free Software Foundation, Inc., */
18 /* 59 Temple Place, Suite 330, */
19 /* Boston, MA 02111-1307 USA */
20 /************************************************************************/
21 /* Change Activity: */
22 /* Created, Jan 9, 2001 */
23 /************************************************************************/
24 //============================================================================
25 // Header File Id
26 // Name______________: HvCallPci.H
27 //
28 // Description_______:
29 //
30 // This file contains the "hypervisor call" interface which is used to
31 // drive the hypervisor from SLIC.
32 //
33 //============================================================================
34
35 //-------------------------------------------------------------------
36 // Forward declarations
37 //-------------------------------------------------------------------
38
39 //-------------------------------------------------------------------
40 // Standard Includes
41 //-------------------------------------------------------------------
42 #ifndef _HVCALLSC_H
43 #include "HvCallSc.h"
44 #endif
45
46 #ifndef _HVTYPES_H
47 #include <asm/iSeries/HvTypes.h>
48 #endif
49
50 //-------------------------------------------------------------------
51 // Other Includes
52 //-------------------------------------------------------------------
53
54
55 //-----------------------------------------------------------------------------
56 // Constants
57 //-----------------------------------------------------------------------------
58 #ifndef _HVCALLPCI_H
59 #define _HVCALLPCI_H
60
61 struct HvCallPci_DsaAddr { // make sure this struct size is 64-bits total
62 u16 busNumber;
63 u8 subBusNumber;
64 u8 deviceId;
65 u8 barNumber;
66 u8 reserved[3];
67 };
68 union HvDsaMap {
69 u64 DsaAddr;
70 struct HvCallPci_DsaAddr Dsa;
71 };
72
73 struct HvCallPci_LoadReturn {
74 u64 rc;
75 u64 value;
76 };
77
78 enum HvCallPci_DeviceType {HvCallPci_NodeDevice = 1,
79 HvCallPci_SpDevice = 2,
80 HvCallPci_IopDevice = 3,
81 HvCallPci_BridgeDevice = 4,
82 HvCallPci_MultiFunctionDevice = 5,
83 HvCallPci_IoaDevice = 6
84 };
85
86
87 struct HvCallPci_DeviceInfo {
88 u32 deviceType; // See DeviceType enum for values
89 };
90
91 struct HvCallPci_BusUnitInfo {
92 u32 sizeReturned; // length of data returned
93 u32 deviceType; // see DeviceType enum for values
94 };
95
96 struct HvCallPci_BridgeInfo {
97 struct HvCallPci_BusUnitInfo busUnitInfo; // Generic bus unit info
98 u8 subBusNumber; // Bus number of secondary bus
99 u8 maxAgents; // Max idsels on secondary bus
100 u8 maxSubBusNumber; // Max Sub Bus
101 u8 logicalSlotNumber; // Logical Slot Number for IOA
102 };
103
104
105 // Maximum BusUnitInfo buffer size. Provided for clients so they can allocate
106 // a buffer big enough for any type of bus unit. Increase as needed.
107 enum {HvCallPci_MaxBusUnitInfoSize = 128};
108
109 struct HvCallPci_BarParms {
110 u64 vaddr;
111 u64 raddr;
112 u64 size;
113 u64 protectStart;
114 u64 protectEnd;
115 u64 relocationOffset;
116 u64 pciAddress;
117 u64 reserved[3];
118 };
119
120 enum HvCallPci_VpdType {
121 HvCallPci_BusVpd = 1,
122 HvCallPci_BusAdapterVpd = 2
123 };
124
125 #define HvCallPciConfigLoad8 HvCallPci + 0
126 #define HvCallPciConfigLoad16 HvCallPci + 1
127 #define HvCallPciConfigLoad32 HvCallPci + 2
128 #define HvCallPciConfigStore8 HvCallPci + 3
129 #define HvCallPciConfigStore16 HvCallPci + 4
130 #define HvCallPciConfigStore32 HvCallPci + 5
131 #define HvCallPciEoi HvCallPci + 16
132 #define HvCallPciGetBarParms HvCallPci + 18
133 #define HvCallPciMaskFisr HvCallPci + 20
134 #define HvCallPciUnmaskFisr HvCallPci + 21
135 #define HvCallPciSetSlotReset HvCallPci + 25
136 #define HvCallPciGetDeviceInfo HvCallPci + 27
137 #define HvCallPciGetCardVpd HvCallPci + 28
138 #define HvCallPciBarLoad8 HvCallPci + 40
139 #define HvCallPciBarLoad16 HvCallPci + 41
140 #define HvCallPciBarLoad32 HvCallPci + 42
141 #define HvCallPciBarLoad64 HvCallPci + 43
142 #define HvCallPciBarStore8 HvCallPci + 44
143 #define HvCallPciBarStore16 HvCallPci + 45
144 #define HvCallPciBarStore32 HvCallPci + 46
145 #define HvCallPciBarStore64 HvCallPci + 47
146 #define HvCallPciMaskInterrupts HvCallPci + 48
147 #define HvCallPciUnmaskInterrupts HvCallPci + 49
148 #define HvCallPciGetBusUnitInfo HvCallPci + 50
149
150 //============================================================================
HvCallPci_configLoad8(u16 busNumber,u8 subBusNumber,u8 deviceId,u32 offset,u8 * value)151 static inline u64 HvCallPci_configLoad8(u16 busNumber, u8 subBusNumber,
152 u8 deviceId, u32 offset,
153 u8 *value)
154 {
155 struct HvCallPci_DsaAddr dsa;
156 struct HvCallPci_LoadReturn retVal;
157
158 *((u64*)&dsa) = 0;
159
160 dsa.busNumber = busNumber;
161 dsa.subBusNumber = subBusNumber;
162 dsa.deviceId = deviceId;
163
164 HvCall3Ret16(HvCallPciConfigLoad8, &retVal, *(u64 *)&dsa, offset, 0);
165
166 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
167
168 *value = retVal.value;
169
170 return retVal.rc;
171 }
172 //============================================================================
HvCallPci_configLoad16(u16 busNumber,u8 subBusNumber,u8 deviceId,u32 offset,u16 * value)173 static inline u64 HvCallPci_configLoad16(u16 busNumber, u8 subBusNumber,
174 u8 deviceId, u32 offset,
175 u16 *value)
176 {
177 struct HvCallPci_DsaAddr dsa;
178 struct HvCallPci_LoadReturn retVal;
179
180 *((u64*)&dsa) = 0;
181
182 dsa.busNumber = busNumber;
183 dsa.subBusNumber = subBusNumber;
184 dsa.deviceId = deviceId;
185
186 HvCall3Ret16(HvCallPciConfigLoad16, &retVal, *(u64 *)&dsa, offset, 0);
187
188 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
189
190 *value = retVal.value;
191
192 return retVal.rc;
193 }
194 //============================================================================
HvCallPci_configLoad32(u16 busNumber,u8 subBusNumber,u8 deviceId,u32 offset,u32 * value)195 static inline u64 HvCallPci_configLoad32(u16 busNumber, u8 subBusNumber,
196 u8 deviceId, u32 offset,
197 u32 *value)
198 {
199 struct HvCallPci_DsaAddr dsa;
200 struct HvCallPci_LoadReturn retVal;
201
202 *((u64*)&dsa) = 0;
203
204 dsa.busNumber = busNumber;
205 dsa.subBusNumber = subBusNumber;
206 dsa.deviceId = deviceId;
207
208 HvCall3Ret16(HvCallPciConfigLoad32, &retVal, *(u64 *)&dsa, offset, 0);
209
210 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
211
212 *value = retVal.value;
213
214 return retVal.rc;
215 }
216 //============================================================================
HvCallPci_configStore8(u16 busNumber,u8 subBusNumber,u8 deviceId,u32 offset,u8 value)217 static inline u64 HvCallPci_configStore8(u16 busNumber, u8 subBusNumber,
218 u8 deviceId, u32 offset,
219 u8 value)
220 {
221 struct HvCallPci_DsaAddr dsa;
222 u64 retVal;
223
224 *((u64*)&dsa) = 0;
225
226 dsa.busNumber = busNumber;
227 dsa.subBusNumber = subBusNumber;
228 dsa.deviceId = deviceId;
229
230 retVal = HvCall4(HvCallPciConfigStore8, *(u64 *)&dsa, offset, value, 0);
231
232 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
233
234 return retVal;
235 }
236 //============================================================================
HvCallPci_configStore16(u16 busNumber,u8 subBusNumber,u8 deviceId,u32 offset,u16 value)237 static inline u64 HvCallPci_configStore16(u16 busNumber, u8 subBusNumber,
238 u8 deviceId, u32 offset,
239 u16 value)
240 {
241 struct HvCallPci_DsaAddr dsa;
242 u64 retVal;
243
244 *((u64*)&dsa) = 0;
245
246 dsa.busNumber = busNumber;
247 dsa.subBusNumber = subBusNumber;
248 dsa.deviceId = deviceId;
249
250 retVal = HvCall4(HvCallPciConfigStore16, *(u64 *)&dsa, offset, value, 0);
251
252 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
253
254 return retVal;
255 }
256 //============================================================================
HvCallPci_configStore32(u16 busNumber,u8 subBusNumber,u8 deviceId,u32 offset,u32 value)257 static inline u64 HvCallPci_configStore32(u16 busNumber, u8 subBusNumber,
258 u8 deviceId, u32 offset,
259 u32 value)
260 {
261 struct HvCallPci_DsaAddr dsa;
262 u64 retVal;
263
264 *((u64*)&dsa) = 0;
265
266 dsa.busNumber = busNumber;
267 dsa.subBusNumber = subBusNumber;
268 dsa.deviceId = deviceId;
269
270 retVal = HvCall4(HvCallPciConfigStore32, *(u64 *)&dsa, offset, value, 0);
271
272 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
273
274 return retVal;
275 }
276 //============================================================================
HvCallPci_barLoad8(u16 busNumberParm,u8 subBusParm,u8 deviceIdParm,u8 barNumberParm,u64 offsetParm,u8 * valueParm)277 static inline u64 HvCallPci_barLoad8(u16 busNumberParm,
278 u8 subBusParm,
279 u8 deviceIdParm,
280 u8 barNumberParm,
281 u64 offsetParm,
282 u8* valueParm)
283 {
284 struct HvCallPci_DsaAddr dsa;
285 struct HvCallPci_LoadReturn retVal;
286
287 *((u64*)&dsa) = 0;
288
289 dsa.busNumber = busNumberParm;
290 dsa.subBusNumber = subBusParm;
291 dsa.deviceId = deviceIdParm;
292 dsa.barNumber = barNumberParm;
293
294 HvCall3Ret16(HvCallPciBarLoad8, &retVal, *(u64 *)&dsa, offsetParm, 0);
295
296 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
297
298 *valueParm = retVal.value;
299
300 return retVal.rc;
301 }
302 //============================================================================
HvCallPci_barLoad16(u16 busNumberParm,u8 subBusParm,u8 deviceIdParm,u8 barNumberParm,u64 offsetParm,u16 * valueParm)303 static inline u64 HvCallPci_barLoad16(u16 busNumberParm,
304 u8 subBusParm,
305 u8 deviceIdParm,
306 u8 barNumberParm,
307 u64 offsetParm,
308 u16* valueParm)
309 {
310 struct HvCallPci_DsaAddr dsa;
311 struct HvCallPci_LoadReturn retVal;
312
313 *((u64*)&dsa) = 0;
314
315 dsa.busNumber = busNumberParm;
316 dsa.subBusNumber = subBusParm;
317 dsa.deviceId = deviceIdParm;
318 dsa.barNumber = barNumberParm;
319
320 HvCall3Ret16(HvCallPciBarLoad16, &retVal, *(u64 *)&dsa, offsetParm, 0);
321
322 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
323
324 *valueParm = retVal.value;
325
326 return retVal.rc;
327 }
328 //============================================================================
HvCallPci_barLoad32(u16 busNumberParm,u8 subBusParm,u8 deviceIdParm,u8 barNumberParm,u64 offsetParm,u32 * valueParm)329 static inline u64 HvCallPci_barLoad32(u16 busNumberParm,
330 u8 subBusParm,
331 u8 deviceIdParm,
332 u8 barNumberParm,
333 u64 offsetParm,
334 u32* valueParm)
335 {
336 struct HvCallPci_DsaAddr dsa;
337 struct HvCallPci_LoadReturn retVal;
338
339 *((u64*)&dsa) = 0;
340
341 dsa.busNumber = busNumberParm;
342 dsa.subBusNumber = subBusParm;
343 dsa.deviceId = deviceIdParm;
344 dsa.barNumber = barNumberParm;
345
346 HvCall3Ret16(HvCallPciBarLoad32, &retVal, *(u64 *)&dsa, offsetParm, 0);
347
348 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
349
350 *valueParm = retVal.value;
351
352 return retVal.rc;
353 }
354 //============================================================================
HvCallPci_barLoad64(u16 busNumberParm,u8 subBusParm,u8 deviceIdParm,u8 barNumberParm,u64 offsetParm,u64 * valueParm)355 static inline u64 HvCallPci_barLoad64(u16 busNumberParm,
356 u8 subBusParm,
357 u8 deviceIdParm,
358 u8 barNumberParm,
359 u64 offsetParm,
360 u64* valueParm)
361 {
362 struct HvCallPci_DsaAddr dsa;
363 struct HvCallPci_LoadReturn retVal;
364
365 *((u64*)&dsa) = 0;
366
367 dsa.busNumber = busNumberParm;
368 dsa.subBusNumber = subBusParm;
369 dsa.deviceId = deviceIdParm;
370 dsa.barNumber = barNumberParm;
371
372 HvCall3Ret16(HvCallPciBarLoad64, &retVal, *(u64 *)&dsa, offsetParm, 0);
373
374 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
375
376 *valueParm = retVal.value;
377
378 return retVal.rc;
379 }
380 //============================================================================
HvCallPci_barStore8(u16 busNumberParm,u8 subBusParm,u8 deviceIdParm,u8 barNumberParm,u64 offsetParm,u8 valueParm)381 static inline u64 HvCallPci_barStore8(u16 busNumberParm,
382 u8 subBusParm,
383 u8 deviceIdParm,
384 u8 barNumberParm,
385 u64 offsetParm,
386 u8 valueParm)
387 {
388 struct HvCallPci_DsaAddr dsa;
389 u64 retVal;
390
391 *((u64*)&dsa) = 0;
392
393 dsa.busNumber = busNumberParm;
394 dsa.subBusNumber = subBusParm;
395 dsa.deviceId = deviceIdParm;
396 dsa.barNumber = barNumberParm;
397
398 retVal = HvCall4(HvCallPciBarStore8, *(u64 *)&dsa, offsetParm, valueParm, 0);
399
400 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
401
402 return retVal;
403 }
404 //============================================================================
HvCallPci_barStore16(u16 busNumberParm,u8 subBusParm,u8 deviceIdParm,u8 barNumberParm,u64 offsetParm,u16 valueParm)405 static inline u64 HvCallPci_barStore16(u16 busNumberParm,
406 u8 subBusParm,
407 u8 deviceIdParm,
408 u8 barNumberParm,
409 u64 offsetParm,
410 u16 valueParm)
411 {
412 struct HvCallPci_DsaAddr dsa;
413 u64 retVal;
414
415 *((u64*)&dsa) = 0;
416
417 dsa.busNumber = busNumberParm;
418 dsa.subBusNumber = subBusParm;
419 dsa.deviceId = deviceIdParm;
420 dsa.barNumber = barNumberParm;
421
422 retVal = HvCall4(HvCallPciBarStore16, *(u64 *)&dsa, offsetParm, valueParm, 0);
423
424 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
425
426 return retVal;
427 }
428 //============================================================================
HvCallPci_barStore32(u16 busNumberParm,u8 subBusParm,u8 deviceIdParm,u8 barNumberParm,u64 offsetParm,u32 valueParm)429 static inline u64 HvCallPci_barStore32(u16 busNumberParm,
430 u8 subBusParm,
431 u8 deviceIdParm,
432 u8 barNumberParm,
433 u64 offsetParm,
434 u32 valueParm)
435 {
436 struct HvCallPci_DsaAddr dsa;
437 u64 retVal;
438
439 *((u64*)&dsa) = 0;
440
441 dsa.busNumber = busNumberParm;
442 dsa.subBusNumber = subBusParm;
443 dsa.deviceId = deviceIdParm;
444 dsa.barNumber = barNumberParm;
445
446 retVal = HvCall4(HvCallPciBarStore32, *(u64 *)&dsa, offsetParm, valueParm, 0);
447
448 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
449
450 return retVal;
451 }
452 //============================================================================
HvCallPci_barStore64(u16 busNumberParm,u8 subBusParm,u8 deviceIdParm,u8 barNumberParm,u64 offsetParm,u64 valueParm)453 static inline u64 HvCallPci_barStore64(u16 busNumberParm,
454 u8 subBusParm,
455 u8 deviceIdParm,
456 u8 barNumberParm,
457 u64 offsetParm,
458 u64 valueParm)
459 {
460 struct HvCallPci_DsaAddr dsa;
461 u64 retVal;
462
463 *((u64*)&dsa) = 0;
464
465 dsa.busNumber = busNumberParm;
466 dsa.subBusNumber = subBusParm;
467 dsa.deviceId = deviceIdParm;
468 dsa.barNumber = barNumberParm;
469
470 retVal = HvCall4(HvCallPciBarStore64, *(u64 *)&dsa, offsetParm, valueParm, 0);
471
472 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
473
474 return retVal;
475 }
476 //============================================================================
HvCallPci_eoi(u16 busNumberParm,u8 subBusParm,u8 deviceIdParm)477 static inline u64 HvCallPci_eoi(u16 busNumberParm,
478 u8 subBusParm,
479 u8 deviceIdParm)
480 {
481 struct HvCallPci_DsaAddr dsa;
482 struct HvCallPci_LoadReturn retVal;
483
484 *((u64*)&dsa) = 0;
485
486 dsa.busNumber = busNumberParm;
487 dsa.subBusNumber = subBusParm;
488 dsa.deviceId = deviceIdParm;
489
490 HvCall1Ret16(HvCallPciEoi, &retVal, *(u64*)&dsa);
491
492 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
493
494 return retVal.rc;
495 }
496 //============================================================================
HvCallPci_getBarParms(u16 busNumberParm,u8 subBusParm,u8 deviceIdParm,u8 barNumberParm,u64 parms,u32 sizeofParms)497 static inline u64 HvCallPci_getBarParms(u16 busNumberParm,
498 u8 subBusParm,
499 u8 deviceIdParm,
500 u8 barNumberParm,
501 u64 parms,
502 u32 sizeofParms)
503 {
504 struct HvCallPci_DsaAddr dsa;
505 u64 retVal;
506
507 *((u64*)&dsa) = 0;
508
509 dsa.busNumber = busNumberParm;
510 dsa.subBusNumber = subBusParm;
511 dsa.deviceId = deviceIdParm;
512 dsa.barNumber = barNumberParm;
513
514 retVal = HvCall3(HvCallPciGetBarParms, *(u64*)&dsa, parms, sizeofParms);
515
516 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
517
518 return retVal;
519 }
520 //============================================================================
HvCallPci_maskFisr(u16 busNumberParm,u8 subBusParm,u8 deviceIdParm,u64 fisrMask)521 static inline u64 HvCallPci_maskFisr(u16 busNumberParm,
522 u8 subBusParm,
523 u8 deviceIdParm,
524 u64 fisrMask)
525 {
526 struct HvCallPci_DsaAddr dsa;
527 u64 retVal;
528
529 *((u64*)&dsa) = 0;
530
531 dsa.busNumber = busNumberParm;
532 dsa.subBusNumber = subBusParm;
533 dsa.deviceId = deviceIdParm;
534
535 retVal = HvCall2(HvCallPciMaskFisr, *(u64*)&dsa, fisrMask);
536
537 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
538
539 return retVal;
540 }
541 //============================================================================
HvCallPci_unmaskFisr(u16 busNumberParm,u8 subBusParm,u8 deviceIdParm,u64 fisrMask)542 static inline u64 HvCallPci_unmaskFisr(u16 busNumberParm,
543 u8 subBusParm,
544 u8 deviceIdParm,
545 u64 fisrMask)
546 {
547 struct HvCallPci_DsaAddr dsa;
548 u64 retVal;
549
550 *((u64*)&dsa) = 0;
551
552 dsa.busNumber = busNumberParm;
553 dsa.subBusNumber = subBusParm;
554 dsa.deviceId = deviceIdParm;
555
556 retVal = HvCall2(HvCallPciUnmaskFisr, *(u64*)&dsa, fisrMask);
557
558 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
559
560 return retVal;
561 }
562 //============================================================================
HvCallPci_setSlotReset(u16 busNumberParm,u8 subBusParm,u8 deviceIdParm,u64 onNotOff)563 static inline u64 HvCallPci_setSlotReset(u16 busNumberParm,
564 u8 subBusParm,
565 u8 deviceIdParm,
566 u64 onNotOff)
567 {
568 struct HvCallPci_DsaAddr dsa;
569 u64 retVal;
570
571 *((u64*)&dsa) = 0;
572
573 dsa.busNumber = busNumberParm;
574 dsa.subBusNumber = subBusParm;
575 dsa.deviceId = deviceIdParm;
576
577 retVal = HvCall2(HvCallPciSetSlotReset, *(u64*)&dsa, onNotOff);
578
579 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
580
581 return retVal;
582 }
583 //============================================================================
HvCallPci_getDeviceInfo(u16 busNumberParm,u8 subBusParm,u8 deviceNumberParm,u64 parms,u32 sizeofParms)584 static inline u64 HvCallPci_getDeviceInfo(u16 busNumberParm,
585 u8 subBusParm,
586 u8 deviceNumberParm,
587 u64 parms,
588 u32 sizeofParms)
589 {
590 struct HvCallPci_DsaAddr dsa;
591 u64 retVal;
592
593 *((u64*)&dsa) = 0;
594
595 dsa.busNumber = busNumberParm;
596 dsa.subBusNumber = subBusParm;
597 dsa.deviceId = deviceNumberParm << 4;
598
599 retVal = HvCall3(HvCallPciGetDeviceInfo, *(u64*)&dsa, parms, sizeofParms);
600
601 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
602
603 return retVal;
604 }
605 //============================================================================
HvCallPci_maskInterrupts(u16 busNumberParm,u8 subBusParm,u8 deviceIdParm,u64 interruptMask)606 static inline u64 HvCallPci_maskInterrupts(u16 busNumberParm,
607 u8 subBusParm,
608 u8 deviceIdParm,
609 u64 interruptMask)
610 {
611 struct HvCallPci_DsaAddr dsa;
612 u64 retVal;
613
614 *((u64*)&dsa) = 0;
615
616 dsa.busNumber = busNumberParm;
617 dsa.subBusNumber = subBusParm;
618 dsa.deviceId = deviceIdParm;
619
620 retVal = HvCall2(HvCallPciMaskInterrupts, *(u64*)&dsa, interruptMask);
621
622 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
623
624 return retVal;
625 }
626 //============================================================================
HvCallPci_unmaskInterrupts(u16 busNumberParm,u8 subBusParm,u8 deviceIdParm,u64 interruptMask)627 static inline u64 HvCallPci_unmaskInterrupts(u16 busNumberParm,
628 u8 subBusParm,
629 u8 deviceIdParm,
630 u64 interruptMask)
631 {
632 struct HvCallPci_DsaAddr dsa;
633 u64 retVal;
634
635 *((u64*)&dsa) = 0;
636
637 dsa.busNumber = busNumberParm;
638 dsa.subBusNumber = subBusParm;
639 dsa.deviceId = deviceIdParm;
640
641 retVal = HvCall2(HvCallPciUnmaskInterrupts, *(u64*)&dsa, interruptMask);
642
643 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
644
645 return retVal;
646 }
647 //============================================================================
648
HvCallPci_getBusUnitInfo(u16 busNumberParm,u8 subBusParm,u8 deviceIdParm,u64 parms,u32 sizeofParms)649 static inline u64 HvCallPci_getBusUnitInfo(u16 busNumberParm,
650 u8 subBusParm,
651 u8 deviceIdParm,
652 u64 parms,
653 u32 sizeofParms)
654 {
655 struct HvCallPci_DsaAddr dsa;
656 u64 retVal;
657
658 *((u64*)&dsa) = 0;
659
660 dsa.busNumber = busNumberParm;
661 dsa.subBusNumber = subBusParm;
662 dsa.deviceId = deviceIdParm;
663
664 retVal = HvCall3(HvCallPciGetBusUnitInfo, *(u64*)&dsa, parms, sizeofParms);
665
666 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
667
668 return retVal;
669 }
670 //============================================================================
671
HvCallPci_getBusVpd(u16 busNumParm,u64 destParm,u16 sizeParm)672 static inline int HvCallPci_getBusVpd(u16 busNumParm, u64 destParm, u16 sizeParm)
673 {
674 int xRetSize;
675 u64 xRc = HvCall4(HvCallPciGetCardVpd, busNumParm, destParm, sizeParm, HvCallPci_BusVpd);
676 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
677 if (xRc == -1)
678 xRetSize = -1;
679 else
680 xRetSize = xRc & 0xFFFF;
681 return xRetSize;
682 }
683 //============================================================================
684
HvCallPci_getBusAdapterVpd(u16 busNumParm,u64 destParm,u16 sizeParm)685 static inline int HvCallPci_getBusAdapterVpd(u16 busNumParm, u64 destParm, u16 sizeParm)
686 {
687 int xRetSize;
688 u64 xRc = HvCall4(HvCallPciGetCardVpd, busNumParm, destParm, sizeParm, HvCallPci_BusAdapterVpd);
689 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
690 if (xRc == -1)
691 xRetSize = -1;
692 else
693 xRetSize = xRc & 0xFFFF;
694 return xRetSize;
695 }
696 //============================================================================
697 #endif // _HVCALLPCI_H
698