Searched refs:outpw (Results 1 – 7 of 7) sorted by relevance
164 outpw(FM_A(FM_CMDREG1),FM_IRMEMWO) ;202 outpw(FM_A(FM_RPR1),smc->hw.fp.fifo.rx1_fifo_start) ; /* RPR1 */203 outpw(FM_A(FM_SWPR1),smc->hw.fp.fifo.rx1_fifo_start) ; /* SWPR1 */204 outpw(FM_A(FM_WPR1),smc->hw.fp.fifo.rx1_fifo_start) ; /* WPR1 */205 outpw(FM_A(FM_EARV1),smc->hw.fp.fifo.tx_s_start-1) ; /* EARV1 */211 outpw(FM_A(FM_RPR2),smc->hw.fp.fifo.rx2_fifo_start) ;212 outpw(FM_A(FM_SWPR2),smc->hw.fp.fifo.rx2_fifo_start) ;213 outpw(FM_A(FM_WPR2),smc->hw.fp.fifo.rx2_fifo_start) ;214 outpw(FM_A(FM_EARV2),smc->hw.fp.fifo.rbc_ram_end-1) ;217 outpw(FM_A(FM_RPR2),smc->hw.fp.fifo.rbc_ram_end-1) ;[all …]
99 outpw(ADDR(B2_TI_CRTL), TIM_START) ; /* Start timer. */127 outpw(ADDR(B2_TI_CRTL), TIM_STOP) ;128 outpw(ADDR(B2_TI_CRTL), TIM_CL_IRQ) ;248 outpw(ADDR(B2_TI_CRTL), TIM_STOP) ;251 outpw(ADDR(B2_TI_CRTL), TIM_START) ;
144 outpw(CSR_A,0) ; /* reset for all chips */151 outpw(CSR_A,CS_CRESET) ;154 outpw(CSR_A,0) ; /* reset for all chips */157 outpw(CSR_A,CS_CRESET) ;159 outpw(CSR_A,CS_CRESET | smc->hw.led) ;186 outpw(LEDR_A,LED_1) ; /* yellow */192 outpw(FM_A(FM_MDREG1),FM_MINIT) ;208 outpw(PCI_C(PCI_STATUS), word | PCI_ERRBITS) ;259 outpw(CSR_A,0) ; /* reset for all chips */262 outpw(CSR_A,0) ; /* reset for all chips */[all …]
443 outpw(PLC(p,PL_CNTRL_B),0) ;444 outpw(PLC(p,PL_CNTRL_B),PL_PCM_STOP) ;445 outpw(PLC(p,PL_CNTRL_A),0) ;456 outpw(PLC(p,PL_CNTRL_C),PLCS_CONTROL_C_S) ;458 outpw(PLC(p,PL_T_FOT_ASS),PLCS_FASSERT_S) ;459 outpw(PLC(p,PL_T_FOT_DEASS),PLCS_FDEASSERT_S) ;463 outpw(PLC(p,PL_CNTRL_C),PLCS_CONTROL_C_U) ;465 outpw(PLC(p,PL_T_FOT_ASS),PLCS_FASSERT_U) ;466 outpw(PLC(p,PL_T_FOT_DEASS),PLCS_FDEASSERT_U) ;475 outpw(PLC(p,pltm[i].timer),pltm[i].para) ;[all …]
240 #define CLI_FBI() outpw(CSR_A,(inpw(CSR_A)&\243 #define CLI_FBI() outpw(CSR_A,(l_inpw(CSR_A)&\247 #define CLI_FBI(smc) outpw(CSR_AS(smc),(inpw(CSR_AS(smc))&\252 #define STI_FBI() outpw(CSR_A,(inpw(CSR_A)&\255 #define STI_FBI(smc) outpw(CSR_AS(smc),(inpw(CSR_AS(smc))&\596 #define GET_PAGE(bank) outpw(PAGE_RG_A,(inpw(PAGE_RG_A) &\599 outpw(PAGE_RG_A, \603 outpw(PAGE_RG_A,(inpw(PAGE_RG_A) & POS_PAGE)); \736 #define GET_PAGE(i) outpw(PGR_A,(int)(i))740 #define VPP_OFF() outpw(CSR_A,(inpw(CSR_A) & (CS_CRESET|CS_BYPASS)))[all …]
37 #define outpw(p,s) outw(s,p) macro44 #define outpw(a,v) writew(v, a) macro
925 #define outpw(port, word) outw((word), (port)) macro1950 #define AscSetChipCfgLsw(port, data) outpw((port)+IOP_CONFIG_LOW, data)1951 #define AscSetChipCfgMsw(port, data) outpw((port)+IOP_CONFIG_HIGH, data)1955 #define AscSetChipEEPData(port, data) outpw((port)+IOP_EEP_DATA, data)1957 #define AscSetChipLramAddr(port, addr) outpw((PortAddr)((port)+IOP_RAM_ADDR), addr)1959 #define AscSetChipLramData(port, data) outpw((port)+IOP_RAM_DATA, data)1963 #define AscSetChipStatus(port, cs_val) outpw((port)+IOP_STATUS, cs_val)1968 #define AscSetPCAddr(port, data) outpw((port)+IOP_REG_PC, data)1975 #define AscWriteChipAX(port, data) outpw((port)+IOP_REG_AX, data)1979 #define AscWriteChipIH(port, data) outpw((port)+IOP_REG_IH, data)[all …]