/linux-2.4.37.9/drivers/isdn/hisax/ |
D | hscx_irq.c | 17 waitforCEC(struct IsdnCardState *cs, int hscx) in waitforCEC() argument 21 while ((READHSCX(cs, hscx, HSCX_STAR) & 0x04) && to) { in waitforCEC() 31 waitforXFW(struct IsdnCardState *cs, int hscx) in waitforXFW() argument 35 while ((!(READHSCX(cs, hscx, HSCX_STAR) & 0x44) == 0x40) && to) { in waitforXFW() 44 WriteHSCXCMDR(struct IsdnCardState *cs, int hscx, u_char data) in WriteHSCXCMDR() argument 50 waitforCEC(cs, hscx); in WriteHSCXCMDR() 51 WRITEHSCX(cs, hscx, HSCX_CMDR, data); in WriteHSCXCMDR() 67 if (bcs->hw.hscx.rcvidx + count > HSCX_BUFMAX) { in hscx_empty_fifo() 70 WriteHSCXCMDR(cs, bcs->hw.hscx.hscx, 0x80); in hscx_empty_fifo() 71 bcs->hw.hscx.rcvidx = 0; in hscx_empty_fifo() [all …]
|
D | hscx.c | 44 int hscx = bcs->hw.hscx.hscx; in modehscx() local 48 'A' + hscx, mode, bc); in modehscx() 51 cs->BC_Write_Reg(cs, hscx, HSCX_XAD1, 0xFF); in modehscx() 52 cs->BC_Write_Reg(cs, hscx, HSCX_XAD2, 0xFF); in modehscx() 53 cs->BC_Write_Reg(cs, hscx, HSCX_RAH2, 0xFF); in modehscx() 54 cs->BC_Write_Reg(cs, hscx, HSCX_XBCH, 0x0); in modehscx() 55 cs->BC_Write_Reg(cs, hscx, HSCX_RLCR, 0x0); in modehscx() 56 cs->BC_Write_Reg(cs, hscx, HSCX_CCR1, in modehscx() 58 cs->BC_Write_Reg(cs, hscx, HSCX_CCR2, 0x30); in modehscx() 59 cs->BC_Write_Reg(cs, hscx, HSCX_XCCR, 7); in modehscx() [all …]
|
D | jade_irq.c | 57 if (bcs->hw.hscx.rcvidx + count > HSCX_BUFMAX) { in jade_empty_fifo() 60 WriteJADECMDR(cs, bcs->hw.hscx.hscx, jade_HDLC_RCMD, jadeRCMD_RMC); in jade_empty_fifo() 61 bcs->hw.hscx.rcvidx = 0; in jade_empty_fifo() 64 ptr = bcs->hw.hscx.rcvbuf + bcs->hw.hscx.rcvidx; in jade_empty_fifo() 65 bcs->hw.hscx.rcvidx += count; in jade_empty_fifo() 68 READJADEFIFO(cs, bcs->hw.hscx.hscx, ptr, count); in jade_empty_fifo() 69 WriteJADECMDR(cs, bcs->hw.hscx.hscx, jade_HDLC_RCMD, jadeRCMD_RMC); in jade_empty_fifo() 75 bcs->hw.hscx.hscx ? 'B' : 'A', count); in jade_empty_fifo() 105 waitforXFW(cs, bcs->hw.hscx.hscx); in jade_fill_fifo() 111 bcs->hw.hscx.count += count; in jade_fill_fifo() [all …]
|
D | ipacx.c | 52 static void bch_int(struct IsdnCardState *cs, u_char hscx); 57 static void __devinit bch_init(struct IsdnCardState *cs, int hscx); 566 st->l1.bcs->hw.hscx.count = 0; in bch_l2l1() 578 st->l1.bcs->hw.hscx.count = 0; in bch_l2l1() 622 u_char *ptr, hscx; in bch_empty_fifo() local 628 hscx = bcs->hw.hscx.hscx; in bch_empty_fifo() 633 if (bcs->hw.hscx.rcvidx + count > HSCX_BUFMAX) { in bch_empty_fifo() 636 cs->BC_Write_Reg(cs, hscx, IPACX_CMDRB, 0x80); // RMC in bch_empty_fifo() 637 bcs->hw.hscx.rcvidx = 0; in bch_empty_fifo() 644 ptr = bcs->hw.hscx.rcvbuf + bcs->hw.hscx.rcvidx; in bch_empty_fifo() [all …]
|
D | teles3.c | 82 ReadHSCX(struct IsdnCardState *cs, int hscx, u_char offset) in ReadHSCX() argument 84 return (readreg(cs->hw.teles3.hscx[hscx], offset)); in ReadHSCX() 88 WriteHSCX(struct IsdnCardState *cs, int hscx, u_char offset, u_char value) in WriteHSCX() argument 90 writereg(cs->hw.teles3.hscx[hscx], offset, value); in WriteHSCX() 97 #define READHSCX(cs, nr, reg) readreg(cs->hw.teles3.hscx[nr], reg) 98 #define WRITEHSCX(cs, nr, reg, data) writereg(cs->hw.teles3.hscx[nr], reg, data) 116 val = readreg(cs->hw.teles3.hscx[1], HSCX_ISTA); in teles3_interrupt() 125 val = readreg(cs->hw.teles3.hscx[1], HSCX_ISTA); in teles3_interrupt() 139 writereg(cs->hw.teles3.hscx[0], HSCX_MASK, 0xFF); in teles3_interrupt() 140 writereg(cs->hw.teles3.hscx[1], HSCX_MASK, 0xFF); in teles3_interrupt() [all …]
|
D | diva.c | 196 ReadHSCX(struct IsdnCardState *cs, int hscx, u_char offset) in ReadHSCX() argument 199 cs->hw.diva.hscx, offset + (hscx ? 0x40 : 0))); in ReadHSCX() 203 WriteHSCX(struct IsdnCardState *cs, int hscx, u_char offset, u_char value) in WriteHSCX() argument 206 cs->hw.diva.hscx, offset + (hscx ? 0x40 : 0), value); in WriteHSCX() 236 MemReadHSCX(struct IsdnCardState *cs, int hscx, u_char offset) in MemReadHSCX() argument 238 return(memreadreg(cs->hw.diva.cfg_reg, offset + (hscx ? 0x40 : 0))); in MemReadHSCX() 242 MemWriteHSCX(struct IsdnCardState *cs, int hscx, u_char offset, u_char value) in MemWriteHSCX() argument 244 memwritereg(cs->hw.diva.cfg_reg, offset + (hscx ? 0x40 : 0), value); in MemWriteHSCX() 275 MemReadHSCX_IPACX(struct IsdnCardState *cs, int hscx, u_char offset) in MemReadHSCX_IPACX() argument 278 (hscx ? IPACX_OFF_B2 : IPACX_OFF_B1))); in MemReadHSCX_IPACX() [all …]
|
D | avm_a1.c | 82 ReadHSCX(struct IsdnCardState *cs, int hscx, u_char offset) in ReadHSCX() argument 84 return (readreg(cs->hw.avm.hscx[hscx], offset)); in ReadHSCX() 88 WriteHSCX(struct IsdnCardState *cs, int hscx, u_char offset, u_char value) in WriteHSCX() argument 90 writereg(cs->hw.avm.hscx[hscx], offset, value); in WriteHSCX() 97 #define READHSCX(cs, nr, reg) readreg(cs->hw.avm.hscx[nr], reg) 98 #define WRITEHSCX(cs, nr, reg, data) writereg(cs->hw.avm.hscx[nr], reg, data) 121 val = readreg(cs->hw.avm.hscx[1], HSCX_ISTA); in avm_a1_interrupt() 131 writereg(cs->hw.avm.hscx[0], HSCX_MASK, 0xFF); in avm_a1_interrupt() 132 writereg(cs->hw.avm.hscx[1], HSCX_MASK, 0xFF); in avm_a1_interrupt() 135 writereg(cs->hw.avm.hscx[0], HSCX_MASK, 0x0); in avm_a1_interrupt() [all …]
|
D | Makefile | 27 hisax-objs-$(CONFIG_HISAX_16_0) += teles0.o isac.o arcofi.o hscx.o 28 hisax-objs-$(CONFIG_HISAX_16_3) += teles3.o isac.o arcofi.o hscx.o 29 hisax-objs-$(CONFIG_HISAX_TELESPCI) += telespci.o isac.o arcofi.o hscx.o 30 hisax-objs-$(CONFIG_HISAX_S0BOX) += s0box.o isac.o arcofi.o hscx.o 31 hisax-objs-$(CONFIG_HISAX_AVM_A1) += avm_a1.o isac.o arcofi.o hscx.o 32 hisax-objs-$(CONFIG_HISAX_AVM_A1_PCMCIA) += avm_a1p.o isac.o arcofi.o hscx.o 34 hisax-objs-$(CONFIG_HISAX_ELSA) += elsa.o isac.o arcofi.o hscx.o 35 hisax-objs-$(CONFIG_HISAX_IX1MICROR2) += ix1_micro.o isac.o arcofi.o hscx.o 36 hisax-objs-$(CONFIG_HISAX_DIEHLDIVA) += diva.o isac.o arcofi.o hscx.o ipacx.o 37 hisax-objs-$(CONFIG_HISAX_ASUSCOM) += asuscom.o isac.o arcofi.o hscx.o [all …]
|
D | s0box.c | 131 ReadHSCX(struct IsdnCardState *cs, int hscx, u_char offset) in ReadHSCX() argument 133 return (readreg(cs->hw.teles3.cfg_reg, cs->hw.teles3.hscx[hscx], offset)); in ReadHSCX() 137 WriteHSCX(struct IsdnCardState *cs, int hscx, u_char offset, u_char value) in WriteHSCX() argument 139 writereg(cs->hw.teles3.cfg_reg, cs->hw.teles3.hscx[hscx], offset, value); in WriteHSCX() 146 #define READHSCX(cs, nr, reg) readreg(cs->hw.teles3.cfg_reg, cs->hw.teles3.hscx[nr], reg) 147 #define WRITEHSCX(cs, nr, reg, data) writereg(cs->hw.teles3.cfg_reg, cs->hw.teles3.hscx[nr], reg, d… 165 val = readreg(cs->hw.teles3.cfg_reg, cs->hw.teles3.hscx[1], HSCX_ISTA); in s0box_interrupt() 174 val = readreg(cs->hw.teles3.cfg_reg, cs->hw.teles3.hscx[1], HSCX_ISTA); in s0box_interrupt() 188 writereg(cs->hw.teles3.cfg_reg, cs->hw.teles3.hscx[0], HSCX_MASK, 0xFF); in s0box_interrupt() 189 writereg(cs->hw.teles3.cfg_reg, cs->hw.teles3.hscx[1], HSCX_MASK, 0xFF); in s0box_interrupt() [all …]
|
D | gazel.c | 181 ReadHSCXfifo(struct IsdnCardState *cs, int hscx, u_char * data, int size) in ReadHSCXfifo() argument 186 read_fifo(cs->hw.gazel.hscxfifo[hscx], data, size); in ReadHSCXfifo() 190 read_fifo_ipac(cs->hw.gazel.ipac, hscx * 0x40, data, size); in ReadHSCXfifo() 196 WriteHSCXfifo(struct IsdnCardState *cs, int hscx, u_char * data, int size) in WriteHSCXfifo() argument 201 write_fifo(cs->hw.gazel.hscxfifo[hscx], data, size); in WriteHSCXfifo() 205 write_fifo_ipac(cs->hw.gazel.ipac, hscx * 0x40, data, size); in WriteHSCXfifo() 211 ReadHSCX(struct IsdnCardState *cs, int hscx, u_char offset) in ReadHSCX() argument 219 return (readreg(cs->hw.gazel.hscx[hscx], off2)); in ReadHSCX() 222 return (readreg_ipac(cs->hw.gazel.ipac, hscx * 0x40 + off2)); in ReadHSCX() 228 WriteHSCX(struct IsdnCardState *cs, int hscx, u_char offset, u_char value) in WriteHSCX() argument [all …]
|
D | mic.c | 106 ReadHSCX(struct IsdnCardState *cs, int hscx, u_char offset) in ReadHSCX() argument 109 cs->hw.mic.hscx, offset + (hscx ? 0x40 : 0))); in ReadHSCX() 113 WriteHSCX(struct IsdnCardState *cs, int hscx, u_char offset, u_char value) in WriteHSCX() argument 116 cs->hw.mic.hscx, offset + (hscx ? 0x40 : 0), value); in WriteHSCX() 124 cs->hw.mic.hscx, reg + (nr ? 0x40 : 0)) 126 cs->hw.mic.hscx, reg + (nr ? 0x40 : 0), data) 129 cs->hw.mic.hscx, (nr ? 0x40 : 0), ptr, cnt) 132 cs->hw.mic.hscx, (nr ? 0x40 : 0), ptr, cnt) 146 val = readreg(cs->hw.mic.adr, cs->hw.mic.hscx, HSCX_ISTA + 0x40); in mic_interrupt() 154 val = readreg(cs->hw.mic.adr, cs->hw.mic.hscx, HSCX_ISTA + 0x40); in mic_interrupt() [all …]
|
D | saphir.c | 106 ReadHSCX(struct IsdnCardState *cs, int hscx, u_char offset) in ReadHSCX() argument 108 return (readreg(cs->hw.saphir.ale, cs->hw.saphir.hscx, in ReadHSCX() 109 offset + (hscx ? 0x40 : 0))); in ReadHSCX() 113 WriteHSCX(struct IsdnCardState *cs, int hscx, u_char offset, u_char value) in WriteHSCX() argument 115 writereg(cs->hw.saphir.ale, cs->hw.saphir.hscx, in WriteHSCX() 116 offset + (hscx ? 0x40 : 0), value); in WriteHSCX() 120 cs->hw.saphir.hscx, reg + (nr ? 0x40 : 0)) 122 cs->hw.saphir.hscx, reg + (nr ? 0x40 : 0), data) 125 cs->hw.saphir.hscx, (nr ? 0x40 : 0), ptr, cnt) 128 cs->hw.saphir.hscx, (nr ? 0x40 : 0), ptr, cnt) [all …]
|
D | ix1_micro.c | 114 ReadHSCX(struct IsdnCardState *cs, int hscx, u_char offset) in ReadHSCX() argument 117 cs->hw.ix1.hscx, offset + (hscx ? 0x40 : 0))); in ReadHSCX() 121 WriteHSCX(struct IsdnCardState *cs, int hscx, u_char offset, u_char value) in WriteHSCX() argument 124 cs->hw.ix1.hscx, offset + (hscx ? 0x40 : 0), value); in WriteHSCX() 128 cs->hw.ix1.hscx, reg + (nr ? 0x40 : 0)) 130 cs->hw.ix1.hscx, reg + (nr ? 0x40 : 0), data) 133 cs->hw.ix1.hscx, (nr ? 0x40 : 0), ptr, cnt) 136 cs->hw.ix1.hscx, (nr ? 0x40 : 0), ptr, cnt) 150 val = readreg(cs->hw.ix1.hscx_ale, cs->hw.ix1.hscx, HSCX_ISTA + 0x40); in ix1micro_interrupt() 158 val = readreg(cs->hw.ix1.hscx_ale, cs->hw.ix1.hscx, HSCX_ISTA + 0x40); in ix1micro_interrupt() [all …]
|
D | jade.c | 86 int jade = bcs->hw.hscx.hscx; in modejade() 162 st->l1.bcs->hw.hscx.count = 0; in jade_l2l1() 174 st->l1.bcs->hw.hscx.count = 0; in jade_l2l1() 206 if (bcs->hw.hscx.rcvbuf) { in close_jadestate() 207 kfree(bcs->hw.hscx.rcvbuf); in close_jadestate() 208 bcs->hw.hscx.rcvbuf = NULL; in close_jadestate() 228 if (!(bcs->hw.hscx.rcvbuf = kmalloc(HSCX_BUFMAX, GFP_ATOMIC))) { in open_jadestate() 238 kfree(bcs->hw.hscx.rcvbuf); in open_jadestate() 239 bcs->hw.hscx.rcvbuf = NULL; in open_jadestate() 248 bcs->hw.hscx.rcvidx = 0; in open_jadestate() [all …]
|
D | niccy.c | 121 ReadHSCX(struct IsdnCardState *cs, int hscx, u_char offset) in ReadHSCX() argument 124 cs->hw.niccy.hscx, offset + (hscx ? 0x40 : 0))); in ReadHSCX() 128 WriteHSCX(struct IsdnCardState *cs, int hscx, u_char offset, u_char value) in WriteHSCX() argument 131 cs->hw.niccy.hscx, offset + (hscx ? 0x40 : 0), value); in WriteHSCX() 135 cs->hw.niccy.hscx, reg + (nr ? 0x40 : 0)) 137 cs->hw.niccy.hscx, reg + (nr ? 0x40 : 0), data) 140 cs->hw.niccy.hscx, (nr ? 0x40 : 0), ptr, cnt) 143 cs->hw.niccy.hscx, (nr ? 0x40 : 0), ptr, cnt) 164 val = readreg(cs->hw.niccy.hscx_ale, cs->hw.niccy.hscx, HSCX_ISTA + 0x40); in niccy_interrupt() 172 val = readreg(cs->hw.niccy.hscx_ale, cs->hw.niccy.hscx, HSCX_ISTA + 0x40); in niccy_interrupt() [all …]
|
D | sportster.c | 80 ReadHSCX(struct IsdnCardState *cs, int hscx, u_char offset) in ReadHSCX() argument 82 return (bytein(calc_off(cs->hw.spt.hscx[hscx], offset))); in ReadHSCX() 86 WriteHSCX(struct IsdnCardState *cs, int hscx, u_char offset, u_char value) in WriteHSCX() argument 88 byteout(calc_off(cs->hw.spt.hscx[hscx], offset), value); in WriteHSCX() 95 #define READHSCX(cs, nr, reg) bytein(calc_off(cs->hw.spt.hscx[nr], reg)) 96 #define WRITEHSCX(cs, nr, reg, data) byteout(calc_off(cs->hw.spt.hscx[nr], reg), data) 97 #define READHSCXFIFO(cs, nr, ptr, cnt) read_fifo(cs->hw.spt.hscx[nr], ptr, cnt) 98 #define WRITEHSCXFIFO(cs, nr, ptr, cnt) write_fifo(cs->hw.spt.hscx[nr], ptr, cnt) 230 cs->hw.spt.hscx[0] = cs->hw.spt.cfg_reg + SPORTSTER_HSCXA; in setup_sportster() 231 cs->hw.spt.hscx[1] = cs->hw.spt.cfg_reg + SPORTSTER_HSCXB; in setup_sportster()
|
D | telespci.c | 80 readhscx(unsigned long adr, int hscx, u_char off) in readhscx() argument 86 writel(WRITE_ADDR_HSCX | ((hscx ? 0x40:0) + off), adr + 0x200); in readhscx() 96 writehscx(unsigned long adr, int hscx, u_char off, u_char data) in writehscx() argument 102 writel(WRITE_ADDR_HSCX | ((hscx ? 0x40:0) + off), adr + 0x200); in writehscx() 146 read_fifo_hscx(unsigned long adr, int hscx, u_char * data, int size) in read_fifo_hscx() argument 155 writel(WRITE_ADDR_HSCX |(hscx ? 0x5F:0x1F), adr + 0x200); in read_fifo_hscx() 164 write_fifo_hscx(unsigned long adr, int hscx, u_char * data, int size) in write_fifo_hscx() argument 173 writel(WRITE_ADDR_HSCX |(hscx ? 0x5F:0x1F), adr + 0x200); in write_fifo_hscx() 208 ReadHSCX(struct IsdnCardState *cs, int hscx, u_char offset) in ReadHSCX() argument 210 return (readhscx(cs->hw.teles0.membase, hscx, offset)); in ReadHSCX() [all …]
|
D | sedlbauer.c | 216 ReadHSCX(struct IsdnCardState *cs, int hscx, u_char offset) in ReadHSCX() argument 219 cs->hw.sedl.hscx, offset + (hscx ? 0x40 : 0))); in ReadHSCX() 223 WriteHSCX(struct IsdnCardState *cs, int hscx, u_char offset, u_char value) in WriteHSCX() argument 226 cs->hw.sedl.hscx, offset + (hscx ? 0x40 : 0), value); in WriteHSCX() 239 return (readreg(cs->hw.sedl.adr, cs->hw.sedl.hscx, offset)); in ReadISAR() 242 return(bytein(cs->hw.sedl.hscx)); in ReadISAR() 249 writereg(cs->hw.sedl.adr, cs->hw.sedl.hscx, offset, value); in WriteISAR() 253 byteout(cs->hw.sedl.hscx, value); in WriteISAR() 262 cs->hw.sedl.hscx, reg + (nr ? 0x40 : 0)) 264 cs->hw.sedl.hscx, reg + (nr ? 0x40 : 0), data) [all …]
|
D | asuscom.c | 141 ReadHSCX(struct IsdnCardState *cs, int hscx, u_char offset) in ReadHSCX() argument 144 cs->hw.asus.hscx, offset + (hscx ? 0x40 : 0))); in ReadHSCX() 148 WriteHSCX(struct IsdnCardState *cs, int hscx, u_char offset, u_char value) in WriteHSCX() argument 151 cs->hw.asus.hscx, offset + (hscx ? 0x40 : 0), value); in WriteHSCX() 159 cs->hw.asus.hscx, reg + (nr ? 0x40 : 0)) 161 cs->hw.asus.hscx, reg + (nr ? 0x40 : 0), data) 164 cs->hw.asus.hscx, (nr ? 0x40 : 0), ptr, cnt) 167 cs->hw.asus.hscx, (nr ? 0x40 : 0), ptr, cnt) 181 val = readreg(cs->hw.asus.adr, cs->hw.asus.hscx, HSCX_ISTA + 0x40); in asuscom_interrupt() 189 val = readreg(cs->hw.asus.adr, cs->hw.asus.hscx, HSCX_ISTA + 0x40); in asuscom_interrupt() [all …]
|
D | teles0.c | 47 readhscx(unsigned long adr, int hscx, u_char off) in readhscx() argument 49 return readb(adr + (hscx ? 0x1c0 : 0x180) + in readhscx() 54 writehscx(unsigned long adr, int hscx, u_char off, u_char data) in writehscx() argument 56 writeb(data, adr + (hscx ? 0x1c0 : 0x180) + in writehscx() 80 read_fifo_hscx(unsigned long adr, int hscx, u_char * data, int size) in read_fifo_hscx() argument 83 register u_char *ad = (u_char *) (adr + (hscx ? 0x1c0 : 0x180)); in read_fifo_hscx() 89 write_fifo_hscx(unsigned long adr, int hscx, u_char * data, int size) in write_fifo_hscx() argument 92 register u_char *ad = (u_char *) (adr + (hscx ? 0x1c0 : 0x180)); in write_fifo_hscx() 125 ReadHSCX(struct IsdnCardState *cs, int hscx, u_char offset) in ReadHSCX() argument 127 return (readhscx(cs->hw.teles0.membase, hscx, offset)); in ReadHSCX() [all …]
|
D | avm_a1p.c | 116 ReadHSCX(struct IsdnCardState *cs, int hscx, u_char offset) in ReadHSCX() argument 126 HSCX_REG_OFFSET+hscx*HSCX_CH_DIFF+offset); in ReadHSCX() 133 WriteHSCX(struct IsdnCardState *cs, int hscx, u_char offset, u_char value) in WriteHSCX() argument 142 HSCX_REG_OFFSET+hscx*HSCX_CH_DIFF+offset); in WriteHSCX() 148 ReadHSCXfifo(struct IsdnCardState *cs, int hscx, u_char * data, int size) in ReadHSCXfifo() argument 155 HSCX_FIFO_OFFSET+hscx*HSCX_CH_DIFF); in ReadHSCXfifo() 161 WriteHSCXfifo(struct IsdnCardState *cs, int hscx, u_char * data, int size) in WriteHSCXfifo() argument 168 HSCX_FIFO_OFFSET+hscx*HSCX_CH_DIFF); in WriteHSCXfifo()
|
D | hisax.h | 355 int hscx; member 511 struct hscx_hw hscx; member 548 unsigned int hscx; member 572 signed int hscx[2]; member 586 unsigned int hscx[2]; member 597 unsigned int hscx; member 607 unsigned int hscx; member 617 unsigned int hscx; member 637 unsigned int hscx; member 648 unsigned int hscx[2]; member [all …]
|
D | elsa.c | 240 ReadHSCX(struct IsdnCardState *cs, int hscx, u_char offset) in ReadHSCX() argument 243 cs->hw.elsa.hscx, offset + (hscx ? 0x40 : 0))); in ReadHSCX() 247 WriteHSCX(struct IsdnCardState *cs, int hscx, u_char offset, u_char value) in WriteHSCX() argument 250 cs->hw.elsa.hscx, offset + (hscx ? 0x40 : 0), value); in WriteHSCX() 296 cs->hw.elsa.hscx, reg + (nr ? 0x40 : 0)) 298 cs->hw.elsa.hscx, reg + (nr ? 0x40 : 0), data) 301 cs->hw.elsa.hscx, (nr ? 0x40 : 0), ptr, cnt) 304 cs->hw.elsa.hscx, (nr ? 0x40 : 0), ptr, cnt) 334 val = readreg(cs->hw.elsa.ale, cs->hw.elsa.hscx, HSCX_ISTA + 0x40); in elsa_interrupt() 344 val = readreg(cs->hw.elsa.ale, cs->hw.elsa.hscx, HSCX_ISTA + 0x40); in elsa_interrupt() [all …]
|
D | elsa_ser.c | 307 bcs->hw.hscx.count); in modem_fill() 313 bcs->hw.hscx.count = 0; in modem_fill() 444 if (bcs->hw.hscx.rcvbuf) { in close_elsastate() 446 kfree(bcs->hw.hscx.rcvbuf); in close_elsastate() 447 bcs->hw.hscx.rcvbuf = NULL; in close_elsastate() 588 st->l1.bcs->hw.hscx.count = 0; in modem_l2l1() 625 bcs->hw.hscx.rcvbuf = bcs->cs->hw.elsa.rcvbuf; in setstack_elsa() 632 bcs->hw.hscx.rcvidx = 0; in setstack_elsa()
|
D | bkm_a8.c | 119 ReadHSCX(struct IsdnCardState *cs, int hscx, u_char offset) in ReadHSCX() argument 121 return (readreg(cs->hw.ax.base, cs->hw.ax.data_adr, offset + (hscx ? 0x40 : 0))); in ReadHSCX() 125 WriteHSCX(struct IsdnCardState *cs, int hscx, u_char offset, u_char value) in WriteHSCX() argument 127 writereg(cs->hw.ax.base, cs->hw.ax.data_adr, offset + (hscx ? 0x40 : 0), value); in WriteHSCX()
|