1 /* hamachi.c: A Packet Engines GNIC-II Gigabit Ethernet driver for Linux. */
2 /*
3 	Written 1998-2000 by Donald Becker.
4 	Updates 2000 by Keith Underwood.
5 
6 	This software may be used and distributed according to the terms of
7 	the GNU General Public License (GPL), incorporated herein by reference.
8 	Drivers based on or derived from this code fall under the GPL and must
9 	retain the authorship, copyright and license notice.  This file is not
10 	a complete program and may only be used when the entire operating
11 	system is licensed under the GPL.
12 
13 	The author may be reached as becker@scyld.com, or C/O
14 	Scyld Computing Corporation
15 	410 Severn Ave., Suite 210
16 	Annapolis MD 21403
17 
18 	This driver is for the Packet Engines GNIC-II PCI Gigabit Ethernet
19 	adapter.
20 
21 	Support and updates available at
22 	http://www.scyld.com/network/hamachi.html
23 	or
24 	http://www.parl.clemson.edu/~keithu/hamachi.html
25 
26 
27 
28 	Linux kernel changelog:
29 
30 	LK1.0.1:
31 	- fix lack of pci_dev<->dev association
32 	- ethtool support (jgarzik)
33 
34 */
35 
36 #define DRV_NAME	"hamachi"
37 #define DRV_VERSION	"1.01+LK1.0.1"
38 #define DRV_RELDATE	"5/18/2001"
39 
40 
41 /* A few user-configurable values. */
42 
43 static int debug = 1;		/* 1 normal messages, 0 quiet .. 7 verbose.  */
44 #define final_version
45 #define hamachi_debug debug
46 /* Maximum events (Rx packets, etc.) to handle at each interrupt. */
47 static int max_interrupt_work = 40;
48 static int mtu;
49 /* Default values selected by testing on a dual processor PIII-450 */
50 /* These six interrupt control parameters may be set directly when loading the
51  * module, or through the rx_params and tx_params variables
52  */
53 static int max_rx_latency = 0x11;
54 static int max_rx_gap = 0x05;
55 static int min_rx_pkt = 0x18;
56 static int max_tx_latency = 0x00;
57 static int max_tx_gap = 0x00;
58 static int min_tx_pkt = 0x30;
59 
60 /* Set the copy breakpoint for the copy-only-tiny-frames scheme.
61    -Setting to > 1518 causes all frames to be copied
62 	-Setting to 0 disables copies
63 */
64 static int rx_copybreak;
65 
66 /* An override for the hardware detection of bus width.
67 	Set to 1 to force 32 bit PCI bus detection.  Set to 4 to force 64 bit.
68 	Add 2 to disable parity detection.
69 */
70 static int force32;
71 
72 
73 /* Used to pass the media type, etc.
74    These exist for driver interoperability.
75    No media types are currently defined.
76 		- The lower 4 bits are reserved for the media type.
77 		- The next three bits may be set to one of the following:
78 			0x00000000 : Autodetect PCI bus
79 			0x00000010 : Force 32 bit PCI bus
80 			0x00000020 : Disable parity detection
81 			0x00000040 : Force 64 bit PCI bus
82 			Default is autodetect
83 		- The next bit can be used to force half-duplex.  This is a bad
84 		  idea since no known implementations implement half-duplex, and,
85 		  in general, half-duplex for gigabit ethernet is a bad idea.
86 			0x00000080 : Force half-duplex
87 			Default is full-duplex.
88 		- In the original driver, the ninth bit could be used to force
89 		  full-duplex.  Maintain that for compatibility
90 		   0x00000200 : Force full-duplex
91 */
92 #define MAX_UNITS 8				/* More are supported, limit only on options */
93 static int options[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};
94 static int full_duplex[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};
95 /* The Hamachi chipset supports 3 parameters each for Rx and Tx
96  * interruput management.  Parameters will be loaded as specified into
97  * the TxIntControl and RxIntControl registers.
98  *
99  * The registers are arranged as follows:
100  *     23 - 16   15 -  8   7    -    0
101  *    _________________________________
102  *   | min_pkt | max_gap | max_latency |
103  *    ---------------------------------
104  *   min_pkt      : The minimum number of packets processed between
105  *                  interrupts.
106  *   max_gap      : The maximum inter-packet gap in units of 8.192 us
107  *   max_latency  : The absolute time between interrupts in units of 8.192 us
108  *
109  */
110 static int rx_params[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};
111 static int tx_params[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};
112 
113 /* Operational parameters that are set at compile time. */
114 
115 /* Keep the ring sizes a power of two for compile efficiency.
116 	The compiler will convert <unsigned>'%'<2^N> into a bit mask.
117    Making the Tx ring too large decreases the effectiveness of channel
118    bonding and packet priority.
119    There are no ill effects from too-large receive rings, except for
120 	excessive memory usage */
121 /* Empirically it appears that the Tx ring needs to be a little bigger
122    for these Gbit adapters or you get into an overrun condition really
123    easily.  Also, things appear to work a bit better in back-to-back
124    configurations if the Rx ring is 8 times the size of the Tx ring
125 */
126 #define TX_RING_SIZE	64
127 #define RX_RING_SIZE	512
128 #define TX_TOTAL_SIZE	TX_RING_SIZE*sizeof(struct hamachi_desc)
129 #define RX_TOTAL_SIZE	RX_RING_SIZE*sizeof(struct hamachi_desc)
130 
131 /*
132  * Enable netdev_ioctl.  Added interrupt coalescing parameter adjustment.
133  * 2/19/99 Pete Wyckoff <wyckoff@ca.sandia.gov>
134  */
135 
136 /* play with 64-bit addrlen; seems to be a teensy bit slower  --pw */
137 /* #define ADDRLEN 64 */
138 
139 /*
140  * RX_CHECKSUM turns on card-generated receive checksum generation for
141  *   TCP and UDP packets.  Otherwise the upper layers do the calculation.
142  * TX_CHECKSUM won't do anything too useful, even if it works.  There's no
143  *   easy mechanism by which to tell the TCP/UDP stack that it need not
144  *   generate checksums for this device.  But if somebody can find a way
145  *   to get that to work, most of the card work is in here already.
146  * 3/10/1999 Pete Wyckoff <wyckoff@ca.sandia.gov>
147  */
148 #undef  TX_CHECKSUM
149 #define RX_CHECKSUM
150 
151 /* Operational parameters that usually are not changed. */
152 /* Time in jiffies before concluding the transmitter is hung. */
153 #define TX_TIMEOUT  (5*HZ)
154 
155 #include <linux/module.h>
156 #include <linux/kernel.h>
157 #include <linux/sched.h>
158 #include <linux/string.h>
159 #include <linux/timer.h>
160 #include <linux/time.h>
161 #include <linux/errno.h>
162 #include <linux/ioport.h>
163 #include <linux/slab.h>
164 #include <linux/interrupt.h>
165 #include <linux/pci.h>
166 #include <linux/init.h>
167 #include <linux/ethtool.h>
168 #include <linux/mii.h>
169 
170 #include <asm/uaccess.h>
171 #include <asm/processor.h>	/* Processor type for cache alignment. */
172 #include <asm/bitops.h>
173 #include <asm/io.h>
174 #include <asm/unaligned.h>
175 #include <asm/cache.h>
176 
177 #include <linux/netdevice.h>
178 #include <linux/etherdevice.h>
179 #include <linux/skbuff.h>
180 #include <linux/ip.h>
181 #include <linux/delay.h>
182 
183 static char version[] __initdata =
184 KERN_INFO DRV_NAME ".c:v" DRV_VERSION " " DRV_RELDATE "  Written by Donald Becker\n"
185 KERN_INFO "   Some modifications by Eric kasten <kasten@nscl.msu.edu>\n"
186 KERN_INFO "   Further modifications by Keith Underwood <keithu@parl.clemson.edu>\n";
187 
188 
189 /* IP_MF appears to be only defined in <netinet/ip.h>, however,
190    we need it for hardware checksumming support.  FYI... some of
191    the definitions in <netinet/ip.h> conflict/duplicate those in
192    other linux headers causing many compiler warnings.
193 */
194 #ifndef IP_MF
195   #define IP_MF 0x2000   /* IP more frags from <netinet/ip.h> */
196 #endif
197 
198 /* Define IP_OFFSET to be IPOPT_OFFSET */
199 #ifndef IP_OFFSET
200   #ifdef IPOPT_OFFSET
201     #define IP_OFFSET IPOPT_OFFSET
202   #else
203     #define IP_OFFSET 2
204   #endif
205 #endif
206 
207 #define RUN_AT(x) (jiffies + (x))
208 
209 /* Condensed bus+endian portability operations. */
210 #if ADDRLEN == 64
211 #define cpu_to_leXX(addr)	cpu_to_le64(addr)
212 #define desc_to_virt(addr) bus_to_virt(le64_to_cpu(addr))
213 #else
214 #define cpu_to_leXX(addr)	cpu_to_le32(addr)
215 #define desc_to_virt(addr) bus_to_virt(le32_to_cpu(addr))
216 #endif
217 
218 
219 /*
220 				Theory of Operation
221 
222 I. Board Compatibility
223 
224 This device driver is designed for the Packet Engines "Hamachi"
225 Gigabit Ethernet chip.  The only PCA currently supported is the GNIC-II 64-bit
226 66Mhz PCI card.
227 
228 II. Board-specific settings
229 
230 No jumpers exist on the board.  The chip supports software correction of
231 various motherboard wiring errors, however this driver does not support
232 that feature.
233 
234 III. Driver operation
235 
236 IIIa. Ring buffers
237 
238 The Hamachi uses a typical descriptor based bus-master architecture.
239 The descriptor list is similar to that used by the Digital Tulip.
240 This driver uses two statically allocated fixed-size descriptor lists
241 formed into rings by a branch from the final descriptor to the beginning of
242 the list.  The ring sizes are set at compile time by RX/TX_RING_SIZE.
243 
244 This driver uses a zero-copy receive and transmit scheme similar my other
245 network drivers.
246 The driver allocates full frame size skbuffs for the Rx ring buffers at
247 open() time and passes the skb->data field to the Hamachi as receive data
248 buffers.  When an incoming frame is less than RX_COPYBREAK bytes long,
249 a fresh skbuff is allocated and the frame is copied to the new skbuff.
250 When the incoming frame is larger, the skbuff is passed directly up the
251 protocol stack and replaced by a newly allocated skbuff.
252 
253 The RX_COPYBREAK value is chosen to trade-off the memory wasted by
254 using a full-sized skbuff for small frames vs. the copying costs of larger
255 frames.  Gigabit cards are typically used on generously configured machines
256 and the underfilled buffers have negligible impact compared to the benefit of
257 a single allocation size, so the default value of zero results in never
258 copying packets.
259 
260 IIIb/c. Transmit/Receive Structure
261 
262 The Rx and Tx descriptor structure are straight-forward, with no historical
263 baggage that must be explained.  Unlike the awkward DBDMA structure, there
264 are no unused fields or option bits that had only one allowable setting.
265 
266 Two details should be noted about the descriptors: The chip supports both 32
267 bit and 64 bit address structures, and the length field is overwritten on
268 the receive descriptors.  The descriptor length is set in the control word
269 for each channel. The development driver uses 32 bit addresses only, however
270 64 bit addresses may be enabled for 64 bit architectures e.g. the Alpha.
271 
272 IIId. Synchronization
273 
274 This driver is very similar to my other network drivers.
275 The driver runs as two independent, single-threaded flows of control.  One
276 is the send-packet routine, which enforces single-threaded use by the
277 dev->tbusy flag.  The other thread is the interrupt handler, which is single
278 threaded by the hardware and other software.
279 
280 The send packet thread has partial control over the Tx ring and 'dev->tbusy'
281 flag.  It sets the tbusy flag whenever it's queuing a Tx packet. If the next
282 queue slot is empty, it clears the tbusy flag when finished otherwise it sets
283 the 'hmp->tx_full' flag.
284 
285 The interrupt handler has exclusive control over the Rx ring and records stats
286 from the Tx ring.  After reaping the stats, it marks the Tx queue entry as
287 empty by incrementing the dirty_tx mark. Iff the 'hmp->tx_full' flag is set, it
288 clears both the tx_full and tbusy flags.
289 
290 IV. Notes
291 
292 Thanks to Kim Stearns of Packet Engines for providing a pair of GNIC-II boards.
293 
294 IVb. References
295 
296 Hamachi Engineering Design Specification, 5/15/97
297 (Note: This version was marked "Confidential".)
298 
299 IVc. Errata
300 
301 None noted.
302 
303 V.  Recent Changes
304 
305 01/15/1999 EPK  Enlargement of the TX and RX ring sizes.  This appears
306     to help avoid some stall conditions -- this needs further research.
307 
308 01/15/1999 EPK  Creation of the hamachi_tx function.  This function cleans
309     the Tx ring and is called from hamachi_start_xmit (this used to be
310     called from hamachi_interrupt but it tends to delay execution of the
311     interrupt handler and thus reduce bandwidth by reducing the latency
312     between hamachi_rx()'s).  Notably, some modification has been made so
313     that the cleaning loop checks only to make sure that the DescOwn bit
314     isn't set in the status flag since the card is not required
315     to set the entire flag to zero after processing.
316 
317 01/15/1999 EPK In the hamachi_start_tx function, the Tx ring full flag is
318     checked before attempting to add a buffer to the ring.  If the ring is full
319     an attempt is made to free any dirty buffers and thus find space for
320     the new buffer or the function returns non-zero which should case the
321     scheduler to reschedule the buffer later.
322 
323 01/15/1999 EPK Some adjustments were made to the chip intialization.
324     End-to-end flow control should now be fully active and the interrupt
325     algorithm vars have been changed.  These could probably use further tuning.
326 
327 01/15/1999 EPK Added the max_{rx,tx}_latency options.  These are used to
328     set the rx and tx latencies for the Hamachi interrupts. If you're having
329     problems with network stalls, try setting these to higher values.
330     Valid values are 0x00 through 0xff.
331 
332 01/15/1999 EPK In general, the overall bandwidth has increased and
333     latencies are better (sometimes by a factor of 2).  Stalls are rare at
334     this point, however there still appears to be a bug somewhere between the
335     hardware and driver.  TCP checksum errors under load also appear to be
336     eliminated at this point.
337 
338 01/18/1999 EPK Ensured that the DescEndRing bit was being set on both the
339     Rx and Tx rings.  This appears to have been affecting whether a particular
340     peer-to-peer connection would hang under high load.  I believe the Rx
341     rings was typically getting set correctly, but the Tx ring wasn't getting
342     the DescEndRing bit set during initialization. ??? Does this mean the
343     hamachi card is using the DescEndRing in processing even if a particular
344     slot isn't in use -- hypothetically, the card might be searching the
345     entire Tx ring for slots with the DescOwn bit set and then processing
346     them.  If the DescEndRing bit isn't set, then it might just wander off
347     through memory until it hits a chunk of data with that bit set
348     and then looping back.
349 
350 02/09/1999 EPK Added Michel Mueller's TxDMA Interrupt and Tx-timeout
351     problem (TxCmd and RxCmd need only to be set when idle or stopped.
352 
353 02/09/1999 EPK Added code to check/reset dev->tbusy in hamachi_interrupt.
354     (Michel Mueller pointed out the ``permanently busy'' potential
355     problem here).
356 
357 02/22/1999 EPK Added Pete Wyckoff's ioctl to control the Tx/Rx latencies.
358 
359 02/23/1999 EPK Verified that the interrupt status field bits for Tx were
360     incorrectly defined and corrected (as per Michel Mueller).
361 
362 02/23/1999 EPK Corrected the Tx full check to check that at least 4 slots
363     were available before reseting the tbusy and tx_full flags
364     (as per Michel Mueller).
365 
366 03/11/1999 EPK Added Pete Wyckoff's hardware checksumming support.
367 
368 12/31/1999 KDU Cleaned up assorted things and added Don's code to force
369 32 bit.
370 
371 02/20/2000 KDU Some of the control was just plain odd.  Cleaned up the
372 hamachi_start_xmit() and hamachi_interrupt() code.  There is still some
373 re-structuring I would like to do.
374 
375 03/01/2000 KDU Experimenting with a WIDE range of interrupt mitigation
376 parameters on a dual P3-450 setup yielded the new default interrupt
377 mitigation parameters.  Tx should interrupt VERY infrequently due to
378 Eric's scheme.  Rx should be more often...
379 
380 03/13/2000 KDU Added a patch to make the Rx Checksum code interact
381 nicely with non-linux machines.
382 
383 03/13/2000 KDU Experimented with some of the configuration values:
384 
385 	-It seems that enabling PCI performance commands for descriptors
386 	(changing RxDMACtrl and TxDMACtrl lower nibble from 5 to D) has minimal
387 	performance impact for any of my tests. (ttcp, netpipe, netperf)  I will
388 	leave them that way until I hear further feedback.
389 
390 	-Increasing the PCI_LATENCY_TIMER to 130
391 	(2 + (burst size of 128 * (0 wait states + 1))) seems to slightly
392 	degrade performance.  Leaving default at 64 pending further information.
393 
394 03/14/2000 KDU Further tuning:
395 
396 	-adjusted boguscnt in hamachi_rx() to depend on interrupt
397 	mitigation parameters chosen.
398 
399 	-Selected a set of interrupt parameters based on some extensive testing.
400 	These may change with more testing.
401 
402 TO DO:
403 
404 -Consider borrowing from the acenic driver code to check PCI_COMMAND for
405 PCI_COMMAND_INVALIDATE.  Set maximum burst size to cache line size in
406 that case.
407 
408 -fix the reset procedure.  It doesn't quite work.
409 */
410 
411 /* A few values that may be tweaked. */
412 /* Size of each temporary Rx buffer, calculated as:
413  * 1518 bytes (ethernet packet) + 2 bytes (to get 8 byte alignment for
414  * the card) + 8 bytes of status info + 8 bytes for the Rx Checksum +
415  * 2 more because we use skb_reserve.
416  */
417 #define PKT_BUF_SZ		1538
418 
419 /* For now, this is going to be set to the maximum size of an ethernet
420  * packet.  Eventually, we may want to make it a variable that is
421  * related to the MTU
422  */
423 #define MAX_FRAME_SIZE  1518
424 
425 /* The rest of these values should never change. */
426 
427 static void hamachi_timer(unsigned long data);
428 
429 enum capability_flags {CanHaveMII=1, };
430 static struct chip_info {
431 	u16	vendor_id, device_id, device_id_mask, pad;
432 	const char *name;
433 	void (*media_timer)(unsigned long data);
434 	int flags;
435 } chip_tbl[] = {
436 	{0x1318, 0x0911, 0xffff, 0, "Hamachi GNIC-II", hamachi_timer, 0},
437 	{0,},
438 };
439 
440 /* Offsets to the Hamachi registers.  Various sizes. */
441 enum hamachi_offsets {
442 	TxDMACtrl=0x00, TxCmd=0x04, TxStatus=0x06, TxPtr=0x08, TxCurPtr=0x10,
443 	RxDMACtrl=0x20, RxCmd=0x24, RxStatus=0x26, RxPtr=0x28, RxCurPtr=0x30,
444 	PCIClkMeas=0x060, MiscStatus=0x066, ChipRev=0x68, ChipReset=0x06B,
445 	LEDCtrl=0x06C, VirtualJumpers=0x06D, GPIO=0x6E,
446 	TxChecksum=0x074, RxChecksum=0x076,
447 	TxIntrCtrl=0x078, RxIntrCtrl=0x07C,
448 	InterruptEnable=0x080, InterruptClear=0x084, IntrStatus=0x088,
449 	EventStatus=0x08C,
450 	MACCnfg=0x0A0, FrameGap0=0x0A2, FrameGap1=0x0A4,
451 	/* See enum MII_offsets below. */
452 	MACCnfg2=0x0B0, RxDepth=0x0B8, FlowCtrl=0x0BC, MaxFrameSize=0x0CE,
453 	AddrMode=0x0D0, StationAddr=0x0D2,
454 	/* Gigabit AutoNegotiation. */
455 	ANCtrl=0x0E0, ANStatus=0x0E2, ANXchngCtrl=0x0E4, ANAdvertise=0x0E8,
456 	ANLinkPartnerAbility=0x0EA,
457 	EECmdStatus=0x0F0, EEData=0x0F1, EEAddr=0x0F2,
458 	FIFOcfg=0x0F8,
459 };
460 
461 /* Offsets to the MII-mode registers. */
462 enum MII_offsets {
463 	MII_Cmd=0xA6, MII_Addr=0xA8, MII_Wr_Data=0xAA, MII_Rd_Data=0xAC,
464 	MII_Status=0xAE,
465 };
466 
467 /* Bits in the interrupt status/mask registers. */
468 enum intr_status_bits {
469 	IntrRxDone=0x01, IntrRxPCIFault=0x02, IntrRxPCIErr=0x04,
470 	IntrTxDone=0x100, IntrTxPCIFault=0x200, IntrTxPCIErr=0x400,
471 	LinkChange=0x10000, NegotiationChange=0x20000, StatsMax=0x40000, };
472 
473 /* The Hamachi Rx and Tx buffer descriptors. */
474 struct hamachi_desc {
475 	u32 status_n_length;
476 #if ADDRLEN == 64
477 	u32 pad;
478 	u64 addr;
479 #else
480 	u32 addr;
481 #endif
482 };
483 
484 /* Bits in hamachi_desc.status_n_length */
485 enum desc_status_bits {
486 	DescOwn=0x80000000, DescEndPacket=0x40000000, DescEndRing=0x20000000,
487 	DescIntr=0x10000000,
488 };
489 
490 #define PRIV_ALIGN	15  			/* Required alignment mask */
491 #define MII_CNT		4
492 struct hamachi_private {
493 	/* Descriptor rings first for alignment.  Tx requires a second descriptor
494 	   for status. */
495 	struct hamachi_desc *rx_ring;
496 	struct hamachi_desc *tx_ring;
497 	struct sk_buff* rx_skbuff[RX_RING_SIZE];
498 	struct sk_buff* tx_skbuff[TX_RING_SIZE];
499 	dma_addr_t tx_ring_dma;
500 	dma_addr_t rx_ring_dma;
501 	struct net_device_stats stats;
502 	struct timer_list timer;		/* Media selection timer. */
503 	/* Frequently used and paired value: keep adjacent for cache effect. */
504 	spinlock_t lock;
505 	int chip_id;
506 	unsigned int cur_rx, dirty_rx;		/* Producer/consumer ring indices */
507 	unsigned int cur_tx, dirty_tx;
508 	unsigned int rx_buf_sz;			/* Based on MTU+slack. */
509 	unsigned int tx_full:1;			/* The Tx queue is full. */
510 	unsigned int duplex_lock:1;
511 	unsigned int default_port:4;		/* Last dev->if_port value. */
512 	/* MII transceiver section. */
513 	int mii_cnt;								/* MII device addresses. */
514 	struct mii_if_info mii_if;		/* MII lib hooks/info */
515 	unsigned char phys[MII_CNT];		/* MII device addresses, only first one used. */
516 	u32 rx_int_var, tx_int_var;	/* interrupt control variables */
517 	u32 option;							/* Hold on to a copy of the options */
518 	struct pci_dev *pci_dev;
519 };
520 
521 MODULE_AUTHOR("Donald Becker <becker@scyld.com>, Eric Kasten <kasten@nscl.msu.edu>, Keith Underwood <keithu@parl.clemson.edu>");
522 MODULE_DESCRIPTION("Packet Engines 'Hamachi' GNIC-II Gigabit Ethernet driver");
523 MODULE_LICENSE("GPL");
524 
525 MODULE_PARM(max_interrupt_work, "i");
526 MODULE_PARM(mtu, "i");
527 MODULE_PARM(debug, "i");
528 MODULE_PARM(min_rx_pkt, "i");
529 MODULE_PARM(max_rx_gap, "i");
530 MODULE_PARM(max_rx_latency, "i");
531 MODULE_PARM(min_tx_pkt, "i");
532 MODULE_PARM(max_tx_gap, "i");
533 MODULE_PARM(max_tx_latency, "i");
534 MODULE_PARM(rx_copybreak, "i");
535 MODULE_PARM(rx_params, "1-" __MODULE_STRING(MAX_UNITS) "i");
536 MODULE_PARM(tx_params, "1-" __MODULE_STRING(MAX_UNITS) "i");
537 MODULE_PARM(options, "1-" __MODULE_STRING(MAX_UNITS) "i");
538 MODULE_PARM(full_duplex, "1-" __MODULE_STRING(MAX_UNITS) "i");
539 MODULE_PARM(force32, "i");
540 MODULE_PARM_DESC(max_interrupt_work, "GNIC-II maximum events handled per interrupt");
541 MODULE_PARM_DESC(mtu, "GNIC-II MTU (all boards)");
542 MODULE_PARM_DESC(debug, "GNIC-II debug level (0-7)");
543 MODULE_PARM_DESC(min_rx_pkt, "GNIC-II minimum Rx packets processed between interrupts");
544 MODULE_PARM_DESC(max_rx_gap, "GNIC-II maximum Rx inter-packet gap in 8.192 microsecond units");
545 MODULE_PARM_DESC(max_rx_latency, "GNIC-II time between Rx interrupts in 8.192 microsecond units");
546 MODULE_PARM_DESC(min_tx_pkt, "GNIC-II minimum Tx packets processed between interrupts");
547 MODULE_PARM_DESC(max_tx_gap, "GNIC-II maximum Tx inter-packet gap in 8.192 microsecond units");
548 MODULE_PARM_DESC(max_tx_latency, "GNIC-II time between Tx interrupts in 8.192 microsecond units");
549 MODULE_PARM_DESC(rx_copybreak, "GNIC-II copy breakpoint for copy-only-tiny-frames");
550 MODULE_PARM_DESC(rx_params, "GNIC-II min_rx_pkt+max_rx_gap+max_rx_latency");
551 MODULE_PARM_DESC(tx_params, "GNIC-II min_tx_pkt+max_tx_gap+max_tx_latency");
552 MODULE_PARM_DESC(options, "GNIC-II Bits 0-3: media type, bits 4-6: as force32, bit 7: half duplex, bit 9 full duplex");
553 MODULE_PARM_DESC(full_duplex, "GNIC-II full duplex setting(s) (1)");
554 MODULE_PARM_DESC(force32, "GNIC-II: Bit 0: 32 bit PCI, bit 1: disable parity, bit 2: 64 bit PCI (all boards)");
555 
556 static int read_eeprom(long ioaddr, int location);
557 static int mdio_read(struct net_device *dev, int phy_id, int location);
558 static void mdio_write(struct net_device *dev, int phy_id, int location, int value);
559 static int hamachi_open(struct net_device *dev);
560 static int netdev_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
561 static void hamachi_timer(unsigned long data);
562 static void hamachi_tx_timeout(struct net_device *dev);
563 static void hamachi_init_ring(struct net_device *dev);
564 static int hamachi_start_xmit(struct sk_buff *skb, struct net_device *dev);
565 static void hamachi_interrupt(int irq, void *dev_instance, struct pt_regs *regs);
566 static inline int hamachi_rx(struct net_device *dev);
567 static inline int hamachi_tx(struct net_device *dev);
568 static void hamachi_error(struct net_device *dev, int intr_status);
569 static int hamachi_close(struct net_device *dev);
570 static struct net_device_stats *hamachi_get_stats(struct net_device *dev);
571 static void set_rx_mode(struct net_device *dev);
572 
573 
hamachi_init_one(struct pci_dev * pdev,const struct pci_device_id * ent)574 static int __init hamachi_init_one (struct pci_dev *pdev,
575 				    const struct pci_device_id *ent)
576 {
577 	struct hamachi_private *hmp;
578 	int option, i, rx_int_var, tx_int_var, boguscnt;
579 	int chip_id = ent->driver_data;
580 	int irq;
581 	long ioaddr;
582 	static int card_idx;
583 	struct net_device *dev;
584 	void *ring_space;
585 	dma_addr_t ring_dma;
586 	int ret = -ENOMEM;
587 
588 /* when built into the kernel, we only print version if device is found */
589 #ifndef MODULE
590 	static int printed_version;
591 	if (!printed_version++)
592 		printk(version);
593 #endif
594 
595 	if (pci_enable_device(pdev)) {
596 		ret = -EIO;
597 		goto err_out;
598 	}
599 
600 	ioaddr = pci_resource_start(pdev, 0);
601 #ifdef __alpha__				/* Really "64 bit addrs" */
602 	ioaddr |= (pci_resource_start(pdev, 1) << 32);
603 #endif
604 
605 	pci_set_master(pdev);
606 
607 	i = pci_request_regions(pdev, DRV_NAME);
608 	if (i) return i;
609 
610 	irq = pdev->irq;
611 	ioaddr = (long) ioremap(ioaddr, 0x400);
612 	if (!ioaddr)
613 		goto err_out_release;
614 
615 	dev = alloc_etherdev(sizeof(struct hamachi_private));
616 	if (!dev)
617 		goto err_out_iounmap;
618 
619 	SET_MODULE_OWNER(dev);
620 
621 #ifdef TX_CHECKSUM
622 	printk("check that skbcopy in ip_queue_xmit isn't happening\n");
623 	dev->hard_header_len += 8;  /* for cksum tag */
624 #endif
625 
626 	for (i = 0; i < 6; i++)
627 		dev->dev_addr[i] = 1 ? read_eeprom(ioaddr, 4 + i)
628 			: readb(ioaddr + StationAddr + i);
629 
630 #if ! defined(final_version)
631 	if (hamachi_debug > 4)
632 		for (i = 0; i < 0x10; i++)
633 			printk("%2.2x%s",
634 				   read_eeprom(ioaddr, i), i % 16 != 15 ? " " : "\n");
635 #endif
636 
637 	hmp = dev->priv;
638 	spin_lock_init(&hmp->lock);
639 
640 	hmp->mii_if.dev = dev;
641 	hmp->mii_if.mdio_read = mdio_read;
642 	hmp->mii_if.mdio_write = mdio_write;
643 	hmp->mii_if.phy_id_mask = 0x1f;
644 	hmp->mii_if.reg_num_mask = 0x1f;
645 
646 	ring_space = pci_alloc_consistent(pdev, TX_TOTAL_SIZE, &ring_dma);
647 	if (!ring_space)
648 		goto err_out_cleardev;
649 	hmp->tx_ring = (struct hamachi_desc *)ring_space;
650 	hmp->tx_ring_dma = ring_dma;
651 
652 	ring_space = pci_alloc_consistent(pdev, RX_TOTAL_SIZE, &ring_dma);
653 	if (!ring_space)
654 		goto err_out_unmap_tx;
655 	hmp->rx_ring = (struct hamachi_desc *)ring_space;
656 	hmp->rx_ring_dma = ring_dma;
657 
658 	/* Check for options being passed in */
659 	option = card_idx < MAX_UNITS ? options[card_idx] : 0;
660 	if (dev->mem_start)
661 		option = dev->mem_start;
662 
663 	/* If the bus size is misidentified, do the following. */
664 	force32 = force32 ? force32 :
665 		((option  >= 0) ? ((option & 0x00000070) >> 4) : 0 );
666 	if (force32)
667 		writeb(force32, ioaddr + VirtualJumpers);
668 
669 	/* Hmmm, do we really need to reset the chip???. */
670 	writeb(0x01, ioaddr + ChipReset);
671 
672 	/* After a reset, the clock speed measurement of the PCI bus will not
673 	 * be valid for a moment.  Wait for a little while until it is.  If
674 	 * it takes more than 10ms, forget it.
675 	 */
676 	udelay(10);
677 	i = readb(ioaddr + PCIClkMeas);
678 	for (boguscnt = 0; (!(i & 0x080)) && boguscnt < 1000; boguscnt++){
679 		udelay(10);
680 		i = readb(ioaddr + PCIClkMeas);
681 	}
682 
683 	dev->base_addr = ioaddr;
684 	dev->irq = irq;
685 	pci_set_drvdata(pdev, dev);
686 
687 	hmp->chip_id = chip_id;
688 	hmp->pci_dev = pdev;
689 
690 	/* The lower four bits are the media type. */
691 	if (option > 0) {
692 		hmp->option = option;
693 		if (option & 0x200)
694 			hmp->mii_if.full_duplex = 1;
695 		else if (option & 0x080)
696 			hmp->mii_if.full_duplex = 0;
697 		hmp->default_port = option & 15;
698 		if (hmp->default_port)
699 			hmp->mii_if.force_media = 1;
700 	}
701 	if (card_idx < MAX_UNITS  &&  full_duplex[card_idx] > 0)
702 		hmp->mii_if.full_duplex = 1;
703 
704 	/* lock the duplex mode if someone specified a value */
705 	if (hmp->mii_if.full_duplex || (option & 0x080))
706 		hmp->duplex_lock = 1;
707 
708 	/* Set interrupt tuning parameters */
709 	max_rx_latency = max_rx_latency & 0x00ff;
710 	max_rx_gap = max_rx_gap & 0x00ff;
711 	min_rx_pkt = min_rx_pkt & 0x00ff;
712 	max_tx_latency = max_tx_latency & 0x00ff;
713 	max_tx_gap = max_tx_gap & 0x00ff;
714 	min_tx_pkt = min_tx_pkt & 0x00ff;
715 
716 	rx_int_var = card_idx < MAX_UNITS ? rx_params[card_idx] : -1;
717 	tx_int_var = card_idx < MAX_UNITS ? tx_params[card_idx] : -1;
718 	hmp->rx_int_var = rx_int_var >= 0 ? rx_int_var :
719 		(min_rx_pkt << 16 | max_rx_gap << 8 | max_rx_latency);
720 	hmp->tx_int_var = tx_int_var >= 0 ? tx_int_var :
721 		(min_tx_pkt << 16 | max_tx_gap << 8 | max_tx_latency);
722 
723 
724 	/* The Hamachi-specific entries in the device structure. */
725 	dev->open = &hamachi_open;
726 	dev->hard_start_xmit = &hamachi_start_xmit;
727 	dev->stop = &hamachi_close;
728 	dev->get_stats = &hamachi_get_stats;
729 	dev->set_multicast_list = &set_rx_mode;
730 	dev->do_ioctl = &netdev_ioctl;
731 	dev->tx_timeout = &hamachi_tx_timeout;
732 	dev->watchdog_timeo = TX_TIMEOUT;
733 	if (mtu)
734 		dev->mtu = mtu;
735 
736 	i = register_netdev(dev);
737 	if (i) {
738 		ret = i;
739 		goto err_out_unmap_rx;
740 	}
741 
742 	printk(KERN_INFO "%s: %s type %x at 0x%lx, ",
743 		   dev->name, chip_tbl[chip_id].name, readl(ioaddr + ChipRev),
744 		   ioaddr);
745 	for (i = 0; i < 5; i++)
746 			printk("%2.2x:", dev->dev_addr[i]);
747 	printk("%2.2x, IRQ %d.\n", dev->dev_addr[i], irq);
748 	i = readb(ioaddr + PCIClkMeas);
749 	printk(KERN_INFO "%s:  %d-bit %d Mhz PCI bus (%d), Virtual Jumpers "
750 		   "%2.2x, LPA %4.4x.\n",
751 		   dev->name, readw(ioaddr + MiscStatus) & 1 ? 64 : 32,
752 		   i ? 2000/(i&0x7f) : 0, i&0x7f, (int)readb(ioaddr + VirtualJumpers),
753 		   readw(ioaddr + ANLinkPartnerAbility));
754 
755 	if (chip_tbl[hmp->chip_id].flags & CanHaveMII) {
756 		int phy, phy_idx = 0;
757 		for (phy = 0; phy < 32 && phy_idx < MII_CNT; phy++) {
758 			int mii_status = mdio_read(dev, phy, MII_BMSR);
759 			if (mii_status != 0xffff  &&
760 				mii_status != 0x0000) {
761 				hmp->phys[phy_idx++] = phy;
762 				hmp->mii_if.advertising = mdio_read(dev, phy, MII_ADVERTISE);
763 				printk(KERN_INFO "%s: MII PHY found at address %d, status "
764 					   "0x%4.4x advertising %4.4x.\n",
765 					   dev->name, phy, mii_status, hmp->mii_if.advertising);
766 			}
767 		}
768 		hmp->mii_cnt = phy_idx;
769 		if (hmp->mii_cnt > 0)
770 			hmp->mii_if.phy_id = hmp->phys[0];
771 		else
772 			memset(&hmp->mii_if, 0, sizeof(hmp->mii_if));
773 	}
774 	/* Configure gigabit autonegotiation. */
775 	writew(0x0400, ioaddr + ANXchngCtrl);	/* Enable legacy links. */
776 	writew(0x08e0, ioaddr + ANAdvertise);	/* Set our advertise word. */
777 	writew(0x1000, ioaddr + ANCtrl);			/* Enable negotiation */
778 
779 	card_idx++;
780 	return 0;
781 
782 err_out_unmap_rx:
783 	pci_free_consistent(pdev, RX_TOTAL_SIZE, hmp->rx_ring,
784 		hmp->rx_ring_dma);
785 err_out_unmap_tx:
786 	pci_free_consistent(pdev, TX_TOTAL_SIZE, hmp->tx_ring,
787 		hmp->tx_ring_dma);
788 err_out_cleardev:
789 	kfree (dev);
790 err_out_iounmap:
791 	iounmap((char *)ioaddr);
792 err_out_release:
793 	pci_release_regions(pdev);
794 err_out:
795 	return ret;
796 }
797 
read_eeprom(long ioaddr,int location)798 static int __init read_eeprom(long ioaddr, int location)
799 {
800 	int bogus_cnt = 1000;
801 
802 	/* We should check busy first - per docs -KDU */
803 	while ((readb(ioaddr + EECmdStatus) & 0x40)  && --bogus_cnt > 0);
804 	writew(location, ioaddr + EEAddr);
805 	writeb(0x02, ioaddr + EECmdStatus);
806 	bogus_cnt = 1000;
807 	while ((readb(ioaddr + EECmdStatus) & 0x40)  && --bogus_cnt > 0);
808 	if (hamachi_debug > 5)
809 		printk("   EEPROM status is %2.2x after %d ticks.\n",
810 			   (int)readb(ioaddr + EECmdStatus), 1000- bogus_cnt);
811 	return readb(ioaddr + EEData);
812 }
813 
814 /* MII Managemen Data I/O accesses.
815    These routines assume the MDIO controller is idle, and do not exit until
816    the command is finished. */
817 
mdio_read(struct net_device * dev,int phy_id,int location)818 static int mdio_read(struct net_device *dev, int phy_id, int location)
819 {
820 	long ioaddr = dev->base_addr;
821 	int i;
822 
823 	/* We should check busy first - per docs -KDU */
824 	for (i = 10000; i >= 0; i--)
825 		if ((readw(ioaddr + MII_Status) & 1) == 0)
826 			break;
827 	writew((phy_id<<8) + location, ioaddr + MII_Addr);
828 	writew(0x0001, ioaddr + MII_Cmd);
829 	for (i = 10000; i >= 0; i--)
830 		if ((readw(ioaddr + MII_Status) & 1) == 0)
831 			break;
832 	return readw(ioaddr + MII_Rd_Data);
833 }
834 
mdio_write(struct net_device * dev,int phy_id,int location,int value)835 static void mdio_write(struct net_device *dev, int phy_id, int location, int value)
836 {
837 	long ioaddr = dev->base_addr;
838 	int i;
839 
840 	/* We should check busy first - per docs -KDU */
841 	for (i = 10000; i >= 0; i--)
842 		if ((readw(ioaddr + MII_Status) & 1) == 0)
843 			break;
844 	writew((phy_id<<8) + location, ioaddr + MII_Addr);
845 	writew(value, ioaddr + MII_Wr_Data);
846 
847 	/* Wait for the command to finish. */
848 	for (i = 10000; i >= 0; i--)
849 		if ((readw(ioaddr + MII_Status) & 1) == 0)
850 			break;
851 	return;
852 }
853 
854 
hamachi_open(struct net_device * dev)855 static int hamachi_open(struct net_device *dev)
856 {
857 	struct hamachi_private *hmp = dev->priv;
858 	long ioaddr = dev->base_addr;
859 	int i;
860 	u32 rx_int_var, tx_int_var;
861 	u16 fifo_info;
862 
863 	i = request_irq(dev->irq, &hamachi_interrupt, SA_SHIRQ, dev->name, dev);
864 	if (i)
865 		return i;
866 
867 	if (hamachi_debug > 1)
868 		printk(KERN_DEBUG "%s: hamachi_open() irq %d.\n",
869 			   dev->name, dev->irq);
870 
871 	hamachi_init_ring(dev);
872 
873 #if ADDRLEN == 64
874 	/* writellll anyone ? */
875 	writel(cpu_to_le64(hmp->rx_ring_dma), ioaddr + RxPtr);
876 	writel(cpu_to_le64(hmp->rx_ring_dma) >> 32, ioaddr + RxPtr + 4);
877 	writel(cpu_to_le64(hmp->tx_ring_dma), ioaddr + TxPtr);
878 	writel(cpu_to_le64(hmp->tx_ring_dma) >> 32, ioaddr + TxPtr + 4);
879 #else
880 	writel(cpu_to_le32(hmp->rx_ring_dma), ioaddr + RxPtr);
881 	writel(cpu_to_le32(hmp->tx_ring_dma), ioaddr + TxPtr);
882 #endif
883 
884 	/* TODO:  It would make sense to organize this as words since the card
885 	 * documentation does. -KDU
886 	 */
887 	for (i = 0; i < 6; i++)
888 		writeb(dev->dev_addr[i], ioaddr + StationAddr + i);
889 
890 	/* Initialize other registers: with so many this eventually this will
891 	   converted to an offset/value list. */
892 
893 	/* Configure the FIFO */
894 	fifo_info = (readw(ioaddr + GPIO) & 0x00C0) >> 6;
895 	switch (fifo_info){
896 		case 0 :
897 			/* No FIFO */
898 			writew(0x0000, ioaddr + FIFOcfg);
899 			break;
900 		case 1 :
901 			/* Configure the FIFO for 512K external, 16K used for Tx. */
902 			writew(0x0028, ioaddr + FIFOcfg);
903 			break;
904 		case 2 :
905 			/* Configure the FIFO for 1024 external, 32K used for Tx. */
906 			writew(0x004C, ioaddr + FIFOcfg);
907 			break;
908 		case 3 :
909 			/* Configure the FIFO for 2048 external, 32K used for Tx. */
910 			writew(0x006C, ioaddr + FIFOcfg);
911 			break;
912 		default :
913 			printk(KERN_WARNING "%s:  Unsupported external memory config!\n",
914 				dev->name);
915 			/* Default to no FIFO */
916 			writew(0x0000, ioaddr + FIFOcfg);
917 			break;
918 	}
919 
920 	if (dev->if_port == 0)
921 		dev->if_port = hmp->default_port;
922 
923 
924 	/* Setting the Rx mode will start the Rx process. */
925 	/* If someone didn't choose a duplex, default to full-duplex */
926 	if (hmp->duplex_lock != 1)
927 		hmp->mii_if.full_duplex = 1;
928 
929 	/* always 1, takes no more time to do it */
930 	writew(0x0001, ioaddr + RxChecksum);
931 #ifdef TX_CHECKSUM
932 	writew(0x0001, ioaddr + TxChecksum);
933 #else
934 	writew(0x0000, ioaddr + TxChecksum);
935 #endif
936 	writew(0x8000, ioaddr + MACCnfg); /* Soft reset the MAC */
937 	writew(0x215F, ioaddr + MACCnfg);
938 	writew(0x000C, ioaddr + FrameGap0);
939 	/* WHAT?!?!?  Why isn't this documented somewhere? -KDU */
940 	writew(0x1018, ioaddr + FrameGap1);
941 	/* Why do we enable receives/transmits here? -KDU */
942 	writew(0x0780, ioaddr + MACCnfg2); /* Upper 16 bits control LEDs. */
943 	/* Enable automatic generation of flow control frames, period 0xffff. */
944 	writel(0x0030FFFF, ioaddr + FlowCtrl);
945 	writew(MAX_FRAME_SIZE, ioaddr + MaxFrameSize); 	/* dev->mtu+14 ??? */
946 
947 	/* Enable legacy links. */
948 	writew(0x0400, ioaddr + ANXchngCtrl);	/* Enable legacy links. */
949 	/* Initial Link LED to blinking red. */
950 	writeb(0x03, ioaddr + LEDCtrl);
951 
952 	/* Configure interrupt mitigation.  This has a great effect on
953 	   performance, so systems tuning should start here!. */
954 
955 	rx_int_var = hmp->rx_int_var;
956 	tx_int_var = hmp->tx_int_var;
957 
958 	if (hamachi_debug > 1) {
959 		printk("max_tx_latency: %d, max_tx_gap: %d, min_tx_pkt: %d\n",
960 			tx_int_var & 0x00ff, (tx_int_var & 0x00ff00) >> 8,
961 			(tx_int_var & 0x00ff0000) >> 16);
962 		printk("max_rx_latency: %d, max_rx_gap: %d, min_rx_pkt: %d\n",
963 			rx_int_var & 0x00ff, (rx_int_var & 0x00ff00) >> 8,
964 			(rx_int_var & 0x00ff0000) >> 16);
965 		printk("rx_int_var: %x, tx_int_var: %x\n", rx_int_var, tx_int_var);
966 	}
967 
968 	writel(tx_int_var, ioaddr + TxIntrCtrl);
969 	writel(rx_int_var, ioaddr + RxIntrCtrl);
970 
971 	set_rx_mode(dev);
972 
973 	netif_start_queue(dev);
974 
975 	/* Enable interrupts by setting the interrupt mask. */
976 	writel(0x80878787, ioaddr + InterruptEnable);
977 	writew(0x0000, ioaddr + EventStatus);	/* Clear non-interrupting events */
978 
979 	/* Configure and start the DMA channels. */
980 	/* Burst sizes are in the low three bits: size = 4<<(val&7) */
981 #if ADDRLEN == 64
982 	writew(0x005D, ioaddr + RxDMACtrl); 		/* 128 dword bursts */
983 	writew(0x005D, ioaddr + TxDMACtrl);
984 #else
985 	writew(0x001D, ioaddr + RxDMACtrl);
986 	writew(0x001D, ioaddr + TxDMACtrl);
987 #endif
988 	writew(0x0001, dev->base_addr + RxCmd);
989 
990 	if (hamachi_debug > 2) {
991 		printk(KERN_DEBUG "%s: Done hamachi_open(), status: Rx %x Tx %x.\n",
992 			   dev->name, readw(ioaddr + RxStatus), readw(ioaddr + TxStatus));
993 	}
994 	/* Set the timer to check for link beat. */
995 	init_timer(&hmp->timer);
996 	hmp->timer.expires = RUN_AT((24*HZ)/10);			/* 2.4 sec. */
997 	hmp->timer.data = (unsigned long)dev;
998 	hmp->timer.function = &hamachi_timer;				/* timer handler */
999 	add_timer(&hmp->timer);
1000 
1001 	return 0;
1002 }
1003 
hamachi_tx(struct net_device * dev)1004 static inline int hamachi_tx(struct net_device *dev)
1005 {
1006 	struct hamachi_private *hmp = dev->priv;
1007 
1008 	/* Update the dirty pointer until we find an entry that is
1009 		still owned by the card */
1010 	for (; hmp->cur_tx - hmp->dirty_tx > 0; hmp->dirty_tx++) {
1011 		int entry = hmp->dirty_tx % TX_RING_SIZE;
1012 		struct sk_buff *skb;
1013 
1014 		if (hmp->tx_ring[entry].status_n_length & cpu_to_le32(DescOwn))
1015 			break;
1016 		/* Free the original skb. */
1017 		skb = hmp->tx_skbuff[entry];
1018 		if (skb != 0) {
1019 			pci_unmap_single(hmp->pci_dev,
1020 				hmp->tx_ring[entry].addr, skb->len,
1021 				PCI_DMA_TODEVICE);
1022 			dev_kfree_skb(skb);
1023 			hmp->tx_skbuff[entry] = 0;
1024 		}
1025 		hmp->tx_ring[entry].status_n_length = 0;
1026 		if (entry >= TX_RING_SIZE-1)
1027 			hmp->tx_ring[TX_RING_SIZE-1].status_n_length |=
1028 				cpu_to_le32(DescEndRing);
1029 		hmp->stats.tx_packets++;
1030 	}
1031 
1032 	return 0;
1033 }
1034 
hamachi_timer(unsigned long data)1035 static void hamachi_timer(unsigned long data)
1036 {
1037 	struct net_device *dev = (struct net_device *)data;
1038 	struct hamachi_private *hmp = dev->priv;
1039 	long ioaddr = dev->base_addr;
1040 	int next_tick = 10*HZ;
1041 
1042 	if (hamachi_debug > 2) {
1043 		printk(KERN_INFO "%s: Hamachi Autonegotiation status %4.4x, LPA "
1044 			   "%4.4x.\n", dev->name, readw(ioaddr + ANStatus),
1045 			   readw(ioaddr + ANLinkPartnerAbility));
1046 		printk(KERN_INFO "%s: Autonegotiation regs %4.4x %4.4x %4.4x "
1047 		       "%4.4x %4.4x %4.4x.\n", dev->name,
1048 		       readw(ioaddr + 0x0e0),
1049 		       readw(ioaddr + 0x0e2),
1050 		       readw(ioaddr + 0x0e4),
1051 		       readw(ioaddr + 0x0e6),
1052 		       readw(ioaddr + 0x0e8),
1053 		       readw(ioaddr + 0x0eA));
1054 	}
1055 	/* We could do something here... nah. */
1056 	hmp->timer.expires = RUN_AT(next_tick);
1057 	add_timer(&hmp->timer);
1058 }
1059 
hamachi_tx_timeout(struct net_device * dev)1060 static void hamachi_tx_timeout(struct net_device *dev)
1061 {
1062 	int i;
1063 	struct hamachi_private *hmp = dev->priv;
1064 	long ioaddr = dev->base_addr;
1065 
1066 	printk(KERN_WARNING "%s: Hamachi transmit timed out, status %8.8x,"
1067 		   " resetting...\n", dev->name, (int)readw(ioaddr + TxStatus));
1068 
1069 	{
1070 		int i;
1071 		printk(KERN_DEBUG "  Rx ring %p: ", hmp->rx_ring);
1072 		for (i = 0; i < RX_RING_SIZE; i++)
1073 			printk(" %8.8x", (unsigned int)hmp->rx_ring[i].status_n_length);
1074 		printk("\n"KERN_DEBUG"  Tx ring %p: ", hmp->tx_ring);
1075 		for (i = 0; i < TX_RING_SIZE; i++)
1076 			printk(" %4.4x", hmp->tx_ring[i].status_n_length);
1077 		printk("\n");
1078 	}
1079 
1080 	/* Reinit the hardware and make sure the Rx and Tx processes
1081 		are up and running.
1082 	 */
1083 	dev->if_port = 0;
1084 	/* The right way to do Reset. -KDU
1085 	 *		-Clear OWN bit in all Rx/Tx descriptors
1086 	 *		-Wait 50 uS for channels to go idle
1087 	 *		-Turn off MAC receiver
1088 	 *		-Issue Reset
1089 	 */
1090 
1091 	for (i = 0; i < RX_RING_SIZE; i++)
1092 		hmp->rx_ring[i].status_n_length &= cpu_to_le32(~DescOwn);
1093 
1094 	/* Presume that all packets in the Tx queue are gone if we have to
1095 	 * re-init the hardware.
1096 	 */
1097 	for (i = 0; i < TX_RING_SIZE; i++){
1098 		struct sk_buff *skb;
1099 
1100 		if (i >= TX_RING_SIZE - 1)
1101 			hmp->tx_ring[i].status_n_length = cpu_to_le32(
1102 				DescEndRing |
1103 				(hmp->tx_ring[i].status_n_length & 0x0000FFFF));
1104 		else
1105 			hmp->tx_ring[i].status_n_length &= 0x0000ffff;
1106 		skb = hmp->tx_skbuff[i];
1107 		if (skb){
1108 			pci_unmap_single(hmp->pci_dev, hmp->tx_ring[i].addr,
1109 				skb->len, PCI_DMA_TODEVICE);
1110 			dev_kfree_skb(skb);
1111 			hmp->tx_skbuff[i] = 0;
1112 		}
1113 	}
1114 
1115 	udelay(60); /* Sleep 60 us just for safety sake */
1116 	writew(0x0002, dev->base_addr + RxCmd); /* STOP Rx */
1117 
1118 	writeb(0x01, ioaddr + ChipReset);  /* Reinit the hardware */
1119 
1120 	hmp->tx_full = 0;
1121 	hmp->cur_rx = hmp->cur_tx = 0;
1122 	hmp->dirty_rx = hmp->dirty_tx = 0;
1123 	/* Rx packets are also presumed lost; however, we need to make sure a
1124 	 * ring of buffers is in tact. -KDU
1125 	 */
1126 	for (i = 0; i < RX_RING_SIZE; i++){
1127 		struct sk_buff *skb = hmp->rx_skbuff[i];
1128 
1129 		if (skb){
1130 			pci_unmap_single(hmp->pci_dev, hmp->rx_ring[i].addr,
1131 				hmp->rx_buf_sz, PCI_DMA_FROMDEVICE);
1132 			dev_kfree_skb(skb);
1133 			hmp->rx_skbuff[i] = 0;
1134 		}
1135 	}
1136 	/* Fill in the Rx buffers.  Handle allocation failure gracefully. */
1137 	for (i = 0; i < RX_RING_SIZE; i++) {
1138 		struct sk_buff *skb = dev_alloc_skb(hmp->rx_buf_sz);
1139 		hmp->rx_skbuff[i] = skb;
1140 		if (skb == NULL)
1141 			break;
1142 		skb->dev = dev;         /* Mark as being used by this device. */
1143 		skb_reserve(skb, 2); /* 16 byte align the IP header. */
1144                 hmp->rx_ring[i].addr = cpu_to_leXX(pci_map_single(hmp->pci_dev,
1145 			skb->tail, hmp->rx_buf_sz, PCI_DMA_FROMDEVICE));
1146 		hmp->rx_ring[i].status_n_length = cpu_to_le32(DescOwn |
1147 			DescEndPacket | DescIntr | (hmp->rx_buf_sz - 2));
1148 	}
1149 	hmp->dirty_rx = (unsigned int)(i - RX_RING_SIZE);
1150 	/* Mark the last entry as wrapping the ring. */
1151 	hmp->rx_ring[RX_RING_SIZE-1].status_n_length |= cpu_to_le32(DescEndRing);
1152 
1153 	/* Trigger an immediate transmit demand. */
1154 	dev->trans_start = jiffies;
1155 	hmp->stats.tx_errors++;
1156 
1157 	/* Restart the chip's Tx/Rx processes . */
1158 	writew(0x0002, dev->base_addr + TxCmd); /* STOP Tx */
1159 	writew(0x0001, dev->base_addr + TxCmd); /* START Tx */
1160 	writew(0x0001, dev->base_addr + RxCmd); /* START Rx */
1161 
1162 	netif_wake_queue(dev);
1163 }
1164 
1165 
1166 /* Initialize the Rx and Tx rings, along with various 'dev' bits. */
hamachi_init_ring(struct net_device * dev)1167 static void hamachi_init_ring(struct net_device *dev)
1168 {
1169 	struct hamachi_private *hmp = dev->priv;
1170 	int i;
1171 
1172 	hmp->tx_full = 0;
1173 	hmp->cur_rx = hmp->cur_tx = 0;
1174 	hmp->dirty_rx = hmp->dirty_tx = 0;
1175 
1176 #if 0
1177 	/* This is wrong.  I'm not sure what the original plan was, but this
1178 	 * is wrong.  An MTU of 1 gets you a buffer of 1536, while an MTU
1179 	 * of 1501 gets a buffer of 1533? -KDU
1180 	 */
1181 	hmp->rx_buf_sz = (dev->mtu <= 1500 ? PKT_BUF_SZ : dev->mtu + 32);
1182 #endif
1183 	/* My attempt at a reasonable correction */
1184 	/* +26 gets the maximum ethernet encapsulation, +7 & ~7 because the
1185 	 * card needs room to do 8 byte alignment, +2 so we can reserve
1186 	 * the first 2 bytes, and +16 gets room for the status word from the
1187 	 * card.  -KDU
1188 	 */
1189 	hmp->rx_buf_sz = (dev->mtu <= 1492 ? PKT_BUF_SZ :
1190 		(((dev->mtu+26+7) & ~7) + 2 + 16));
1191 
1192 	/* Initialize all Rx descriptors. */
1193 	for (i = 0; i < RX_RING_SIZE; i++) {
1194 		hmp->rx_ring[i].status_n_length = 0;
1195 		hmp->rx_skbuff[i] = 0;
1196 	}
1197 	/* Fill in the Rx buffers.  Handle allocation failure gracefully. */
1198 	for (i = 0; i < RX_RING_SIZE; i++) {
1199 		struct sk_buff *skb = dev_alloc_skb(hmp->rx_buf_sz);
1200 		hmp->rx_skbuff[i] = skb;
1201 		if (skb == NULL)
1202 			break;
1203 		skb->dev = dev;         /* Mark as being used by this device. */
1204 		skb_reserve(skb, 2); /* 16 byte align the IP header. */
1205                 hmp->rx_ring[i].addr = cpu_to_leXX(pci_map_single(hmp->pci_dev,
1206 			skb->tail, hmp->rx_buf_sz, PCI_DMA_FROMDEVICE));
1207 		/* -2 because it doesn't REALLY have that first 2 bytes -KDU */
1208 		hmp->rx_ring[i].status_n_length = cpu_to_le32(DescOwn |
1209 			DescEndPacket | DescIntr | (hmp->rx_buf_sz -2));
1210 	}
1211 	hmp->dirty_rx = (unsigned int)(i - RX_RING_SIZE);
1212 	hmp->rx_ring[RX_RING_SIZE-1].status_n_length |= cpu_to_le32(DescEndRing);
1213 
1214 	for (i = 0; i < TX_RING_SIZE; i++) {
1215 		hmp->tx_skbuff[i] = 0;
1216 		hmp->tx_ring[i].status_n_length = 0;
1217 	}
1218 	/* Mark the last entry of the ring */
1219 	hmp->tx_ring[TX_RING_SIZE-1].status_n_length |= cpu_to_le32(DescEndRing);
1220 
1221 	return;
1222 }
1223 
1224 
1225 #ifdef TX_CHECKSUM
1226 #define csum_add(it, val) \
1227 do { \
1228     it += (u16) (val); \
1229     if (it & 0xffff0000) { \
1230 	it &= 0xffff; \
1231 	++it; \
1232     } \
1233 } while (0)
1234     /* printk("add %04x --> %04x\n", val, it); \ */
1235 
1236 /* uh->len already network format, do not swap */
1237 #define pseudo_csum_udp(sum,ih,uh) do { \
1238     sum = 0; \
1239     csum_add(sum, (ih)->saddr >> 16); \
1240     csum_add(sum, (ih)->saddr & 0xffff); \
1241     csum_add(sum, (ih)->daddr >> 16); \
1242     csum_add(sum, (ih)->daddr & 0xffff); \
1243     csum_add(sum, __constant_htons(IPPROTO_UDP)); \
1244     csum_add(sum, (uh)->len); \
1245 } while (0)
1246 
1247 /* swap len */
1248 #define pseudo_csum_tcp(sum,ih,len) do { \
1249     sum = 0; \
1250     csum_add(sum, (ih)->saddr >> 16); \
1251     csum_add(sum, (ih)->saddr & 0xffff); \
1252     csum_add(sum, (ih)->daddr >> 16); \
1253     csum_add(sum, (ih)->daddr & 0xffff); \
1254     csum_add(sum, __constant_htons(IPPROTO_TCP)); \
1255     csum_add(sum, htons(len)); \
1256 } while (0)
1257 #endif
1258 
hamachi_start_xmit(struct sk_buff * skb,struct net_device * dev)1259 static int hamachi_start_xmit(struct sk_buff *skb, struct net_device *dev)
1260 {
1261 	struct hamachi_private *hmp = dev->priv;
1262 	unsigned entry;
1263 	u16 status;
1264 
1265 	/* Ok, now make sure that the queue has space before trying to
1266 		add another skbuff.  if we return non-zero the scheduler
1267 		should interpret this as a queue full and requeue the buffer
1268 		for later.
1269 	 */
1270 	if (hmp->tx_full) {
1271 		/* We should NEVER reach this point -KDU */
1272 		printk(KERN_WARNING "%s: Hamachi transmit queue full at slot %d.\n",dev->name, hmp->cur_tx);
1273 
1274 		/* Wake the potentially-idle transmit channel. */
1275 		/* If we don't need to read status, DON'T -KDU */
1276 		status=readw(dev->base_addr + TxStatus);
1277 		if( !(status & 0x0001) || (status & 0x0002))
1278 			writew(0x0001, dev->base_addr + TxCmd);
1279 		return 1;
1280 	}
1281 
1282 	/* Caution: the write order is important here, set the field
1283 	   with the "ownership" bits last. */
1284 
1285 	/* Calculate the next Tx descriptor entry. */
1286 	entry = hmp->cur_tx % TX_RING_SIZE;
1287 
1288 	hmp->tx_skbuff[entry] = skb;
1289 
1290 #ifdef TX_CHECKSUM
1291 	{
1292 	    /* tack on checksum tag */
1293 	    u32 tagval = 0;
1294 	    struct ethhdr *eh = (struct ethhdr *)skb->data;
1295 	    if (eh->h_proto == __constant_htons(ETH_P_IP)) {
1296 		struct iphdr *ih = (struct iphdr *)((char *)eh + ETH_HLEN);
1297 		if (ih->protocol == IPPROTO_UDP) {
1298 		    struct udphdr *uh
1299 		      = (struct udphdr *)((char *)ih + ih->ihl*4);
1300 		    u32 offset = ((unsigned char *)uh + 6) - skb->data;
1301 		    u32 pseudo;
1302 		    pseudo_csum_udp(pseudo, ih, uh);
1303 		    pseudo = htons(pseudo);
1304 		    printk("udp cksum was %04x, sending pseudo %04x\n",
1305 		      uh->check, pseudo);
1306 		    uh->check = 0;  /* zero out uh->check before card calc */
1307 		    /*
1308 		     * start at 14 (skip ethhdr), store at offset (uh->check),
1309 		     * use pseudo value given.
1310 		     */
1311 		    tagval = (14 << 24) | (offset << 16) | pseudo;
1312 		} else if (ih->protocol == IPPROTO_TCP) {
1313 		    printk("tcp, no auto cksum\n");
1314 		}
1315 	    }
1316 	    *(u32 *)skb_push(skb, 8) = tagval;
1317 	}
1318 #endif
1319 
1320         hmp->tx_ring[entry].addr = cpu_to_leXX(pci_map_single(hmp->pci_dev,
1321 		skb->data, skb->len, PCI_DMA_TODEVICE));
1322 
1323 	/* Hmmmm, could probably put a DescIntr on these, but the way
1324 		the driver is currently coded makes Tx interrupts unnecessary
1325 		since the clearing of the Tx ring is handled by the start_xmit
1326 		routine.  This organization helps mitigate the interrupts a
1327 		bit and probably renders the max_tx_latency param useless.
1328 
1329 		Update: Putting a DescIntr bit on all of the descriptors and
1330 		mitigating interrupt frequency with the tx_min_pkt parameter. -KDU
1331 	*/
1332 	if (entry >= TX_RING_SIZE-1)		 /* Wrap ring */
1333 		hmp->tx_ring[entry].status_n_length = cpu_to_le32(DescOwn |
1334 			DescEndPacket | DescEndRing | DescIntr | skb->len);
1335 	else
1336 		hmp->tx_ring[entry].status_n_length = cpu_to_le32(DescOwn |
1337 			DescEndPacket | DescIntr | skb->len);
1338 	hmp->cur_tx++;
1339 
1340 	/* Non-x86 Todo: explicitly flush cache lines here. */
1341 
1342 	/* Wake the potentially-idle transmit channel. */
1343 	/* If we don't need to read status, DON'T -KDU */
1344 	status=readw(dev->base_addr + TxStatus);
1345 	if( !(status & 0x0001) || (status & 0x0002))
1346 		writew(0x0001, dev->base_addr + TxCmd);
1347 
1348 	/* Immediately before returning, let's clear as many entries as we can. */
1349 	hamachi_tx(dev);
1350 
1351 	/* We should kick the bottom half here, since we are not accepting
1352 	 * interrupts with every packet.  i.e. realize that Gigabit ethernet
1353 	 * can transmit faster than ordinary machines can load packets;
1354 	 * hence, any packet that got put off because we were in the transmit
1355 	 * routine should IMMEDIATELY get a chance to be re-queued. -KDU
1356 	 */
1357 	if ((hmp->cur_tx - hmp->dirty_tx) < (TX_RING_SIZE - 4))
1358 		netif_wake_queue(dev);  /* Typical path */
1359 	else {
1360 		hmp->tx_full = 1;
1361 		netif_stop_queue(dev);
1362 	}
1363 	dev->trans_start = jiffies;
1364 
1365 	if (hamachi_debug > 4) {
1366 		printk(KERN_DEBUG "%s: Hamachi transmit frame #%d queued in slot %d.\n",
1367 			   dev->name, hmp->cur_tx, entry);
1368 	}
1369 	return 0;
1370 }
1371 
1372 /* This routine is logically part of the interrupt handler, but seperated
1373    for clarity and better register allocation. */
hamachi_rx(struct net_device * dev)1374 static int hamachi_rx(struct net_device *dev)
1375 {
1376 	struct hamachi_private *hmp = dev->priv;
1377 	int entry = hmp->cur_rx % RX_RING_SIZE;
1378 	int boguscnt = (hmp->dirty_rx + RX_RING_SIZE) - hmp->cur_rx;
1379 
1380 	if (hamachi_debug > 4) {
1381 		printk(KERN_DEBUG " In hamachi_rx(), entry %d status %4.4x.\n",
1382 			   entry, hmp->rx_ring[entry].status_n_length);
1383 	}
1384 
1385 	/* If EOP is set on the next entry, it's a new packet. Send it up. */
1386 	while (1) {
1387 		struct hamachi_desc *desc = &(hmp->rx_ring[entry]);
1388 		u32 desc_status = le32_to_cpu(desc->status_n_length);
1389 		u16 data_size = desc_status;	/* Implicit truncate */
1390 		u8 *buf_addr;
1391 		s32 frame_status;
1392 
1393 		if (desc_status & DescOwn)
1394 			break;
1395 		pci_dma_sync_single(hmp->pci_dev, desc->addr, hmp->rx_buf_sz,
1396 			PCI_DMA_FROMDEVICE);
1397 		buf_addr = desc_to_virt(desc->addr);
1398 		frame_status = le32_to_cpu(get_unaligned((s32*)&(buf_addr[data_size - 12])));
1399 		if (hamachi_debug > 4)
1400 			printk(KERN_DEBUG "  hamachi_rx() status was %8.8x.\n",
1401 				frame_status);
1402 		if (--boguscnt < 0)
1403 			break;
1404 		if ( ! (desc_status & DescEndPacket)) {
1405 			printk(KERN_WARNING "%s: Oversized Ethernet frame spanned "
1406 				   "multiple buffers, entry %#x length %d status %4.4x!\n",
1407 				   dev->name, hmp->cur_rx, data_size, desc_status);
1408 			printk(KERN_WARNING "%s: Oversized Ethernet frame %p vs %p.\n",
1409 				   dev->name, desc, &hmp->rx_ring[hmp->cur_rx % RX_RING_SIZE]);
1410 			printk(KERN_WARNING "%s: Oversized Ethernet frame -- next status %x/%x last status %x.\n",
1411 				   dev->name,
1412 				   hmp->rx_ring[(hmp->cur_rx+1) % RX_RING_SIZE].status_n_length & 0xffff0000,
1413 				   hmp->rx_ring[(hmp->cur_rx+1) % RX_RING_SIZE].status_n_length & 0x0000ffff,
1414 				   hmp->rx_ring[(hmp->cur_rx-1) % RX_RING_SIZE].status_n_length);
1415 			hmp->stats.rx_length_errors++;
1416 		} /* else  Omit for prototype errata??? */
1417 		if (frame_status & 0x00380000) {
1418 			/* There was an error. */
1419 			if (hamachi_debug > 2)
1420 				printk(KERN_DEBUG "  hamachi_rx() Rx error was %8.8x.\n",
1421 					   frame_status);
1422 			hmp->stats.rx_errors++;
1423 			if (frame_status & 0x00600000) hmp->stats.rx_length_errors++;
1424 			if (frame_status & 0x00080000) hmp->stats.rx_frame_errors++;
1425 			if (frame_status & 0x00100000) hmp->stats.rx_crc_errors++;
1426 			if (frame_status < 0) hmp->stats.rx_dropped++;
1427 		} else {
1428 			struct sk_buff *skb;
1429 			/* Omit CRC */
1430 			u16 pkt_len = (frame_status & 0x07ff) - 4;
1431 #ifdef RX_CHECKSUM
1432 			u32 pfck = *(u32 *) &buf_addr[data_size - 8];
1433 #endif
1434 
1435 
1436 #ifndef final_version
1437 			if (hamachi_debug > 4)
1438 				printk(KERN_DEBUG "  hamachi_rx() normal Rx pkt length %d"
1439 					   " of %d, bogus_cnt %d.\n",
1440 					   pkt_len, data_size, boguscnt);
1441 			if (hamachi_debug > 5)
1442 				printk(KERN_DEBUG"%s:  rx status %8.8x %8.8x %8.8x %8.8x %8.8x.\n",
1443 					   dev->name,
1444 					   *(s32*)&(buf_addr[data_size - 20]),
1445 					   *(s32*)&(buf_addr[data_size - 16]),
1446 					   *(s32*)&(buf_addr[data_size - 12]),
1447 					   *(s32*)&(buf_addr[data_size - 8]),
1448 					   *(s32*)&(buf_addr[data_size - 4]));
1449 #endif
1450 			/* Check if the packet is long enough to accept without copying
1451 			   to a minimally-sized skbuff. */
1452 			if (pkt_len < rx_copybreak
1453 				&& (skb = dev_alloc_skb(pkt_len + 2)) != NULL) {
1454 #ifdef RX_CHECKSUM
1455 				printk(KERN_ERR "%s: rx_copybreak non-zero "
1456 				  "not good with RX_CHECKSUM\n", dev->name);
1457 #endif
1458 				skb->dev = dev;
1459 				skb_reserve(skb, 2);	/* 16 byte align the IP header */
1460 				/* Call copy + cksum if available. */
1461 #if 1 || USE_IP_COPYSUM
1462 				eth_copy_and_sum(skb,
1463 					hmp->rx_skbuff[entry]->data, pkt_len, 0);
1464 				skb_put(skb, pkt_len);
1465 #else
1466 				memcpy(skb_put(skb, pkt_len), hmp->rx_ring_dma
1467 					+ entry*sizeof(*desc), pkt_len);
1468 #endif
1469 			} else {
1470 				pci_unmap_single(hmp->pci_dev,
1471 					hmp->rx_ring[entry].addr,
1472 					hmp->rx_buf_sz, PCI_DMA_FROMDEVICE);
1473 				skb_put(skb = hmp->rx_skbuff[entry], pkt_len);
1474 				hmp->rx_skbuff[entry] = NULL;
1475 			}
1476 			skb->protocol = eth_type_trans(skb, dev);
1477 
1478 
1479 #ifdef RX_CHECKSUM
1480 			/* TCP or UDP on ipv4, DIX encoding */
1481 			if (pfck>>24 == 0x91 || pfck>>24 == 0x51) {
1482 				struct iphdr *ih = (struct iphdr *) skb->data;
1483 				/* Check that IP packet is at least 46 bytes, otherwise,
1484 				 * there may be pad bytes included in the hardware checksum.
1485 				 * This wouldn't happen if everyone padded with 0.
1486 				 */
1487 				if (ntohs(ih->tot_len) >= 46){
1488 					/* don't worry about frags */
1489 					if (!(ih->frag_off & __constant_htons(IP_MF|IP_OFFSET))) {
1490 						u32 inv = *(u32 *) &buf_addr[data_size - 16];
1491 						u32 *p = (u32 *) &buf_addr[data_size - 20];
1492 						register u32 crc, p_r, p_r1;
1493 
1494 						if (inv & 4) {
1495 							inv &= ~4;
1496 							--p;
1497 						}
1498 						p_r = *p;
1499 						p_r1 = *(p-1);
1500 						switch (inv) {
1501 							case 0:
1502 								crc = (p_r & 0xffff) + (p_r >> 16);
1503 								break;
1504 							case 1:
1505 								crc = (p_r >> 16) + (p_r & 0xffff)
1506 									+ (p_r1 >> 16 & 0xff00);
1507 								break;
1508 							case 2:
1509 								crc = p_r + (p_r1 >> 16);
1510 								break;
1511 							case 3:
1512 								crc = p_r + (p_r1 & 0xff00) + (p_r1 >> 16);
1513 								break;
1514 							default:	/*NOTREACHED*/ crc = 0;
1515 						}
1516 						if (crc & 0xffff0000) {
1517 							crc &= 0xffff;
1518 							++crc;
1519 						}
1520 						/* tcp/udp will add in pseudo */
1521 						skb->csum = ntohs(pfck & 0xffff);
1522 						if (skb->csum > crc)
1523 							skb->csum -= crc;
1524 						else
1525 							skb->csum += (~crc & 0xffff);
1526 						/*
1527 						* could do the pseudo myself and return
1528 						* CHECKSUM_UNNECESSARY
1529 						*/
1530 						skb->ip_summed = CHECKSUM_HW;
1531 					}
1532 				}
1533 			}
1534 #endif  /* RX_CHECKSUM */
1535 
1536 			netif_rx(skb);
1537 			dev->last_rx = jiffies;
1538 			hmp->stats.rx_packets++;
1539 		}
1540 		entry = (++hmp->cur_rx) % RX_RING_SIZE;
1541 	}
1542 
1543 	/* Refill the Rx ring buffers. */
1544 	for (; hmp->cur_rx - hmp->dirty_rx > 0; hmp->dirty_rx++) {
1545 		struct hamachi_desc *desc;
1546 
1547 		entry = hmp->dirty_rx % RX_RING_SIZE;
1548 		desc = &(hmp->rx_ring[entry]);
1549 		if (hmp->rx_skbuff[entry] == NULL) {
1550 			struct sk_buff *skb = dev_alloc_skb(hmp->rx_buf_sz);
1551 
1552 			hmp->rx_skbuff[entry] = skb;
1553 			if (skb == NULL)
1554 				break;		/* Better luck next round. */
1555 			skb->dev = dev;		/* Mark as being used by this device. */
1556 			skb_reserve(skb, 2);	/* Align IP on 16 byte boundaries */
1557                 	desc->addr = cpu_to_leXX(pci_map_single(hmp->pci_dev,
1558 				skb->tail, hmp->rx_buf_sz, PCI_DMA_FROMDEVICE));
1559 		}
1560 		desc->status_n_length = cpu_to_le32(hmp->rx_buf_sz);
1561 		if (entry >= RX_RING_SIZE-1)
1562 			desc->status_n_length |= cpu_to_le32(DescOwn |
1563 				DescEndPacket | DescEndRing | DescIntr);
1564 		else
1565 			desc->status_n_length |= cpu_to_le32(DescOwn |
1566 				DescEndPacket | DescIntr);
1567 	}
1568 
1569 	/* Restart Rx engine if stopped. */
1570 	/* If we don't need to check status, don't. -KDU */
1571 	if (readw(dev->base_addr + RxStatus) & 0x0002)
1572 		writew(0x0001, dev->base_addr + RxCmd);
1573 
1574 	return 0;
1575 }
1576 
1577 /* The interrupt handler does all of the Rx thread work and cleans up
1578    after the Tx thread. */
hamachi_interrupt(int irq,void * dev_instance,struct pt_regs * rgs)1579 static void hamachi_interrupt(int irq, void *dev_instance, struct pt_regs *rgs)
1580 {
1581 	struct net_device *dev = dev_instance;
1582 	struct hamachi_private *hmp;
1583 	long ioaddr, boguscnt = max_interrupt_work;
1584 
1585 #ifndef final_version			/* Can never occur. */
1586 	if (dev == NULL) {
1587 		printk (KERN_ERR "hamachi_interrupt(): irq %d for unknown device.\n", irq);
1588 		return;
1589 	}
1590 #endif
1591 
1592 	ioaddr = dev->base_addr;
1593 	hmp = dev->priv;
1594 	spin_lock(&hmp->lock);
1595 
1596 	do {
1597 		u32 intr_status = readl(ioaddr + InterruptClear);
1598 
1599 		if (hamachi_debug > 4)
1600 			printk(KERN_DEBUG "%s: Hamachi interrupt, status %4.4x.\n",
1601 				   dev->name, intr_status);
1602 
1603 		if (intr_status == 0)
1604 			break;
1605 
1606 		if (intr_status & IntrRxDone)
1607 			hamachi_rx(dev);
1608 
1609 		if (intr_status & IntrTxDone){
1610 			/* This code should RARELY need to execute. After all, this is
1611 			 * a gigabit link, it should consume packets as fast as we put
1612 			 * them in AND we clear the Tx ring in hamachi_start_xmit().
1613 			 */
1614 			if (hmp->tx_full){
1615 				for (; hmp->cur_tx - hmp->dirty_tx > 0; hmp->dirty_tx++){
1616 					int entry = hmp->dirty_tx % TX_RING_SIZE;
1617 					struct sk_buff *skb;
1618 
1619 					if (hmp->tx_ring[entry].status_n_length & cpu_to_le32(DescOwn))
1620 						break;
1621 					skb = hmp->tx_skbuff[entry];
1622 					/* Free the original skb. */
1623 					if (skb){
1624 						pci_unmap_single(hmp->pci_dev,
1625 							hmp->tx_ring[entry].addr,
1626 							skb->len,
1627 							PCI_DMA_TODEVICE);
1628 						dev_kfree_skb_irq(skb);
1629 						hmp->tx_skbuff[entry] = 0;
1630 					}
1631 					hmp->tx_ring[entry].status_n_length = 0;
1632 					if (entry >= TX_RING_SIZE-1)
1633 						hmp->tx_ring[TX_RING_SIZE-1].status_n_length |=
1634 							cpu_to_le32(DescEndRing);
1635 					hmp->stats.tx_packets++;
1636 				}
1637 				if (hmp->cur_tx - hmp->dirty_tx < TX_RING_SIZE - 4){
1638 					/* The ring is no longer full */
1639 					hmp->tx_full = 0;
1640 					netif_wake_queue(dev);
1641 				}
1642 			} else {
1643 				netif_wake_queue(dev);
1644 			}
1645 		}
1646 
1647 
1648 		/* Abnormal error summary/uncommon events handlers. */
1649 		if (intr_status &
1650 			(IntrTxPCIFault | IntrTxPCIErr | IntrRxPCIFault | IntrRxPCIErr |
1651 			 LinkChange | NegotiationChange | StatsMax))
1652 			hamachi_error(dev, intr_status);
1653 
1654 		if (--boguscnt < 0) {
1655 			printk(KERN_WARNING "%s: Too much work at interrupt, status=0x%4.4x.\n",
1656 				   dev->name, intr_status);
1657 			break;
1658 		}
1659 	} while (1);
1660 
1661 	if (hamachi_debug > 3)
1662 		printk(KERN_DEBUG "%s: exiting interrupt, status=%#4.4x.\n",
1663 			   dev->name, readl(ioaddr + IntrStatus));
1664 
1665 #ifndef final_version
1666 	/* Code that should never be run!  Perhaps remove after testing.. */
1667 	{
1668 		static int stopit = 10;
1669 		if (dev->start == 0  &&  --stopit < 0) {
1670 			printk(KERN_ERR "%s: Emergency stop, looping startup interrupt.\n",
1671 				   dev->name);
1672 			free_irq(irq, dev);
1673 		}
1674 	}
1675 #endif
1676 
1677 	spin_unlock(&hmp->lock);
1678 }
1679 
1680 /* This is more properly named "uncommon interrupt events", as it covers more
1681    than just errors. */
hamachi_error(struct net_device * dev,int intr_status)1682 static void hamachi_error(struct net_device *dev, int intr_status)
1683 {
1684 	long ioaddr = dev->base_addr;
1685 	struct hamachi_private *hmp = dev->priv;
1686 
1687 	if (intr_status & (LinkChange|NegotiationChange)) {
1688 		if (hamachi_debug > 1)
1689 			printk(KERN_INFO "%s: Link changed: AutoNegotiation Ctrl"
1690 				   " %4.4x, Status %4.4x %4.4x Intr status %4.4x.\n",
1691 				   dev->name, readw(ioaddr + 0x0E0), readw(ioaddr + 0x0E2),
1692 				   readw(ioaddr + ANLinkPartnerAbility),
1693 				   readl(ioaddr + IntrStatus));
1694 		if (readw(ioaddr + ANStatus) & 0x20)
1695 			writeb(0x01, ioaddr + LEDCtrl);
1696 		else
1697 			writeb(0x03, ioaddr + LEDCtrl);
1698 	}
1699 	if (intr_status & StatsMax) {
1700 		hamachi_get_stats(dev);
1701 		/* Read the overflow bits to clear. */
1702 		readl(ioaddr + 0x370);
1703 		readl(ioaddr + 0x3F0);
1704 	}
1705 	if ((intr_status & ~(LinkChange|StatsMax|NegotiationChange|IntrRxDone|IntrTxDone))
1706 		&& hamachi_debug)
1707 		printk(KERN_ERR "%s: Something Wicked happened! %4.4x.\n",
1708 			   dev->name, intr_status);
1709 	/* Hmmmmm, it's not clear how to recover from PCI faults. */
1710 	if (intr_status & (IntrTxPCIErr | IntrTxPCIFault))
1711 		hmp->stats.tx_fifo_errors++;
1712 	if (intr_status & (IntrRxPCIErr | IntrRxPCIFault))
1713 		hmp->stats.rx_fifo_errors++;
1714 }
1715 
hamachi_close(struct net_device * dev)1716 static int hamachi_close(struct net_device *dev)
1717 {
1718 	long ioaddr = dev->base_addr;
1719 	struct hamachi_private *hmp = dev->priv;
1720 	struct sk_buff *skb;
1721 	int i;
1722 
1723 	netif_stop_queue(dev);
1724 
1725 	if (hamachi_debug > 1) {
1726 		printk(KERN_DEBUG "%s: Shutting down ethercard, status was Tx %4.4x Rx %4.4x Int %2.2x.\n",
1727 			   dev->name, readw(ioaddr + TxStatus),
1728 			   readw(ioaddr + RxStatus), readl(ioaddr + IntrStatus));
1729 		printk(KERN_DEBUG "%s: Queue pointers were Tx %d / %d,  Rx %d / %d.\n",
1730 			   dev->name, hmp->cur_tx, hmp->dirty_tx, hmp->cur_rx, hmp->dirty_rx);
1731 	}
1732 
1733 	/* Disable interrupts by clearing the interrupt mask. */
1734 	writel(0x0000, ioaddr + InterruptEnable);
1735 
1736 	/* Stop the chip's Tx and Rx processes. */
1737 	writel(2, ioaddr + RxCmd);
1738 	writew(2, ioaddr + TxCmd);
1739 
1740 #ifdef __i386__
1741 	if (hamachi_debug > 2) {
1742 		printk("\n"KERN_DEBUG"  Tx ring at %8.8x:\n",
1743 			   (int)hmp->tx_ring_dma);
1744 		for (i = 0; i < TX_RING_SIZE; i++)
1745 			printk(" %c #%d desc. %8.8x %8.8x.\n",
1746 				   readl(ioaddr + TxCurPtr) == (long)&hmp->tx_ring[i] ? '>' : ' ',
1747 				   i, hmp->tx_ring[i].status_n_length, hmp->tx_ring[i].addr);
1748 		printk("\n"KERN_DEBUG "  Rx ring %8.8x:\n",
1749 			   (int)hmp->rx_ring_dma);
1750 		for (i = 0; i < RX_RING_SIZE; i++) {
1751 			printk(KERN_DEBUG " %c #%d desc. %4.4x %8.8x\n",
1752 				   readl(ioaddr + RxCurPtr) == (long)&hmp->rx_ring[i] ? '>' : ' ',
1753 				   i, hmp->rx_ring[i].status_n_length, hmp->rx_ring[i].addr);
1754 			if (hamachi_debug > 6) {
1755 				if (*(u8*)hmp->rx_skbuff[i]->tail != 0x69) {
1756 					u16 *addr = (u16 *)
1757 						hmp->rx_skbuff[i]->tail;
1758 					int j;
1759 
1760 					for (j = 0; j < 0x50; j++)
1761 						printk(" %4.4x", addr[j]);
1762 					printk("\n");
1763 				}
1764 			}
1765 		}
1766 	}
1767 #endif /* __i386__ debugging only */
1768 
1769 	free_irq(dev->irq, dev);
1770 
1771 	del_timer_sync(&hmp->timer);
1772 
1773 	/* Free all the skbuffs in the Rx queue. */
1774 	for (i = 0; i < RX_RING_SIZE; i++) {
1775 		skb = hmp->rx_skbuff[i];
1776 		hmp->rx_ring[i].status_n_length = 0;
1777 		hmp->rx_ring[i].addr = 0xBADF00D0; /* An invalid address. */
1778 		if (skb) {
1779 			pci_unmap_single(hmp->pci_dev,
1780 				hmp->rx_ring[i].addr, hmp->rx_buf_sz,
1781 				PCI_DMA_FROMDEVICE);
1782 			dev_kfree_skb(skb);
1783 			hmp->rx_skbuff[i] = 0;
1784 		}
1785 	}
1786 	for (i = 0; i < TX_RING_SIZE; i++) {
1787 		skb = hmp->tx_skbuff[i];
1788 		if (skb) {
1789 			pci_unmap_single(hmp->pci_dev,
1790 				hmp->tx_ring[i].addr, skb->len,
1791 				PCI_DMA_TODEVICE);
1792 			dev_kfree_skb(skb);
1793 			hmp->tx_skbuff[i] = 0;
1794 		}
1795 	}
1796 
1797 	writeb(0x00, ioaddr + LEDCtrl);
1798 
1799 	return 0;
1800 }
1801 
hamachi_get_stats(struct net_device * dev)1802 static struct net_device_stats *hamachi_get_stats(struct net_device *dev)
1803 {
1804 	long ioaddr = dev->base_addr;
1805 	struct hamachi_private *hmp = dev->priv;
1806 
1807 	/* We should lock this segment of code for SMP eventually, although
1808 	   the vulnerability window is very small and statistics are
1809 	   non-critical. */
1810         /* Ok, what goes here?  This appears to be stuck at 21 packets
1811            according to ifconfig.  It does get incremented in hamachi_tx(),
1812            so I think I'll comment it out here and see if better things
1813            happen.
1814         */
1815 	/* hmp->stats.tx_packets	= readl(ioaddr + 0x000); */
1816 
1817 	hmp->stats.rx_bytes = readl(ioaddr + 0x330); /* Total Uni+Brd+Multi */
1818 	hmp->stats.tx_bytes = readl(ioaddr + 0x3B0); /* Total Uni+Brd+Multi */
1819 	hmp->stats.multicast		= readl(ioaddr + 0x320); /* Multicast Rx */
1820 
1821 	hmp->stats.rx_length_errors	= readl(ioaddr + 0x368); /* Over+Undersized */
1822 	hmp->stats.rx_over_errors	= readl(ioaddr + 0x35C); /* Jabber */
1823 	hmp->stats.rx_crc_errors	= readl(ioaddr + 0x360); /* Jabber */
1824 	hmp->stats.rx_frame_errors	= readl(ioaddr + 0x364); /* Symbol Errs */
1825 	hmp->stats.rx_missed_errors	= readl(ioaddr + 0x36C); /* Dropped */
1826 
1827 	return &hmp->stats;
1828 }
1829 
set_rx_mode(struct net_device * dev)1830 static void set_rx_mode(struct net_device *dev)
1831 {
1832 	long ioaddr = dev->base_addr;
1833 
1834 	if (dev->flags & IFF_PROMISC) {			/* Set promiscuous. */
1835 		/* Unconditionally log net taps. */
1836 		printk(KERN_NOTICE "%s: Promiscuous mode enabled.\n", dev->name);
1837 		writew(0x000F, ioaddr + AddrMode);
1838 	} else if ((dev->mc_count > 63)  ||  (dev->flags & IFF_ALLMULTI)) {
1839 		/* Too many to match, or accept all multicasts. */
1840 		writew(0x000B, ioaddr + AddrMode);
1841 	} else if (dev->mc_count > 0) { /* Must use the CAM filter. */
1842 		struct dev_mc_list *mclist;
1843 		int i;
1844 		for (i = 0, mclist = dev->mc_list; mclist && i < dev->mc_count;
1845 			 i++, mclist = mclist->next) {
1846 			writel(*(u32*)(mclist->dmi_addr), ioaddr + 0x100 + i*8);
1847 			writel(0x20000 | (*(u16*)&mclist->dmi_addr[4]),
1848 				   ioaddr + 0x104 + i*8);
1849 		}
1850 		/* Clear remaining entries. */
1851 		for (; i < 64; i++)
1852 			writel(0, ioaddr + 0x104 + i*8);
1853 		writew(0x0003, ioaddr + AddrMode);
1854 	} else {					/* Normal, unicast/broadcast-only mode. */
1855 		writew(0x0001, ioaddr + AddrMode);
1856 	}
1857 }
1858 
netdev_ethtool_ioctl(struct net_device * dev,void * useraddr)1859 static int netdev_ethtool_ioctl(struct net_device *dev, void *useraddr)
1860 {
1861 	struct hamachi_private *np = dev->priv;
1862 	u32 ethcmd;
1863 
1864 	if (copy_from_user(&ethcmd, useraddr, sizeof(ethcmd)))
1865 		return -EFAULT;
1866 
1867         switch (ethcmd) {
1868         case ETHTOOL_GDRVINFO: {
1869 		struct ethtool_drvinfo info = {ETHTOOL_GDRVINFO};
1870 		strcpy(info.driver, DRV_NAME);
1871 		strcpy(info.version, DRV_VERSION);
1872 		strcpy(info.bus_info, np->pci_dev->slot_name);
1873 		if (copy_to_user(useraddr, &info, sizeof(info)))
1874 			return -EFAULT;
1875 		return 0;
1876 	}
1877 
1878 	/* get settings */
1879 	case ETHTOOL_GSET: {
1880 		struct ethtool_cmd ecmd = { ETHTOOL_GSET };
1881 		if (!(chip_tbl[np->chip_id].flags & CanHaveMII))
1882 			return -EINVAL;
1883 		spin_lock_irq(&np->lock);
1884 		mii_ethtool_gset(&np->mii_if, &ecmd);
1885 		spin_unlock_irq(&np->lock);
1886 		if (copy_to_user(useraddr, &ecmd, sizeof(ecmd)))
1887 			return -EFAULT;
1888 		return 0;
1889 	}
1890 	/* set settings */
1891 	case ETHTOOL_SSET: {
1892 		int r;
1893 		struct ethtool_cmd ecmd;
1894 		if (!(chip_tbl[np->chip_id].flags & CanHaveMII))
1895 			return -EINVAL;
1896 		if (copy_from_user(&ecmd, useraddr, sizeof(ecmd)))
1897 			return -EFAULT;
1898 		spin_lock_irq(&np->lock);
1899 		r = mii_ethtool_sset(&np->mii_if, &ecmd);
1900 		spin_unlock_irq(&np->lock);
1901 		return r;
1902 	}
1903 	/* restart autonegotiation */
1904 	case ETHTOOL_NWAY_RST: {
1905 		if (!(chip_tbl[np->chip_id].flags & CanHaveMII))
1906 			return -EINVAL;
1907 		return mii_nway_restart(&np->mii_if);
1908 	}
1909 	/* get link status */
1910 	case ETHTOOL_GLINK: {
1911 		struct ethtool_value edata = {ETHTOOL_GLINK};
1912 		if (!(chip_tbl[np->chip_id].flags & CanHaveMII))
1913 			return -EINVAL;
1914 		edata.data = mii_link_ok(&np->mii_if);
1915 		if (copy_to_user(useraddr, &edata, sizeof(edata)))
1916 			return -EFAULT;
1917 		return 0;
1918 	}
1919         }
1920 
1921 	return -EOPNOTSUPP;
1922 }
1923 
netdev_ioctl(struct net_device * dev,struct ifreq * rq,int cmd)1924 static int netdev_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
1925 {
1926 	struct hamachi_private *np = dev->priv;
1927 	struct mii_ioctl_data *data = (struct mii_ioctl_data *) & rq->ifr_data;
1928 	int rc;
1929 
1930 	if (!netif_running(dev))
1931 		return -EINVAL;
1932 
1933 	if (cmd == SIOCETHTOOL)
1934 		rc = netdev_ethtool_ioctl(dev, (void *) rq->ifr_data);
1935 
1936 	else if (cmd == (SIOCDEVPRIVATE+3)) { /* set rx,tx intr params */
1937 		u32 *d = (u32 *)&rq->ifr_data;
1938 		/* Should add this check here or an ordinary user can do nasty
1939 		 * things. -KDU
1940 		 *
1941 		 * TODO: Shut down the Rx and Tx engines while doing this.
1942 		 */
1943 		if (!capable(CAP_NET_ADMIN))
1944 			return -EPERM;
1945 		writel(d[0], dev->base_addr + TxIntrCtrl);
1946 		writel(d[1], dev->base_addr + RxIntrCtrl);
1947 		printk(KERN_NOTICE "%s: tx %08x, rx %08x intr\n", dev->name,
1948 		  (u32) readl(dev->base_addr + TxIntrCtrl),
1949 		  (u32) readl(dev->base_addr + RxIntrCtrl));
1950 		rc = 0;
1951 	}
1952 
1953 	else {
1954 		spin_lock_irq(&np->lock);
1955 		rc = generic_mii_ioctl(&np->mii_if, data, cmd, NULL);
1956 		spin_unlock_irq(&np->lock);
1957 	}
1958 
1959 	return rc;
1960 }
1961 
1962 
hamachi_remove_one(struct pci_dev * pdev)1963 static void __devexit hamachi_remove_one (struct pci_dev *pdev)
1964 {
1965 	struct net_device *dev = pci_get_drvdata(pdev);
1966 
1967 	/* No need to check MOD_IN_USE, as sys_delete_module() checks. */
1968 	if (dev) {
1969 		struct hamachi_private *hmp = dev->priv;
1970 
1971 		pci_free_consistent(pdev, RX_TOTAL_SIZE, hmp->rx_ring,
1972 			hmp->rx_ring_dma);
1973 		pci_free_consistent(pdev, TX_TOTAL_SIZE, hmp->tx_ring,
1974 			hmp->tx_ring_dma);
1975 		unregister_netdev(dev);
1976 		iounmap((char *)dev->base_addr);
1977 		kfree(dev);
1978 		pci_release_regions(pdev);
1979 		pci_set_drvdata(pdev, NULL);
1980 	}
1981 }
1982 
1983 static struct pci_device_id hamachi_pci_tbl[] __initdata = {
1984 	{ 0x1318, 0x0911, PCI_ANY_ID, PCI_ANY_ID, },
1985 	{ 0, }
1986 };
1987 MODULE_DEVICE_TABLE(pci, hamachi_pci_tbl);
1988 
1989 static struct pci_driver hamachi_driver = {
1990 	.name		= DRV_NAME,
1991 	.id_table	= hamachi_pci_tbl,
1992 	.probe		= hamachi_init_one,
1993 	.remove		= __devexit_p(hamachi_remove_one),
1994 };
1995 
hamachi_init(void)1996 static int __init hamachi_init (void)
1997 {
1998 /* when a module, this is printed whether or not devices are found in probe */
1999 #ifdef MODULE
2000 	printk(version);
2001 #endif
2002 	if (pci_register_driver(&hamachi_driver) > 0)
2003 		return 0;
2004 	pci_unregister_driver(&hamachi_driver);
2005 	return -ENODEV;
2006 }
2007 
hamachi_exit(void)2008 static void __exit hamachi_exit (void)
2009 {
2010 	pci_unregister_driver(&hamachi_driver);
2011 }
2012 
2013 
2014 module_init(hamachi_init);
2015 module_exit(hamachi_exit);
2016