1 /* 2 * Copyright 1998-2003 VIA Technologies, Inc. All Rights Reserved. 3 * Copyright 2001-2003 S3 Graphics, Inc. All Rights Reserved. 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the "Software"), 7 * to deal in the Software without restriction, including without limitation 8 * the rights to use, copy, modify, merge, publish, distribute, sub license, 9 * and/or sell copies of the Software, and to permit persons to whom the 10 * Software is furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice (including the 13 * next paragraph) shall be included in all copies or substantial portions 14 * of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 19 * VIA, S3 GRAPHICS, AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR 20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 22 * DEALINGS IN THE SOFTWARE. 23 */ 24 25 #ifndef __SAVAGE_DRM_H__ 26 #define __SAVAGE_DRM_H__ 27 28 #ifndef __SAVAGE_SAREA_DEFINES__ 29 #define __SAVAGE_SAREA_DEFINES__ 30 31 #define DRM_SAVAGE_MEM_PAGE (1UL<<12) 32 #define DRM_SAVAGE_MEM_WORK 32 33 #define DRM_SAVAGE_MEM_LOCATION_PCI 1 34 #define DRM_SAVAGE_MEM_LOCATION_AGP 2 35 #define DRM_SAVAGE_DMA_AGP_SIZE (16*1024*1024) 36 37 typedef struct drm_savage_alloc_cont_mem 38 { 39 size_t size; /*size of buffer*/ 40 unsigned long type; /*4k page or word*/ 41 unsigned long alignment; 42 unsigned long location; /*agp or pci*/ 43 44 unsigned long phyaddress; 45 unsigned long linear; 46 } drm_savage_alloc_cont_mem_t; 47 48 typedef struct drm_savage_get_physcis_address 49 { 50 unsigned long v_address; 51 unsigned long p_address; 52 } drm_savage_get_physcis_address_t; 53 54 /*ioctl number*/ 55 #define DRM_IOCTL_SAVAGE_ALLOC_CONTINUOUS_MEM \ 56 DRM_IOWR(0x40,drm_savage_alloc_cont_mem_t) 57 #define DRM_IOCTL_SAVAGE_GET_PHYSICS_ADDRESS \ 58 DRM_IOWR(0x41, drm_savage_get_physcis_address_t) 59 #define DRM_IOCTL_SAVAGE_FREE_CONTINUOUS_MEM \ 60 DRM_IOWR(0x42, drm_savage_alloc_cont_mem_t) 61 62 #define SAVAGE_FRONT 0x1 63 #define SAVAGE_BACK 0x2 64 #define SAVAGE_DEPTH 0x4 65 #define SAVAGE_STENCIL 0x8 66 67 /* What needs to be changed for the current vertex dma buffer? 68 */ 69 #define SAVAGE_UPLOAD_CTX 0x1 70 #define SAVAGE_UPLOAD_TEX0 0x2 71 #define SAVAGE_UPLOAD_TEX1 0x4 72 #define SAVAGE_UPLOAD_PIPE 0x8 /* <- seems should be removed, Jiayo Hsu */ 73 #define SAVAGE_UPLOAD_TEX0IMAGE 0x10 /* handled client-side */ 74 #define SAVAGE_UPLOAD_TEX1IMAGE 0x20 /* handled client-side */ 75 #define SAVAGE_UPLOAD_2D 0x40 76 #define SAVAGE_WAIT_AGE 0x80 /* handled client-side */ 77 #define SAVAGE_UPLOAD_CLIPRECTS 0x100 /* handled client-side */ 78 /*frank:add Buffer state 2001/11/15*/ 79 #define SAVAGE_UPLOAD_BUFFERS 0x200 80 /* original marked off in MGA drivers , Jiayo Hsu Oct.23,2001 */ 81 82 /* Keep these small for testing. 83 */ 84 #define SAVAGE_NR_SAREA_CLIPRECTS 8 85 86 /* 2 heaps (1 for card, 1 for agp), each divided into upto 128 87 * regions, subject to a minimum region size of (1<<16) == 64k. 88 * 89 * Clients may subdivide regions internally, but when sharing between 90 * clients, the region size is the minimum granularity. 91 */ 92 93 #define SAVAGE_CARD_HEAP 0 94 #define SAVAGE_AGP_HEAP 1 95 #define SAVAGE_NR_TEX_HEAPS 2 96 #define SAVAGE_NR_TEX_REGIONS 16 /* num. of global texture manage list element*/ 97 #define SAVAGE_LOG_MIN_TEX_REGION_SIZE 16 /* each region 64K, Jiayo Hsu */ 98 99 #endif /* __SAVAGE_SAREA_DEFINES__ */ 100 101 /* drm_tex_region_t define in drm.h */ 102 103 typedef drm_tex_region_t drm_savage_tex_region_t; 104 105 /* Setup registers for 2D, X server 106 */ 107 typedef struct { 108 unsigned int pitch; 109 } drm_savage_server_regs_t; 110 111 112 typedef struct _drm_savage_sarea { 113 /* The channel for communication of state information to the kernel 114 * on firing a vertex dma buffer. 115 */ 116 unsigned int setup[28]; /* 3D context registers */ 117 drm_savage_server_regs_t server_state; 118 119 unsigned int dirty; 120 121 unsigned int vertsize; /* vertext size */ 122 123 /* The current cliprects, or a subset thereof. 124 */ 125 drm_clip_rect_t boxes[SAVAGE_NR_SAREA_CLIPRECTS]; 126 unsigned int nbox; 127 128 /* Information about the most recently used 3d drawable. The 129 * client fills in the req_* fields, the server fills in the 130 * exported_ fields and puts the cliprects into boxes, above. 131 * 132 * The client clears the exported_drawable field before 133 * clobbering the boxes data. 134 */ 135 unsigned int req_drawable; /* the X drawable id */ 136 unsigned int req_draw_buffer; /* SAVAGE_FRONT or SAVAGE_BACK */ 137 138 unsigned int exported_drawable; 139 unsigned int exported_index; 140 unsigned int exported_stamp; 141 unsigned int exported_buffers; 142 unsigned int exported_nfront; 143 unsigned int exported_nback; 144 int exported_back_x, exported_front_x, exported_w; 145 int exported_back_y, exported_front_y, exported_h; 146 drm_clip_rect_t exported_boxes[SAVAGE_NR_SAREA_CLIPRECTS]; 147 148 /* Counters for aging textures and for client-side throttling. 149 */ 150 unsigned int status[4]; 151 152 153 /* LRU lists for texture memory in agp space and on the card. 154 */ 155 drm_tex_region_t texList[SAVAGE_NR_TEX_HEAPS][SAVAGE_NR_TEX_REGIONS+1]; 156 unsigned int texAge[SAVAGE_NR_TEX_HEAPS]; 157 158 /* Mechanism to validate card state. 159 */ 160 int ctxOwner; 161 unsigned long shadow_status[64];/*too big?*/ 162 163 /*agp offset*/ 164 unsigned long agp_offset; 165 } drm_savage_sarea_t,*drm_savage_sarea_ptr; 166 167 168 169 typedef struct drm_savage_init { 170 171 unsigned long sarea_priv_offset; 172 173 int chipset; 174 int sgram; 175 176 unsigned int maccess; 177 178 unsigned int fb_cpp; 179 unsigned int front_offset, front_pitch; 180 unsigned int back_offset, back_pitch; 181 182 unsigned int depth_cpp; 183 unsigned int depth_offset, depth_pitch; 184 185 unsigned int texture_offset[SAVAGE_NR_TEX_HEAPS]; 186 unsigned int texture_size[SAVAGE_NR_TEX_HEAPS]; 187 188 unsigned long fb_offset; 189 unsigned long mmio_offset; 190 unsigned long status_offset; 191 } drm_savage_init_t; 192 193 typedef struct drm_savage_fullscreen { 194 enum { 195 SAVAGE_INIT_FULLSCREEN = 0x01, 196 SAVAGE_CLEANUP_FULLSCREEN = 0x02 197 } func; 198 } drm_savage_fullscreen_t; 199 200 typedef struct drm_savage_clear { 201 unsigned int flags; 202 unsigned int clear_color; 203 unsigned int clear_depth; 204 unsigned int color_mask; 205 unsigned int depth_mask; 206 } drm_savage_clear_t; 207 208 typedef struct drm_savage_vertex { 209 int idx; /* buffer to queue */ 210 int used; /* bytes in use */ 211 int discard; /* client finished with buffer? */ 212 } drm_savage_vertex_t; 213 214 typedef struct drm_savage_indices { 215 int idx; /* buffer to queue */ 216 unsigned int start; 217 unsigned int end; 218 int discard; /* client finished with buffer? */ 219 } drm_savage_indices_t; 220 221 typedef struct drm_savage_iload { 222 int idx; 223 unsigned int dstorg; 224 unsigned int length; 225 } drm_savage_iload_t; 226 227 typedef struct _drm_savage_blit { 228 unsigned int planemask; 229 unsigned int srcorg; 230 unsigned int dstorg; 231 int src_pitch, dst_pitch; 232 int delta_sx, delta_sy; 233 int delta_dx, delta_dy; 234 int height, ydir; /* flip image vertically */ 235 int source_pitch, dest_pitch; 236 } drm_savage_blit_t; 237 238 #endif 239