Searched refs:divisors (Results 1 – 3 of 3) sorted by relevance
83 @ For very big divisors, we must shift it a bit at a time, or142 @ For very big divisors, we must shift it a bit at a time, or212 @ For very big divisors, we must shift it a bit at a time, or272 @ For very big divisors, we must shift it a bit at a time, or
78 u_int divisors[4]; member722 new_pll = pll_ps / cfb->divisors[div2]; in cyber2000fb_decode_clock()1491 cfb->divisors[0] = 1; in cyberpro_alloc_fb_info()1492 cfb->divisors[1] = 2; in cyberpro_alloc_fb_info()1493 cfb->divisors[2] = 4; in cyberpro_alloc_fb_info()1496 cfb->divisors[3] = 8; in cyberpro_alloc_fb_info()1498 cfb->divisors[3] = 6; in cyberpro_alloc_fb_info()
1390 clock and 5 clock divisors.1392 and using 4 clock divisors and so applies to all NCR53C8XX chips in fast