Searched refs:disp_a_ctrl (Results 1 – 2 of 2) sorted by relevance
470 hw->disp_a_ctrl = INREG(DSPACNTR); in intelfbhw_read_hw_state()640 printk(" DSPACNTR: 0x%08x\n", hw->disp_a_ctrl); in intelfbhw_print_hw_state()940 hw->disp_a_ctrl |= DISPPLANE_PLANE_ENABLE; in intelfbhw_mode_to_hw()941 hw->disp_a_ctrl &= ~DISPPLANE_GAMMA_ENABLE; in intelfbhw_mode_to_hw()942 hw->disp_a_ctrl &= ~DISPPLANE_PIXFORMAT_MASK; in intelfbhw_mode_to_hw()945 hw->disp_a_ctrl |= DISPPLANE_8BPP | DISPPLANE_GAMMA_ENABLE; in intelfbhw_mode_to_hw()948 hw->disp_a_ctrl |= DISPPLANE_15_16BPP; in intelfbhw_mode_to_hw()951 hw->disp_a_ctrl |= DISPPLANE_16BPP; in intelfbhw_mode_to_hw()954 hw->disp_a_ctrl |= DISPPLANE_32BPP_NO_ALPHA; in intelfbhw_mode_to_hw()957 hw->disp_a_ctrl &= ~(PIPE_MASK << DISPPLANE_SEL_PIPE_SHIFT); in intelfbhw_mode_to_hw()[all …]
209 u32 disp_a_ctrl; member