1 /*
2 * Copyright (c) 2001-2002 by David Brownell
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of the GNU General Public License as published by the
6 * Free Software Foundation; either version 2 of the License, or (at your
7 * option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful, but
10 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
11 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software Foundation,
16 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
17 */
18
19 /* this file is part of ehci-hcd.c */
20
21 #ifdef DEBUG
22 #define ehci_dbg(ehci, fmt, args...) \
23 printk(KERN_DEBUG "%s %s: " fmt , hcd_name , \
24 (ehci)->hcd.pdev->slot_name , ## args )
25 #else
26 #define ehci_dbg(ehci, fmt, args...) do { } while (0)
27 #endif
28
29 #define ehci_err(ehci, fmt, args...) \
30 printk(KERN_ERR "%s %s: " fmt , hcd_name , \
31 (ehci)->hcd.pdev->slot_name , ## args )
32 #define ehci_info(ehci, fmt, args...) \
33 printk(KERN_INFO "%s %s: " fmt , hcd_name , \
34 (ehci)->hcd.pdev->slot_name , ## args )
35 #define ehci_warn(ehci, fmt, args...) \
36 printk(KERN_WARNING "%s %s: " fmt , hcd_name , \
37 (ehci)->hcd.pdev->slot_name , ## args )
38
39
40 #ifdef EHCI_VERBOSE_DEBUG
41 # define vdbg dbg
42 # define ehci_vdbg ehci_dbg
43 #else
44 # define vdbg(fmt,args...) do { } while (0)
45 # define ehci_vdbg(ehci, fmt, args...) do { } while (0)
46 #endif
47
48 #ifdef DEBUG
49
50 /* check the values in the HCSPARAMS register
51 * (host controller _Structural_ parameters)
52 * see EHCI spec, Table 2-4 for each value
53 */
dbg_hcs_params(struct ehci_hcd * ehci,char * label)54 static void dbg_hcs_params (struct ehci_hcd *ehci, char *label)
55 {
56 u32 params = readl (&ehci->caps->hcs_params);
57
58 ehci_dbg (ehci,
59 "%s hcs_params 0x%x dbg=%d%s cc=%d pcc=%d%s%s ports=%d\n",
60 label, params,
61 HCS_DEBUG_PORT (params),
62 HCS_INDICATOR (params) ? " ind" : "",
63 HCS_N_CC (params),
64 HCS_N_PCC (params),
65 HCS_PORTROUTED (params) ? "" : " ordered",
66 HCS_PPC (params) ? "" : " !ppc",
67 HCS_N_PORTS (params)
68 );
69 /* Port routing, per EHCI 0.95 Spec, Section 2.2.5 */
70 if (HCS_PORTROUTED (params)) {
71 int i;
72 char buf [46], tmp [7], byte;
73
74 buf[0] = 0;
75 for (i = 0; i < HCS_N_PORTS (params); i++) {
76 // FIXME MIPS won't readb() ...
77 byte = readb (&ehci->caps->portroute[(i>>1)]);
78 sprintf(tmp, "%d ",
79 ((i & 0x1) ? ((byte)&0xf) : ((byte>>4)&0xf)));
80 strcat(buf, tmp);
81 }
82 ehci_dbg (ehci, "%s portroute %s\n",
83 label, buf);
84 }
85 }
86 #else
87
dbg_hcs_params(struct ehci_hcd * ehci,char * label)88 static inline void dbg_hcs_params (struct ehci_hcd *ehci, char *label) {}
89
90 #endif
91
92 #ifdef DEBUG
93
94 /* check the values in the HCCPARAMS register
95 * (host controller _Capability_ parameters)
96 * see EHCI Spec, Table 2-5 for each value
97 * */
dbg_hcc_params(struct ehci_hcd * ehci,char * label)98 static void dbg_hcc_params (struct ehci_hcd *ehci, char *label)
99 {
100 u32 params = readl (&ehci->caps->hcc_params);
101
102 if (HCC_ISOC_CACHE (params)) {
103 ehci_dbg (ehci,
104 "%s hcc_params %04x caching frame %s%s%s\n",
105 label, params,
106 HCC_PGM_FRAMELISTLEN (params) ? "256/512/1024" : "1024",
107 HCC_CANPARK (params) ? " park" : "",
108 HCC_64BIT_ADDR (params) ? " 64 bit addr" : "");
109 } else {
110 ehci_dbg (ehci,
111 "%s hcc_params %04x thresh %d uframes %s%s%s\n",
112 label,
113 params,
114 HCC_ISOC_THRES (params),
115 HCC_PGM_FRAMELISTLEN (params) ? "256/512/1024" : "1024",
116 HCC_CANPARK (params) ? " park" : "",
117 HCC_64BIT_ADDR (params) ? " 64 bit addr" : "");
118 }
119 }
120 #else
121
dbg_hcc_params(struct ehci_hcd * ehci,char * label)122 static inline void dbg_hcc_params (struct ehci_hcd *ehci, char *label) {}
123
124 #endif
125
126 #ifdef DEBUG
127
128 static void __attribute__((__unused__))
dbg_qtd(const char * label,struct ehci_hcd * ehci,struct ehci_qtd * qtd)129 dbg_qtd (const char *label, struct ehci_hcd *ehci, struct ehci_qtd *qtd)
130 {
131 ehci_dbg (ehci, "%s td %p n%08x %08x t%08x p0=%08x\n", label, qtd,
132 cpu_to_le32p (&qtd->hw_next),
133 cpu_to_le32p (&qtd->hw_alt_next),
134 cpu_to_le32p (&qtd->hw_token),
135 cpu_to_le32p (&qtd->hw_buf [0]));
136 if (qtd->hw_buf [1])
137 ehci_dbg (ehci, " p1=%08x p2=%08x p3=%08x p4=%08x\n",
138 cpu_to_le32p (&qtd->hw_buf [1]),
139 cpu_to_le32p (&qtd->hw_buf [2]),
140 cpu_to_le32p (&qtd->hw_buf [3]),
141 cpu_to_le32p (&qtd->hw_buf [4]));
142 }
143
144 static void __attribute__((__unused__))
dbg_qh(const char * label,struct ehci_hcd * ehci,struct ehci_qh * qh)145 dbg_qh (const char *label, struct ehci_hcd *ehci, struct ehci_qh *qh)
146 {
147 ehci_dbg (ehci, "%s qh %p n%08x info %x %x qtd %x\n", label,
148 qh, qh->hw_next, qh->hw_info1, qh->hw_info2,
149 qh->hw_current);
150 dbg_qtd ("overlay", ehci, (struct ehci_qtd *) &qh->hw_qtd_next);
151 }
152
153 static void __attribute__((__unused__))
dbg_itd(const char * label,struct ehci_hcd * ehci,struct ehci_itd * itd)154 dbg_itd (const char *label, struct ehci_hcd *ehci, struct ehci_itd *itd)
155 {
156 ehci_dbg (ehci, "%s [%d] itd %p, next %08x, urb %p\n",
157 label, itd->frame, itd, le32_to_cpu(itd->hw_next), itd->urb);
158 ehci_dbg (ehci,
159 " trans: %08x %08x %08x %08x %08x %08x %08x %08x\n",
160 le32_to_cpu(itd->hw_transaction[0]),
161 le32_to_cpu(itd->hw_transaction[1]),
162 le32_to_cpu(itd->hw_transaction[2]),
163 le32_to_cpu(itd->hw_transaction[3]),
164 le32_to_cpu(itd->hw_transaction[4]),
165 le32_to_cpu(itd->hw_transaction[5]),
166 le32_to_cpu(itd->hw_transaction[6]),
167 le32_to_cpu(itd->hw_transaction[7]));
168 ehci_dbg (ehci,
169 " buf: %08x %08x %08x %08x %08x %08x %08x\n",
170 le32_to_cpu(itd->hw_bufp[0]),
171 le32_to_cpu(itd->hw_bufp[1]),
172 le32_to_cpu(itd->hw_bufp[2]),
173 le32_to_cpu(itd->hw_bufp[3]),
174 le32_to_cpu(itd->hw_bufp[4]),
175 le32_to_cpu(itd->hw_bufp[5]),
176 le32_to_cpu(itd->hw_bufp[6]));
177 ehci_dbg (ehci, " index: %d %d %d %d %d %d %d %d\n",
178 itd->index[0], itd->index[1], itd->index[2],
179 itd->index[3], itd->index[4], itd->index[5],
180 itd->index[6], itd->index[7]);
181 }
182
183 static int __attribute__((__unused__))
dbg_status_buf(char * buf,unsigned len,char * label,u32 status)184 dbg_status_buf (char *buf, unsigned len, char *label, u32 status)
185 {
186 return snprintf (buf, len,
187 "%s%sstatus %04x%s%s%s%s%s%s%s%s%s%s",
188 label, label [0] ? " " : "", status,
189 (status & STS_ASS) ? " Async" : "",
190 (status & STS_PSS) ? " Periodic" : "",
191 (status & STS_RECL) ? " Recl" : "",
192 (status & STS_HALT) ? " Halt" : "",
193 (status & STS_IAA) ? " IAA" : "",
194 (status & STS_FATAL) ? " FATAL" : "",
195 (status & STS_FLR) ? " FLR" : "",
196 (status & STS_PCD) ? " PCD" : "",
197 (status & STS_ERR) ? " ERR" : "",
198 (status & STS_INT) ? " INT" : ""
199 );
200 }
201
202 static int __attribute__((__unused__))
dbg_intr_buf(char * buf,unsigned len,char * label,u32 enable)203 dbg_intr_buf (char *buf, unsigned len, char *label, u32 enable)
204 {
205 return snprintf (buf, len,
206 "%s%sintrenable %02x%s%s%s%s%s%s",
207 label, label [0] ? " " : "", enable,
208 (enable & STS_IAA) ? " IAA" : "",
209 (enable & STS_FATAL) ? " FATAL" : "",
210 (enable & STS_FLR) ? " FLR" : "",
211 (enable & STS_PCD) ? " PCD" : "",
212 (enable & STS_ERR) ? " ERR" : "",
213 (enable & STS_INT) ? " INT" : ""
214 );
215 }
216
217 static const char *const fls_strings [] =
218 { "1024", "512", "256", "??" };
219
dbg_command_buf(char * buf,unsigned len,char * label,u32 command)220 static int dbg_command_buf (char *buf, unsigned len, char *label, u32 command)
221 {
222 return snprintf (buf, len,
223 "%s%scommand %06x %s=%d ithresh=%d%s%s%s%s period=%s%s %s",
224 label, label [0] ? " " : "", command,
225 (command & CMD_PARK) ? "park" : "(park)",
226 CMD_PARK_CNT (command),
227 (command >> 16) & 0x3f,
228 (command & CMD_LRESET) ? " LReset" : "",
229 (command & CMD_IAAD) ? " IAAD" : "",
230 (command & CMD_ASE) ? " Async" : "",
231 (command & CMD_PSE) ? " Periodic" : "",
232 fls_strings [(command >> 2) & 0x3],
233 (command & CMD_RESET) ? " Reset" : "",
234 (command & CMD_RUN) ? "RUN" : "HALT"
235 );
236 }
237
238 static int
dbg_port_buf(char * buf,unsigned len,char * label,int port,u32 status)239 dbg_port_buf (char *buf, unsigned len, char *label, int port, u32 status)
240 {
241 char *sig;
242
243 /* signaling state */
244 switch (status & (3 << 10)) {
245 case 0 << 10: sig = "se0"; break;
246 case 1 << 10: sig = "k"; break; /* low speed */
247 case 2 << 10: sig = "j"; break;
248 default: sig = "?"; break;
249 }
250
251 return snprintf (buf, len,
252 "%s%sport %d status %06x%s%s sig=%s %s%s%s%s%s%s%s%s%s",
253 label, label [0] ? " " : "", port, status,
254 (status & PORT_POWER) ? " POWER" : "",
255 (status & PORT_OWNER) ? " OWNER" : "",
256 sig,
257 (status & PORT_RESET) ? " RESET" : "",
258 (status & PORT_SUSPEND) ? " SUSPEND" : "",
259 (status & PORT_RESUME) ? " RESUME" : "",
260 (status & PORT_OCC) ? " OCC" : "",
261 (status & PORT_OC) ? " OC" : "",
262 (status & PORT_PEC) ? " PEC" : "",
263 (status & PORT_PE) ? " PE" : "",
264 (status & PORT_CSC) ? " CSC" : "",
265 (status & PORT_CONNECT) ? " CONNECT" : ""
266 );
267 }
268
269 #else
270 static inline void __attribute__((__unused__))
dbg_qh(char * label,struct ehci_hcd * ehci,struct ehci_qh * qh)271 dbg_qh (char *label, struct ehci_hcd *ehci, struct ehci_qh *qh)
272 {}
273
274 static inline int __attribute__((__unused__))
dbg_status_buf(char * buf,unsigned len,char * label,u32 status)275 dbg_status_buf (char *buf, unsigned len, char *label, u32 status)
276 { return 0; }
277
278 static inline int __attribute__((__unused__))
dbg_command_buf(char * buf,unsigned len,char * label,u32 command)279 dbg_command_buf (char *buf, unsigned len, char *label, u32 command)
280 { return 0; }
281
282 static inline int __attribute__((__unused__))
dbg_intr_buf(char * buf,unsigned len,char * label,u32 enable)283 dbg_intr_buf (char *buf, unsigned len, char *label, u32 enable)
284 { return 0; }
285
286 static inline int __attribute__((__unused__))
dbg_port_buf(char * buf,unsigned len,char * label,int port,u32 status)287 dbg_port_buf (char *buf, unsigned len, char *label, int port, u32 status)
288 { return 0; }
289
290 #endif /* DEBUG */
291
292 /* functions have the "wrong" filename when they're output... */
293 #define dbg_status(ehci, label, status) { \
294 char _buf [80]; \
295 dbg_status_buf (_buf, sizeof _buf, label, status); \
296 ehci_dbg (ehci, "%s\n", _buf); \
297 }
298
299 #define dbg_cmd(ehci, label, command) { \
300 char _buf [80]; \
301 dbg_command_buf (_buf, sizeof _buf, label, command); \
302 ehci_dbg (ehci, "%s\n", _buf); \
303 }
304
305 #define dbg_port(ehci, label, port, status) { \
306 char _buf [80]; \
307 dbg_port_buf (_buf, sizeof _buf, label, port, status); \
308 ehci_dbg (ehci, "%s\n", _buf); \
309 }
310
311 /*-------------------------------------------------------------------------*/
312
313 #ifdef STUB_DEBUG_FILES
314
create_debug_files(struct ehci_hcd * bus)315 static inline void create_debug_files (struct ehci_hcd *bus) { }
remove_debug_files(struct ehci_hcd * bus)316 static inline void remove_debug_files (struct ehci_hcd *bus) { }
317
318 #else
319
320 /* troubleshooting help: expose state in driverfs */
321
322 #define speed_char(info1) ({ char tmp; \
323 switch (info1 & (3 << 12)) { \
324 case 0 << 12: tmp = 'f'; break; \
325 case 1 << 12: tmp = 'l'; break; \
326 case 2 << 12: tmp = 'h'; break; \
327 default: tmp = '?'; break; \
328 }; tmp; })
329
token_mark(u32 token)330 static inline char token_mark (u32 token)
331 {
332 token = le32_to_cpu (token);
333 if (token & QTD_STS_ACTIVE)
334 return '*';
335 if (token & QTD_STS_HALT)
336 return '-';
337 if (!IS_SHORT_READ (token))
338 return ' ';
339 /* tries to advance through hw_alt_next */
340 return '/';
341 }
342
qh_lines(struct ehci_hcd * ehci,struct ehci_qh * qh,char ** nextp,unsigned * sizep)343 static void qh_lines (
344 struct ehci_hcd *ehci,
345 struct ehci_qh *qh,
346 char **nextp,
347 unsigned *sizep
348 )
349 {
350 u32 scratch;
351 u32 hw_curr;
352 struct list_head *entry;
353 struct ehci_qtd *td;
354 unsigned temp;
355 unsigned size = *sizep;
356 char *next = *nextp;
357 char mark;
358
359 if (qh->hw_qtd_next == EHCI_LIST_END) /* NEC does this */
360 mark = '@';
361 else
362 mark = token_mark (qh->hw_token);
363 if (mark == '/') { /* qh_alt_next controls qh advance? */
364 if ((qh->hw_alt_next & QTD_MASK) == ehci->async->hw_alt_next)
365 mark = '#'; /* blocked */
366 else if (qh->hw_alt_next == EHCI_LIST_END)
367 mark = '.'; /* use hw_qtd_next */
368 /* else alt_next points to some other qtd */
369 }
370 scratch = cpu_to_le32p (&qh->hw_info1);
371 hw_curr = (mark == '*') ? cpu_to_le32p (&qh->hw_current) : 0;
372 temp = snprintf (next, size,
373 "qh/%p dev%d %cs ep%d %08x %08x (%08x%c %s nak%d)",
374 qh, scratch & 0x007f,
375 speed_char (scratch),
376 (scratch >> 8) & 0x000f,
377 scratch, cpu_to_le32p (&qh->hw_info2),
378 cpu_to_le32p (&qh->hw_token), mark,
379 (__constant_cpu_to_le32 (QTD_TOGGLE) & qh->hw_token)
380 ? "data1" : "data0",
381 (cpu_to_le32p (&qh->hw_alt_next) >> 1) & 0x0f);
382 size -= temp;
383 next += temp;
384
385 /* hc may be modifying the list as we read it ... */
386 list_for_each (entry, &qh->qtd_list) {
387 td = list_entry (entry, struct ehci_qtd, qtd_list);
388 scratch = cpu_to_le32p (&td->hw_token);
389 mark = ' ';
390 if (hw_curr == td->qtd_dma)
391 mark = '*';
392 else if (qh->hw_qtd_next == td->qtd_dma)
393 mark = '+';
394 else if (QTD_LENGTH (scratch)) {
395 if (td->hw_alt_next == ehci->async->hw_alt_next)
396 mark = '#';
397 else if (td->hw_alt_next != EHCI_LIST_END)
398 mark = '/';
399 }
400 temp = snprintf (next, size,
401 "\n\t%p%c%s len=%d %08x urb %p",
402 td, mark, ({ char *tmp;
403 switch ((scratch>>8)&0x03) {
404 case 0: tmp = "out"; break;
405 case 1: tmp = "in"; break;
406 case 2: tmp = "setup"; break;
407 default: tmp = "?"; break;
408 } tmp;}),
409 (scratch >> 16) & 0x7fff,
410 scratch,
411 td->urb);
412 if (temp < 0)
413 temp = 0;
414 else if (size < temp)
415 temp = size;
416 size -= temp;
417 next += temp;
418 if (temp == size)
419 goto done;
420 }
421
422 temp = snprintf (next, size, "\n");
423 if (temp < 0)
424 temp = 0;
425 else if (size < temp)
426 temp = size;
427 size -= temp;
428 next += temp;
429
430 done:
431 *sizep = size;
432 *nextp = next;
433 }
434
435 static ssize_t
show_async(struct device * dev,char * buf)436 show_async (struct device *dev, char *buf)
437 {
438 struct pci_dev *pdev;
439 struct ehci_hcd *ehci;
440 unsigned long flags;
441 unsigned temp, size;
442 char *next;
443 struct ehci_qh *qh;
444
445 *buf = 0;
446
447 pdev = container_of (dev, struct pci_dev, dev);
448 ehci = container_of (pci_get_drvdata (pdev), struct ehci_hcd, hcd);
449 next = buf;
450 size = PAGE_SIZE;
451
452 /* dumps a snapshot of the async schedule.
453 * usually empty except for long-term bulk reads, or head.
454 * one QH per line, and TDs we know about
455 */
456 spin_lock_irqsave (&ehci->lock, flags);
457 for (qh = ehci->async->qh_next.qh; size > 0 && qh; qh = qh->qh_next.qh)
458 qh_lines (ehci, qh, &next, &size);
459 if (ehci->reclaim && size > 0) {
460 temp = snprintf (next, size, "\nreclaim =\n");
461 size -= temp;
462 next += temp;
463
464 for (qh = ehci->reclaim; size > 0 && qh; qh = qh->reclaim)
465 qh_lines (ehci, qh, &next, &size);
466 }
467 spin_unlock_irqrestore (&ehci->lock, flags);
468
469 return strlen (buf);
470 }
471 static DEVICE_ATTR (async, S_IRUGO, show_async, NULL);
472
473 #define DBG_SCHED_LIMIT 64
474
475 static ssize_t
show_periodic(struct device * dev,char * buf)476 show_periodic (struct device *dev, char *buf)
477 {
478 struct pci_dev *pdev;
479 struct ehci_hcd *ehci;
480 unsigned long flags;
481 union ehci_shadow p, *seen;
482 unsigned temp, size, seen_count;
483 char *next;
484 unsigned i, tag;
485
486 if (!(seen = kmalloc (DBG_SCHED_LIMIT * sizeof *seen, SLAB_ATOMIC)))
487 return 0;
488 seen_count = 0;
489
490 pdev = container_of (dev, struct pci_dev, dev);
491 ehci = container_of (pci_get_drvdata (pdev), struct ehci_hcd, hcd);
492 next = buf;
493 size = PAGE_SIZE;
494
495 temp = snprintf (next, size, "size = %d\n", ehci->periodic_size);
496 size -= temp;
497 next += temp;
498
499 /* dump a snapshot of the periodic schedule.
500 * iso changes, interrupt usually doesn't.
501 */
502 spin_lock_irqsave (&ehci->lock, flags);
503 for (i = 0; i < ehci->periodic_size; i++) {
504 p = ehci->pshadow [i];
505 if (likely (!p.ptr))
506 continue;
507 tag = Q_NEXT_TYPE (ehci->periodic [i]);
508
509 temp = snprintf (next, size, "%4d: ", i);
510 size -= temp;
511 next += temp;
512
513 do {
514 switch (tag) {
515 case Q_TYPE_QH:
516 temp = snprintf (next, size, " qh%d/%p",
517 p.qh->period, p.qh);
518 size -= temp;
519 next += temp;
520 for (temp = 0; temp < seen_count; temp++) {
521 if (seen [temp].ptr == p.ptr)
522 break;
523 }
524 /* show more info the first time around */
525 if (temp == seen_count && p.ptr) {
526 u32 scratch = cpu_to_le32p (
527 &p.qh->hw_info1);
528
529 temp = snprintf (next, size,
530 " (%cs dev%d ep%d [%d/%d] %d)",
531 speed_char (scratch),
532 scratch & 0x007f,
533 (scratch >> 8) & 0x000f,
534 p.qh->usecs, p.qh->c_usecs,
535 0x7ff & (scratch >> 16));
536
537 /* FIXME TD info too */
538
539 if (seen_count < DBG_SCHED_LIMIT)
540 seen [seen_count++].qh = p.qh;
541 } else
542 temp = 0;
543 if (p.qh) {
544 tag = Q_NEXT_TYPE (p.qh->hw_next);
545 p = p.qh->qh_next;
546 }
547 break;
548 case Q_TYPE_FSTN:
549 temp = snprintf (next, size,
550 " fstn-%8x/%p", p.fstn->hw_prev,
551 p.fstn);
552 tag = Q_NEXT_TYPE (p.fstn->hw_next);
553 p = p.fstn->fstn_next;
554 break;
555 case Q_TYPE_ITD:
556 temp = snprintf (next, size,
557 " itd/%p", p.itd);
558 tag = Q_NEXT_TYPE (p.itd->hw_next);
559 p = p.itd->itd_next;
560 break;
561 case Q_TYPE_SITD:
562 temp = snprintf (next, size,
563 " sitd/%p", p.sitd);
564 tag = Q_NEXT_TYPE (p.sitd->hw_next);
565 p = p.sitd->sitd_next;
566 break;
567 }
568 size -= temp;
569 next += temp;
570 } while (p.ptr);
571
572 temp = snprintf (next, size, "\n");
573 size -= temp;
574 next += temp;
575 }
576 spin_unlock_irqrestore (&ehci->lock, flags);
577 kfree (seen);
578
579 return PAGE_SIZE - size;
580 }
581 static DEVICE_ATTR (periodic, S_IRUGO, show_periodic, NULL);
582
583 #undef DBG_SCHED_LIMIT
584
585 static ssize_t
show_registers(struct device * dev,char * buf)586 show_registers (struct device *dev, char *buf)
587 {
588 struct pci_dev *pdev;
589 struct ehci_hcd *ehci;
590 unsigned long flags;
591 unsigned temp, size, i;
592 char *next, scratch [80];
593 static char fmt [] = "%*s\n";
594 static char label [] = "";
595
596 pdev = container_of (dev, struct pci_dev, dev);
597 ehci = container_of (pci_get_drvdata (pdev), struct ehci_hcd, hcd);
598
599 next = buf;
600 size = PAGE_SIZE;
601
602 spin_lock_irqsave (&ehci->lock, flags);
603
604 /* Capability Registers */
605 i = HC_VERSION(readl (&ehci->caps->hc_capbase));
606 temp = snprintf (next, size,
607 "%s\nEHCI %x.%02x, hcd state %d (driver " DRIVER_VERSION ")\n",
608 pdev->dev.name,
609 i >> 8, i & 0x0ff, ehci->hcd.state);
610 size -= temp;
611 next += temp;
612
613 // FIXME interpret both types of params
614 i = readl (&ehci->caps->hcs_params);
615 temp = snprintf (next, size, "structural params 0x%08x\n", i);
616 size -= temp;
617 next += temp;
618
619 i = readl (&ehci->caps->hcc_params);
620 temp = snprintf (next, size, "capability params 0x%08x\n", i);
621 size -= temp;
622 next += temp;
623
624 /* Operational Registers */
625 temp = dbg_status_buf (scratch, sizeof scratch, label,
626 readl (&ehci->regs->status));
627 temp = snprintf (next, size, fmt, temp, scratch);
628 size -= temp;
629 next += temp;
630
631 temp = dbg_command_buf (scratch, sizeof scratch, label,
632 readl (&ehci->regs->command));
633 temp = snprintf (next, size, fmt, temp, scratch);
634 size -= temp;
635 next += temp;
636
637 temp = dbg_intr_buf (scratch, sizeof scratch, label,
638 readl (&ehci->regs->intr_enable));
639 temp = snprintf (next, size, fmt, temp, scratch);
640 size -= temp;
641 next += temp;
642
643 temp = snprintf (next, size, "uframe %04x\n",
644 readl (&ehci->regs->frame_index));
645 size -= temp;
646 next += temp;
647
648 for (i = 0; i < HCS_N_PORTS (ehci->hcs_params); i++) {
649 temp = dbg_port_buf (scratch, sizeof scratch, label, i,
650 readl (&ehci->regs->port_status [i]));
651 temp = snprintf (next, size, fmt, temp, scratch);
652 size -= temp;
653 next += temp;
654 }
655
656 if (ehci->reclaim) {
657 temp = snprintf (next, size, "reclaim qh %p%s\n",
658 ehci->reclaim,
659 ehci->reclaim_ready ? " ready" : "");
660 size -= temp;
661 next += temp;
662 }
663
664 #ifdef EHCI_STATS
665 temp = snprintf (next, size,
666 "irq normal %ld err %ld reclaim %ld (lost %ld)\n",
667 ehci->stats.normal, ehci->stats.error, ehci->stats.reclaim,
668 ehci->stats.lost_iaa);
669 size -= temp;
670 next += temp;
671
672 temp = snprintf (next, size, "complete %ld unlink %ld\n",
673 ehci->stats.complete, ehci->stats.unlink);
674 size -= temp;
675 next += temp;
676 #endif
677
678 spin_unlock_irqrestore (&ehci->lock, flags);
679
680 return PAGE_SIZE - size;
681 }
682 static DEVICE_ATTR (registers, S_IRUGO, show_registers, NULL);
683
create_debug_files(struct ehci_hcd * bus)684 static inline void create_debug_files (struct ehci_hcd *bus)
685 {
686 device_create_file (&bus->hcd.pdev->dev, &dev_attr_async);
687 device_create_file (&bus->hcd.pdev->dev, &dev_attr_periodic);
688 device_create_file (&bus->hcd.pdev->dev, &dev_attr_registers);
689 }
690
remove_debug_files(struct ehci_hcd * bus)691 static inline void remove_debug_files (struct ehci_hcd *bus)
692 {
693 device_remove_file (&bus->hcd.pdev->dev, &dev_attr_async);
694 device_remove_file (&bus->hcd.pdev->dev, &dev_attr_periodic);
695 device_remove_file (&bus->hcd.pdev->dev, &dev_attr_registers);
696 }
697
698 #endif /* STUB_DEBUG_FILES */
699
700