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Searched refs:ctx (Results 1 – 25 of 85) sorted by relevance

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/linux-2.4.37.9/net/sctp/
Dsla1.c56 void SLA1_Init(struct SLA_1_Context *ctx) in SLA1_Init() argument
59 ctx->A = 0; in SLA1_Init()
60 ctx->B = 0; in SLA1_Init()
61 ctx->C = 0; in SLA1_Init()
62 ctx->D = 0; in SLA1_Init()
63 ctx->E = 0; in SLA1_Init()
64 ctx->H0 = H0INIT; in SLA1_Init()
65 ctx->H1 = H1INIT; in SLA1_Init()
66 ctx->H2 = H2INIT; in SLA1_Init()
67 ctx->H3 = H3INIT; in SLA1_Init()
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/linux-2.4.37.9/drivers/char/drm-4.0/
Dffb_context.c42 struct ffb_hw_context *ctx; in ffb_save_context() local
45 ctx = fpriv->hw_state[idx - 1]; in ffb_save_context()
46 if (idx == 0 || ctx == NULL) in ffb_save_context()
49 if (ctx->is_2d_only) { in ffb_save_context()
53 ctx->drawop = upa_readl(&ffb->drawop); in ffb_save_context()
54 ctx->ppc = upa_readl(&ffb->ppc); in ffb_save_context()
55 ctx->wid = upa_readl(&ffb->wid); in ffb_save_context()
56 ctx->fg = upa_readl(&ffb->fg); in ffb_save_context()
57 ctx->bg = upa_readl(&ffb->bg); in ffb_save_context()
58 ctx->xclip = upa_readl(&ffb->xclip); in ffb_save_context()
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Dr128_context.c87 atomic_inc(&dev->histo.ctx[drm_histogram_slot(get_cycles() in r128_context_switch_complete()
102 drm_ctx_t ctx; in r128_resctx() local
109 memset(&ctx, 0, sizeof(ctx)); in r128_resctx()
111 ctx.handle = i; in r128_resctx()
130 drm_ctx_t ctx; in r128_addctx() local
132 if (copy_from_user(&ctx, (drm_ctx_t *)arg, sizeof(ctx))) in r128_addctx()
134 if ((ctx.handle = r128_alloc_queue(dev)) == DRM_KERNEL_CONTEXT) { in r128_addctx()
136 ctx.handle = r128_alloc_queue(dev); in r128_addctx()
138 DRM_DEBUG("%d\n", ctx.handle); in r128_addctx()
139 if (ctx.handle == -1) { in r128_addctx()
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Dradeon_context.c87 atomic_inc(&dev->histo.ctx[drm_histogram_slot(get_cycles() in radeon_context_switch_complete()
102 drm_ctx_t ctx; in radeon_resctx() local
109 memset(&ctx, 0, sizeof(ctx)); in radeon_resctx()
111 ctx.handle = i; in radeon_resctx()
128 drm_ctx_t ctx; in radeon_addctx() local
130 if (copy_from_user(&ctx, (drm_ctx_t *)arg, sizeof(ctx))) in radeon_addctx()
132 if ((ctx.handle = radeon_alloc_queue(dev)) == DRM_KERNEL_CONTEXT) { in radeon_addctx()
134 ctx.handle = radeon_alloc_queue(dev); in radeon_addctx()
136 DRM_DEBUG("%d\n", ctx.handle); in radeon_addctx()
137 if (ctx.handle == -1) { in radeon_addctx()
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Dtdfx_context.c89 atomic_inc(&dev->histo.ctx[drm_histogram_slot(get_cycles() in tdfx_context_switch_complete()
104 drm_ctx_t ctx; in tdfx_resctx() local
111 memset(&ctx, 0, sizeof(ctx)); in tdfx_resctx()
113 ctx.handle = i; in tdfx_resctx()
132 drm_ctx_t ctx; in tdfx_addctx() local
134 if (copy_from_user(&ctx, (drm_ctx_t *)arg, sizeof(ctx))) in tdfx_addctx()
136 if ((ctx.handle = tdfx_alloc_queue(dev)) == DRM_KERNEL_CONTEXT) { in tdfx_addctx()
138 ctx.handle = tdfx_alloc_queue(dev); in tdfx_addctx()
140 DRM_DEBUG("%d\n", ctx.handle); in tdfx_addctx()
141 if (ctx.handle == -1) { in tdfx_addctx()
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Dmga_context.c86 atomic_inc(&dev->histo.ctx[drm_histogram_slot(get_cycles() in mga_context_switch_complete()
100 drm_ctx_t ctx; in mga_resctx() local
106 memset(&ctx, 0, sizeof(ctx)); in mga_resctx()
108 ctx.handle = i; in mga_resctx()
126 drm_ctx_t ctx; in mga_addctx() local
128 if (copy_from_user(&ctx, (drm_ctx_t *)arg, sizeof(ctx))) in mga_addctx()
130 if ((ctx.handle = mga_alloc_queue(dev)) == DRM_KERNEL_CONTEXT) { in mga_addctx()
132 ctx.handle = mga_alloc_queue(dev); in mga_addctx()
134 if (ctx.handle == -1) { in mga_addctx()
137 DRM_DEBUG("%d\n", ctx.handle); in mga_addctx()
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Di810_context.c88 atomic_inc(&dev->histo.ctx[drm_histogram_slot(get_cycles() in i810_context_switch_complete()
102 drm_ctx_t ctx; in i810_resctx() local
109 memset(&ctx, 0, sizeof(ctx)); in i810_resctx()
111 ctx.handle = i; in i810_resctx()
129 drm_ctx_t ctx; in i810_addctx() local
131 if (copy_from_user(&ctx, (drm_ctx_t *)arg, sizeof(ctx))) in i810_addctx()
133 if ((ctx.handle = i810_alloc_queue(dev)) == DRM_KERNEL_CONTEXT) { in i810_addctx()
135 ctx.handle = i810_alloc_queue(dev); in i810_addctx()
137 if (ctx.handle == -1) { in i810_addctx()
142 DRM_DEBUG("%d\n", ctx.handle); in i810_addctx()
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Dcontext.c35 static int drm_init_queue(drm_device_t *dev, drm_queue_t *q, drm_ctx_t *ctx) in drm_init_queue() argument
60 q->flags = ctx->flags; in drm_init_queue()
131 drm_ctx_t ctx; in drm_resctx() local
138 memset(&ctx, 0, sizeof(ctx)); in drm_resctx()
140 ctx.handle = i; in drm_resctx()
159 drm_ctx_t ctx; in drm_addctx() local
161 if (copy_from_user(&ctx, (drm_ctx_t *)arg, sizeof(ctx))) in drm_addctx()
163 if ((ctx.handle = drm_alloc_queue(dev)) == DRM_KERNEL_CONTEXT) { in drm_addctx()
165 drm_init_queue(dev, dev->queuelist[ctx.handle], &ctx); in drm_addctx()
166 ctx.handle = drm_alloc_queue(dev); in drm_addctx()
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Dradeon_state.c64 drm_radeon_context_regs_t *ctx = &sarea_priv->context_state; in radeon_emit_context() local
71 OUT_RING( ctx->pp_misc ); in radeon_emit_context()
72 OUT_RING( ctx->pp_fog_color ); in radeon_emit_context()
73 OUT_RING( ctx->re_solid_color ); in radeon_emit_context()
74 OUT_RING( ctx->rb3d_blendcntl ); in radeon_emit_context()
75 OUT_RING( ctx->rb3d_depthoffset ); in radeon_emit_context()
76 OUT_RING( ctx->rb3d_depthpitch ); in radeon_emit_context()
77 OUT_RING( ctx->rb3d_zstencilcntl ); in radeon_emit_context()
80 OUT_RING( ctx->pp_cntl ); in radeon_emit_context()
81 OUT_RING( ctx->rb3d_cntl ); in radeon_emit_context()
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/linux-2.4.37.9/drivers/char/drm/
Dffb_context.c43 struct ffb_hw_context *ctx; in ffb_save_context() local
46 ctx = fpriv->hw_state[idx - 1]; in ffb_save_context()
47 if (idx == 0 || ctx == NULL) in ffb_save_context()
50 if (ctx->is_2d_only) { in ffb_save_context()
54 ctx->drawop = upa_readl(&ffb->drawop); in ffb_save_context()
55 ctx->ppc = upa_readl(&ffb->ppc); in ffb_save_context()
56 ctx->wid = upa_readl(&ffb->wid); in ffb_save_context()
57 ctx->fg = upa_readl(&ffb->fg); in ffb_save_context()
58 ctx->bg = upa_readl(&ffb->bg); in ffb_save_context()
59 ctx->xclip = upa_readl(&ffb->xclip); in ffb_save_context()
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Ddrm_context.h265 atomic_inc( &dev->histo.ctx[DRM(histogram_slot)(get_cycles() in DRM()
279 drm_ctx_t ctx; in DRM() local
286 memset( &ctx, 0, sizeof(ctx) ); in DRM()
288 ctx.handle = i; in DRM()
306 drm_ctx_t ctx; in DRM() local
308 if ( copy_from_user( &ctx, (drm_ctx_t *)arg, sizeof(ctx) ) ) in DRM()
311 ctx.handle = DRM(ctxbitmap_next)( dev ); in DRM()
312 if ( ctx.handle == DRM_KERNEL_CONTEXT ) { in DRM()
314 ctx.handle = DRM(ctxbitmap_next)( dev ); in DRM()
316 DRM_DEBUG( "%d\n", ctx.handle ); in DRM()
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Dmga_state.c50 drm_mga_context_regs_t *ctx = &sarea_priv->context_state; in mga_emit_clip_rect() local
59 DMA_BLOCK( MGA_DWGCTL, ctx->dwgctl, in mga_emit_clip_rect()
61 MGA_DWGCTL, ctx->dwgctl, in mga_emit_clip_rect()
75 drm_mga_context_regs_t *ctx = &sarea_priv->context_state; in mga_g200_emit_context() local
80 DMA_BLOCK( MGA_DSTORG, ctx->dstorg, in mga_g200_emit_context()
81 MGA_MACCESS, ctx->maccess, in mga_g200_emit_context()
82 MGA_PLNWT, ctx->plnwt, in mga_g200_emit_context()
83 MGA_DWGCTL, ctx->dwgctl ); in mga_g200_emit_context()
85 DMA_BLOCK( MGA_ALPHACTRL, ctx->alphactrl, in mga_g200_emit_context()
86 MGA_FOGCOL, ctx->fogcolor, in mga_g200_emit_context()
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/linux-2.4.37.9/arch/ia64/kernel/
Dperfmon.c92 #define PMC_OVFL_NOTIFY(ctx, i) ((ctx)->ctx_soft_pmds[i].flags & PFM_REGFL_OVFL_NOTIFY) argument
117 #define CTX_USED_PMD(ctx, mask) (ctx)->ctx_used_pmds[0] |= (mask) argument
118 #define CTX_IS_USED_PMD(ctx, c) (((ctx)->ctx_used_pmds[0] & (1UL << (c))) != 0UL) argument
121 #define CTX_USED_IBR(ctx,n) (ctx)->ctx_used_ibrs[(n)>>6] |= 1UL<< ((n) % 64) argument
122 #define CTX_USED_DBR(ctx,n) (ctx)->ctx_used_dbrs[(n)>>6] |= 1UL<< ((n) % 64) argument
123 #define CTX_USES_DBREGS(ctx) (((pfm_context_t *)(ctx))->ctx_fl_using_dbreg==1) argument
129 #define SET_LAST_CPU(ctx, v) (ctx)->ctx_last_cpu = (v) argument
130 #define GET_LAST_CPU(ctx) (ctx)->ctx_last_cpu argument
135 #define SET_LAST_CPU(ctx, v) do {} while(0) argument
136 #define GET_LAST_CPU(ctx) do {} while(0) argument
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/linux-2.4.37.9/net/ipv4/netfilter/
Dip_nat_snmp_basic.c149 static void asn1_open(struct asn1_ctx *ctx, in asn1_open() argument
153 ctx->begin = buf; in asn1_open()
154 ctx->end = buf + len; in asn1_open()
155 ctx->pointer = buf; in asn1_open()
156 ctx->error = ASN1_ERR_NOERROR; in asn1_open()
159 static unsigned char asn1_octet_decode(struct asn1_ctx *ctx, unsigned char *ch) in asn1_octet_decode() argument
161 if (ctx->pointer >= ctx->end) { in asn1_octet_decode()
162 ctx->error = ASN1_ERR_DEC_EMPTY; in asn1_octet_decode()
165 *ch = *(ctx->pointer)++; in asn1_octet_decode()
169 static unsigned char asn1_tag_decode(struct asn1_ctx *ctx, unsigned int *tag) in asn1_tag_decode() argument
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/linux-2.4.37.9/crypto/
Dtea.c53 struct tea_ctx *ctx = ctx_arg; in tea_setkey() local
61 ctx->KEY[0] = u32_in (in_key); in tea_setkey()
62 ctx->KEY[1] = u32_in (in_key + 4); in tea_setkey()
63 ctx->KEY[2] = u32_in (in_key + 8); in tea_setkey()
64 ctx->KEY[3] = u32_in (in_key + 12); in tea_setkey()
75 struct tea_ctx *ctx = ctx_arg; in tea_encrypt() local
80 k0 = ctx->KEY[0]; in tea_encrypt()
81 k1 = ctx->KEY[1]; in tea_encrypt()
82 k2 = ctx->KEY[2]; in tea_encrypt()
83 k3 = ctx->KEY[3]; in tea_encrypt()
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Darc4.c29 struct arc4_ctx *ctx = ctx_arg; in arc4_set_key() local
32 ctx->x = 1; in arc4_set_key()
33 ctx->y = 0; in arc4_set_key()
36 ctx->S[i] = i; in arc4_set_key()
40 u8 a = ctx->S[i]; in arc4_set_key()
42 ctx->S[i] = ctx->S[j]; in arc4_set_key()
43 ctx->S[j] = a; in arc4_set_key()
53 struct arc4_ctx *ctx = ctx_arg; in arc4_crypt() local
55 u8 *const S = ctx->S; in arc4_crypt()
56 u8 x = ctx->x; in arc4_crypt()
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Dtwofish.c489 ctx->s[0][i] = mds[0][q0[(a) ^ sa] ^ se]; \
490 ctx->s[1][i] = mds[1][q0[(b) ^ sb] ^ sf]; \
491 ctx->s[2][i] = mds[2][q1[(a) ^ sc] ^ sg]; \
492 ctx->s[3][i] = mds[3][q1[(b) ^ sd] ^ sh]
497 ctx->s[0][i] = mds[0][q0[q0[(b) ^ sa] ^ se] ^ si]; \
498 ctx->s[1][i] = mds[1][q0[q1[(b) ^ sb] ^ sf] ^ sj]; \
499 ctx->s[2][i] = mds[2][q1[q0[(a) ^ sc] ^ sg] ^ sk]; \
500 ctx->s[3][i] = mds[3][q1[q1[(a) ^ sd] ^ sh] ^ sl];
505 ctx->s[0][i] = mds[0][q0[q0[q1[(b) ^ sa] ^ se] ^ si] ^ sm]; \
506 ctx->s[1][i] = mds[1][q0[q1[q1[(a) ^ sb] ^ sf] ^ sj] ^ sn]; \
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Danubis.c469 struct anubis_ctx *ctx = ctx_arg; in anubis_setkey() local
481 ctx->key_len = key_len * 8; in anubis_setkey()
482 N = ctx->key_len >> 5; in anubis_setkey()
483 ctx->R = R = 8 + N; in anubis_setkey()
529 ctx->E[r][0] = K0; in anubis_setkey()
530 ctx->E[r][1] = K1; in anubis_setkey()
531 ctx->E[r][2] = K2; in anubis_setkey()
532 ctx->E[r][3] = K3; in anubis_setkey()
561 ctx->D[0][i] = ctx->E[R][i]; in anubis_setkey()
562 ctx->D[R][i] = ctx->E[0][i]; in anubis_setkey()
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Ddeflate.c53 static int deflate_init(void *ctx) in deflate_init() argument
58 static void deflate_exit(void *ctx) in deflate_exit() argument
60 struct deflate_ctx *dctx = ctx; in deflate_exit()
72 static int deflate_comp_init(struct deflate_ctx *ctx) in deflate_comp_init() argument
75 struct z_stream_s *stream = &ctx->comp_stream; in deflate_comp_init()
92 ctx->comp_initialized = 1; in deflate_comp_init()
100 static int deflate_decomp_init(struct deflate_ctx *ctx) in deflate_decomp_init() argument
103 struct z_stream_s *stream = &ctx->decomp_stream; in deflate_decomp_init()
117 ctx->decomp_initialized = 1; in deflate_decomp_init()
125 static int deflate_compress(void *ctx, const u8 *src, unsigned int slen, in deflate_compress() argument
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Dkhazad.c759 struct khazad_ctx *ctx = ctx_arg; in khazad_setkey() local
789 ctx->E[r] = T0[(int)(K1 >> 56) ] ^ in khazad_setkey()
799 K1 = ctx->E[r]; in khazad_setkey()
802 ctx->D[0] = ctx->E[KHAZAD_ROUNDS]; in khazad_setkey()
804 K1 = ctx->E[KHAZAD_ROUNDS - r]; in khazad_setkey()
805 ctx->D[r] = T0[(int)S[(int)(K1 >> 56) ] & 0xff] ^ in khazad_setkey()
814 ctx->D[KHAZAD_ROUNDS] = ctx->E[0]; in khazad_setkey()
872 struct khazad_ctx *ctx = ctx_arg; in khazad_encrypt() local
873 khazad_crypt(ctx->E, dst, src); in khazad_encrypt()
878 struct khazad_ctx *ctx = ctx_arg; in khazad_decrypt() local
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/linux-2.4.37.9/include/asm-ppc/
Dmmu_context.h31 #define CTX_TO_VSID(ctx, va) (((ctx) * (897 * 16) + ((va) >> 28) * 0x111) \ argument
115 mm_context_t ctx; in get_mmu_context() local
123 ctx = next_mmu_context; in get_mmu_context()
124 while (test_and_set_bit(ctx, context_map)) { in get_mmu_context()
125 ctx = find_next_zero_bit(context_map, LAST_CONTEXT+1, ctx); in get_mmu_context()
126 if (ctx > LAST_CONTEXT) in get_mmu_context()
127 ctx = 0; in get_mmu_context()
129 next_mmu_context = (ctx + 1) & LAST_CONTEXT; in get_mmu_context()
130 mm->context = ctx; in get_mmu_context()
132 context_mm[ctx] = mm; in get_mmu_context()
/linux-2.4.37.9/arch/mips/kernel/
Dirixsig.c84 struct sigctx_irix5 *ctx; in setup_irix_frame() local
90 ctx = (struct sigctx_irix5 *) sp; in setup_irix_frame()
91 if (!access_ok(VERIFY_WRITE, ctx, sizeof(*ctx))) in setup_irix_frame()
94 __put_user(0, &ctx->weird_fpu_thing); in setup_irix_frame()
95 __put_user(~(0x00000001), &ctx->rmask); in setup_irix_frame()
96 __put_user(0, &ctx->regs[0]); in setup_irix_frame()
98 __put_user((u64) regs->regs[i], &ctx->regs[i]); in setup_irix_frame()
100 __put_user((u64) regs->hi, &ctx->hi); in setup_irix_frame()
101 __put_user((u64) regs->lo, &ctx->lo); in setup_irix_frame()
102 __put_user((u64) regs->cp0_epc, &ctx->pc); in setup_irix_frame()
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/linux-2.4.37.9/include/asm-generic/
Dtlb.h75 static inline void tlb_finish_mmu(struct free_pte_ctx *ctx, unsigned long start, unsigned long end) in tlb_finish_mmu() argument
80 if (ctx->nr == ~0UL) { in tlb_finish_mmu()
81 flush_tlb_range(ctx->mm, start, end); in tlb_finish_mmu()
84 nr = ctx->nr; in tlb_finish_mmu()
85 ctx->nr = 0; in tlb_finish_mmu()
87 flush_tlb_range(ctx->mm, ctx->start_addr, ctx->end_addr); in tlb_finish_mmu()
89 pte_t pte = ctx->ptes[i]; in tlb_finish_mmu()
/linux-2.4.37.9/arch/sparc64/kernel/
Dpci_iommu.c149 unsigned long npages, unsigned long ctx) in free_streaming_cluster() argument
207 unsigned long flags, order, first_page, ctx; in pci_alloc_consistent() local
236 ctx = 0; in pci_alloc_consistent()
238 ctx = iommu->iommu_cur_ctx++; in pci_alloc_consistent()
241 iopte_val(*iopte) = (IOPTE_CONSISTENT(ctx) | in pci_alloc_consistent()
270 unsigned long flags, order, npages, i, ctx; in pci_free_consistent() local
302 ctx = 0; in pci_free_consistent()
304 ctx = (iopte_val(*iopte) & IOPTE_CONTEXT) >> 47UL; in pci_free_consistent()
310 pci_iommu_write(iommu->iommu_ctxflush, ctx); in pci_free_consistent()
336 unsigned long i, base_paddr, ctx; in pci_map_single() local
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/linux-2.4.37.9/drivers/message/fusion/
Dmptlan.c630 u32 ctx; in mpt_lan_send_turbo() local
632 ctx = GET_LAN_BUFFER_CONTEXT(tmsg); in mpt_lan_send_turbo()
633 sent = priv->SendCtl[ctx].skb; in mpt_lan_send_turbo()
642 priv->SendCtl[ctx].skb = NULL; in mpt_lan_send_turbo()
643 pci_unmap_single(mpt_dev->pcidev, priv->SendCtl[ctx].dma, in mpt_lan_send_turbo()
644 priv->SendCtl[ctx].len, PCI_DMA_TODEVICE); in mpt_lan_send_turbo()
648 priv->mpt_txfidx[++priv->mpt_txfidx_tail] = ctx; in mpt_lan_send_turbo()
665 u32 ctx; in mpt_lan_send_reply() local
699 ctx = GET_LAN_BUFFER_CONTEXT(le32_to_cpu(*pContext)); in mpt_lan_send_reply()
701 sent = priv->SendCtl[ctx].skb; in mpt_lan_send_reply()
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