Searched refs:ctrl_data (Results 1 – 3 of 3) sorted by relevance
71 static unsigned char ctrl_data = 0; /* Keep backup of the stuff written variable130 ctrl_data = (FASTLANE_DMA_FCODE | in fastlane_esp_detect()245 ctrl_data = (ctrl_data & FASTLANE_DMA_MASK) | FASTLANE_DMA_ENABLE; in dma_init_read()246 dregs->ctrl_reg = ctrl_data; in dma_init_read()264 ctrl_data = ((ctrl_data & FASTLANE_DMA_MASK) | in dma_init_write()267 dregs->ctrl_reg = ctrl_data; in dma_init_write()276 ctrl_data = (ctrl_data & FASTLANE_DMA_MASK); in dma_clear()277 dregs->ctrl_reg = ctrl_data; in dma_clear()301 dregs->ctrl_reg = ctrl_data & ~(FASTLANE_DMA_EDI|FASTLANE_DMA_ESI); in dma_irq_exit()305 dregs->ctrl_reg = ctrl_data; in dma_irq_exit()[all …]
57 static unsigned char ctrl_data = 0; /* Keep backup of the stuff written variable204 ctrl_data &= ~(CYBER_DMA_WRITE); in dma_init_read()220 ctrl_data &= ~(CYBER_DMA_Z3); /* Z2, do 16 bit DMA */ in dma_init_read()222 ctrl_data |= CYBER_DMA_Z3; /* CHIP/Z3, do 32 bit DMA */ in dma_init_read()224 ctrl_data &= ~(CYBER_DMA_Z3); /* Z2, do 16 bit DMA */ in dma_init_read()226 dregs->ctrl_reg = ctrl_data; in dma_init_read()241 ctrl_data |= CYBER_DMA_WRITE; in dma_init_write()247 ctrl_data &= ~(CYBER_DMA_Z3); /* Z2, do 16 bit DMA */ in dma_init_write()249 ctrl_data |= CYBER_DMA_Z3; /* CHIP/Z3, do 32 bit DMA */ in dma_init_write()251 ctrl_data &= ~(CYBER_DMA_Z3); /* Z2, do 16 bit DMA */ in dma_init_write()[all …]
89 volatile unsigned * const ctrl_data; member177 .ctrl_data = R_SYNC_SERIAL1_CTRL, 194 .ctrl_data = R_SYNC_SERIAL3_CTRL,377 *port->ctrl_data = port->ctrl_data_shadow; in initialize_port()452 *port->ctrl_data = port->ctrl_data_shadow; in sync_serial_open()702 *port->ctrl_data = port->ctrl_data_shadow; in sync_serial_ioctl()792 *port->ctrl_data = port->ctrl_data_shadow; in sync_serial_write()867 *port->ctrl_data = port->ctrl_data_shadow; in sync_serial_read()