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Searched refs:cfg_reg (Results 1 – 18 of 18) sorted by relevance

/linux-2.4.37.9/drivers/isdn/hisax/
Davm_a1p.c71 byteout(cs->hw.avm.cfg_reg+ADDRREG_OFFSET,ISAC_REG_OFFSET+offset); in ReadISAC()
72 ret = bytein(cs->hw.avm.cfg_reg+DATAREG_OFFSET); in ReadISAC()
86 byteout(cs->hw.avm.cfg_reg+ADDRREG_OFFSET,ISAC_REG_OFFSET+offset); in WriteISAC()
87 byteout(cs->hw.avm.cfg_reg+DATAREG_OFFSET, value); in WriteISAC()
98 byteout(cs->hw.avm.cfg_reg+ADDRREG_OFFSET,ISAC_FIFO_OFFSET); in ReadISACfifo()
99 insb(cs->hw.avm.cfg_reg+DATAREG_OFFSET, data, size); in ReadISACfifo()
110 byteout(cs->hw.avm.cfg_reg+ADDRREG_OFFSET,ISAC_FIFO_OFFSET); in WriteISACfifo()
111 outsb(cs->hw.avm.cfg_reg+DATAREG_OFFSET, data, size); in WriteISACfifo()
125 byteout(cs->hw.avm.cfg_reg+ADDRREG_OFFSET, in ReadHSCX()
127 ret = bytein(cs->hw.avm.cfg_reg+DATAREG_OFFSET); in ReadHSCX()
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Dteles3.c164 if (cs->hw.teles3.cfg_reg) { in release_io_teles3()
166 release_region(cs->hw.teles3.cfg_reg, 1); in release_io_teles3()
168 release_region(cs->hw.teles3.cfg_reg, 8); in release_io_teles3()
182 if ((cs->hw.teles3.cfg_reg) && (cs->typ != ISDN_CTYPE_COMPAQ_ISA)) { in reset_teles3()
213 byteout(cs->hw.teles3.cfg_reg + 4, irqcfg); in reset_teles3()
216 byteout(cs->hw.teles3.cfg_reg + 4, irqcfg | 1); in reset_teles3()
221 byteout(cs->hw.teles3.cfg_reg, 0xff); in reset_teles3()
223 byteout(cs->hw.teles3.cfg_reg, 0x00); in reset_teles3()
331 cs->hw.teles3.cfg_reg = card->para[1]; in setup_teles3()
332 switch (cs->hw.teles3.cfg_reg) { in setup_teles3()
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Ds0box.c109 return (readreg(cs->hw.teles3.cfg_reg, cs->hw.teles3.isac, offset)); in ReadISAC()
115 writereg(cs->hw.teles3.cfg_reg, cs->hw.teles3.isac, offset, value); in WriteISAC()
121 read_fifo(cs->hw.teles3.cfg_reg, cs->hw.teles3.isacfifo, data, size); in ReadISACfifo()
127 write_fifo(cs->hw.teles3.cfg_reg, cs->hw.teles3.isacfifo, data, size); in WriteISACfifo()
133 return (readreg(cs->hw.teles3.cfg_reg, cs->hw.teles3.hscx[hscx], offset)); in ReadHSCX()
139 writereg(cs->hw.teles3.cfg_reg, cs->hw.teles3.hscx[hscx], offset, value); in WriteHSCX()
146 #define READHSCX(cs, nr, reg) readreg(cs->hw.teles3.cfg_reg, cs->hw.teles3.hscx[nr], reg)
147 #define WRITEHSCX(cs, nr, reg, data) writereg(cs->hw.teles3.cfg_reg, cs->hw.teles3.hscx[nr], reg, d…
148 #define READHSCXFIFO(cs, nr, ptr, cnt) read_fifo(cs->hw.teles3.cfg_reg, cs->hw.teles3.hscxfifo[nr],…
149 #define WRITEHSCXFIFO(cs, nr, ptr, cnt) write_fifo(cs->hw.teles3.cfg_reg, cs->hw.teles3.hscxfifo[nr…
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Dteles0.c190 if (cs->hw.teles0.cfg_reg) in release_io_teles0()
191 release_region(cs->hw.teles0.cfg_reg, 8); in release_io_teles0()
204 if (cs->hw.teles0.cfg_reg) { in reset_teles0()
235 byteout(cs->hw.teles0.cfg_reg + 4, cfval); in reset_teles0()
237 byteout(cs->hw.teles0.cfg_reg + 4, cfval | 1); in reset_teles0()
280 cs->hw.teles0.cfg_reg = card->para[2]; in setup_teles0()
282 cs->hw.teles0.cfg_reg = 0; in setup_teles0()
291 if (cs->hw.teles0.cfg_reg) { in setup_teles0()
292 if (check_region(cs->hw.teles0.cfg_reg, 8)) { in setup_teles0()
296 cs->hw.teles0.cfg_reg, in setup_teles0()
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Davm_a1.c114 while (((sval = bytein(cs->hw.avm.cfg_reg)) & 0xf) != 0x7) { in avm_a1_interrupt()
116 byteout(cs->hw.avm.cfg_reg, 0x1E); in avm_a1_interrupt()
117 sval = bytein(cs->hw.avm.cfg_reg); in avm_a1_interrupt()
142 release_region(cs->hw.avm.cfg_reg, 8); in release_ioregs()
168 byteout(cs->hw.avm.cfg_reg, 0x16); in AVM_card_msg()
169 byteout(cs->hw.avm.cfg_reg, 0x1E); in AVM_card_msg()
191 cs->hw.avm.cfg_reg = card->para[1] + 0x1800; in setup_avm_a1()
199 if (check_region((cs->hw.avm.cfg_reg), 8)) { in setup_avm_a1()
203 cs->hw.avm.cfg_reg, in setup_avm_a1()
204 cs->hw.avm.cfg_reg + 8); in setup_avm_a1()
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Dsedlbauer.c419 if (cs->hw.sedl.cfg_reg) in release_io_sedlbauer()
420 release_region(cs->hw.sedl.cfg_reg, bytecnt); in release_io_sedlbauer()
449 byteout(cs->hw.sedl.cfg_reg +3, cs->hw.sedl.reset_on); in reset_sedlbauer()
454 byteout(cs->hw.sedl.cfg_reg +3, cs->hw.sedl.reset_off); in reset_sedlbauer()
517 byteout(cs->hw.sedl.cfg_reg +3, cs->hw.sedl.reset_off); in Sedl_card_msg()
526 byteout(cs->hw.sedl.cfg_reg +3, cs->hw.sedl.reset_off); in Sedl_card_msg()
578 cs->hw.sedl.cfg_reg = card->para[1]; in setup_sedlbauer()
611 cs->hw.sedl.cfg_reg = card->para[1]; in setup_sedlbauer()
650 cs->hw.sedl.cfg_reg = pci_resource_start(dev_sedl, 0); in setup_sedlbauer()
662 cs->hw.sedl.cfg_reg); in setup_sedlbauer()
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Dsportster.c133 bytein(cs->hw.spt.cfg_reg + SPORTSTER_RES_IRQ +1); in sportster_interrupt()
141 byteout(cs->hw.spt.cfg_reg + SPORTSTER_RES_IRQ, 0); in release_io_sportster()
143 adr = cs->hw.spt.cfg_reg + i *1024; in release_io_sportster()
154 byteout(cs->hw.spt.cfg_reg + SPORTSTER_RES_IRQ, cs->hw.spt.res_irq); in reset_sportster()
160 byteout(cs->hw.spt.cfg_reg + SPORTSTER_RES_IRQ, cs->hw.spt.res_irq); in reset_sportster()
179 byteout(cs->hw.spt.cfg_reg + SPORTSTER_RES_IRQ, cs->hw.spt.res_irq); in Sportster_card_msg()
194 adr = cs->hw.spt.cfg_reg + i *1024; in get_io_range()
207 adr = cs->hw.spt.cfg_reg + j *1024; in get_io_range()
225 cs->hw.spt.cfg_reg = card->para[1]; in setup_sportster()
229 cs->hw.spt.isac = cs->hw.spt.cfg_reg + SPORTSTER_ISAC; in setup_sportster()
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Ddiva.c212 return (memreadreg(cs->hw.diva.cfg_reg, offset+0x80)); in MemReadISAC_IPAC()
218 memwritereg(cs->hw.diva.cfg_reg, offset|0x80, value); in MemWriteISAC_IPAC()
225 *data++ = memreadreg(cs->hw.diva.cfg_reg, 0x80); in MemReadISACfifo_IPAC()
232 memwritereg(cs->hw.diva.cfg_reg, 0x80, *data++); in MemWriteISACfifo_IPAC()
238 return(memreadreg(cs->hw.diva.cfg_reg, offset + (hscx ? 0x40 : 0))); in MemReadHSCX()
244 memwritereg(cs->hw.diva.cfg_reg, offset + (hscx ? 0x40 : 0), value); in MemWriteHSCX()
251 return (memreadreg(cs->hw.diva.cfg_reg, offset)); in MemReadISAC_IPACX()
257 memwritereg(cs->hw.diva.cfg_reg, offset, value); in MemWriteISAC_IPACX()
264 *data++ = memreadreg(cs->hw.diva.cfg_reg, 0); in MemReadISACfifo_IPACX()
271 memwritereg(cs->hw.diva.cfg_reg, 0, *data++); in MemWriteISACfifo_IPACX()
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Dsaphir.c190 byteout(cs->hw.saphir.cfg_reg + IRQ_REG, 0xff); in release_io_saphir()
194 if (cs->hw.saphir.cfg_reg) in release_io_saphir()
195 release_region(cs->hw.saphir.cfg_reg, 6); in release_io_saphir()
223 byteout(cs->hw.saphir.cfg_reg + IRQ_REG, irq_val); in saphir_reset()
226 byteout(cs->hw.saphir.cfg_reg + RESET_REG, 1); in saphir_reset()
229 byteout(cs->hw.saphir.cfg_reg + RESET_REG, 0); in saphir_reset()
233 byteout(cs->hw.saphir.cfg_reg + IRQ_REG, irq_val); in saphir_reset()
234 byteout(cs->hw.saphir.cfg_reg + SPARE_REG, 0x02); in saphir_reset()
270 cs->hw.saphir.cfg_reg = card->para[1]; in setup_saphir()
275 if (check_region((cs->hw.saphir.cfg_reg), 6)) { in setup_saphir()
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Davm_pci.c88 outb(idx, cs->hw.avm.cfg_reg + 4); in ReadISAC()
102 outb(idx, cs->hw.avm.cfg_reg + 4); in WriteISAC()
110 outb(AVM_ISAC_FIFO, cs->hw.avm.cfg_reg + 4); in ReadISACfifo()
117 outb(AVM_ISAC_FIFO, cs->hw.avm.cfg_reg + 4); in WriteISACfifo()
130 outl(idx, cs->hw.avm.cfg_reg + 4); in ReadHDLCPCI()
144 outl(idx, cs->hw.avm.cfg_reg + 4); in WriteHDLCPCI()
158 outb(idx, cs->hw.avm.cfg_reg + 4); in ReadHDLCPnP()
172 outb(idx, cs->hw.avm.cfg_reg + 4); in WriteHDLCPnP()
298 outl(idx, cs->hw.avm.cfg_reg + 4); in hdlc_empty_fifo()
312 outb(idx, cs->hw.avm.cfg_reg + 4); in hdlc_empty_fifo()
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Dmic.c179 if (cs->hw.mic.cfg_reg) in release_io_mic()
180 release_region(cs->hw.mic.cfg_reg, bytecnt); in release_io_mic()
215 cs->hw.mic.cfg_reg = card->para[1]; in setup_mic()
217 cs->hw.mic.adr = cs->hw.mic.cfg_reg + MIC_ADR; in setup_mic()
218 cs->hw.mic.isac = cs->hw.mic.cfg_reg + MIC_ISAC; in setup_mic()
219 cs->hw.mic.hscx = cs->hw.mic.cfg_reg + MIC_HSCX; in setup_mic()
221 if (check_region((cs->hw.mic.cfg_reg), bytecnt)) { in setup_mic()
225 cs->hw.mic.cfg_reg, in setup_mic()
226 cs->hw.mic.cfg_reg + bytecnt); in setup_mic()
229 request_region(cs->hw.mic.cfg_reg, bytecnt, "mic isdn"); in setup_mic()
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Dasuscom.c260 if (cs->hw.asus.cfg_reg) in release_io_asuscom()
261 release_region(cs->hw.asus.cfg_reg, bytecnt); in release_io_asuscom()
386 cs->hw.asus.cfg_reg = card->para[1]; in setup_asuscom()
388 if (check_region((cs->hw.asus.cfg_reg), bytecnt)) { in setup_asuscom()
392 cs->hw.asus.cfg_reg, in setup_asuscom()
393 cs->hw.asus.cfg_reg + bytecnt); in setup_asuscom()
396 request_region(cs->hw.asus.cfg_reg, bytecnt, "asuscom isdn"); in setup_asuscom()
399 cs->hw.asus.cfg_reg, cs->irq); in setup_asuscom()
404 val = readreg(cs->hw.asus.cfg_reg + ASUS_IPAC_ALE, in setup_asuscom()
405 cs->hw.asus.cfg_reg + ASUS_IPAC_DATA, IPAC_ID); in setup_asuscom()
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Dniccy.c159 ival = inl(cs->hw.niccy.cfg_reg + PCI_IRQ_CTRL_REG); in niccy_interrupt()
162 outl(ival, cs->hw.niccy.cfg_reg + PCI_IRQ_CTRL_REG); in niccy_interrupt()
198 val = inl(cs->hw.niccy.cfg_reg + PCI_IRQ_CTRL_REG); in release_io_niccy()
200 outl(val, cs->hw.niccy.cfg_reg + PCI_IRQ_CTRL_REG); in release_io_niccy()
201 release_region(cs->hw.niccy.cfg_reg, 0x40); in release_io_niccy()
215 val = inl(cs->hw.niccy.cfg_reg + PCI_IRQ_CTRL_REG); in niccy_reset()
217 outl(val, cs->hw.niccy.cfg_reg + PCI_IRQ_CTRL_REG); in niccy_reset()
294 cs->hw.niccy.cfg_reg = 0; in setup_niccy()
334 cs->hw.niccy.cfg_reg = pci_resource_start(niccy_dev, 0); in setup_niccy()
335 if (!cs->hw.niccy.cfg_reg) { in setup_niccy()
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Dix1_micro.c181 if (cs->hw.ix1.cfg_reg) in release_io_ix1micro()
182 release_region(cs->hw.ix1.cfg_reg, 4); in release_io_ix1micro()
196 byteout(cs->hw.ix1.cfg_reg + SPECIAL_PORT_OFFSET, 1); in ix1_reset()
199 byteout(cs->hw.ix1.cfg_reg + SPECIAL_PORT_OFFSET, 0); in ix1_reset()
293 cs->hw.ix1.cfg_reg = card->para[1]; in setup_ix1micro()
295 if (cs->hw.ix1.cfg_reg) { in setup_ix1micro()
296 if (check_region((cs->hw.ix1.cfg_reg), 4)) { in setup_ix1micro()
300 cs->hw.ix1.cfg_reg, in setup_ix1micro()
301 cs->hw.ix1.cfg_reg + 4); in setup_ix1micro()
304 request_region(cs->hw.ix1.cfg_reg, 4, "ix1micro cfg"); in setup_ix1micro()
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Dgazel.c344 release_region(cs->hw.gazel.cfg_reg, 0x80); in release_io_gazel()
349 release_region(cs->hw.gazel.cfg_reg, 0x80); in release_io_gazel()
362 unsigned long plxcntrl, addr = cs->hw.gazel.cfg_reg; in reset_gazel()
465 if (check_region(adr = cs->hw.gazel.cfg_reg, len = 0x80)) in reserve_regions()
469 request_region(cs->hw.gazel.cfg_reg, 0x80, "gazel"); in reserve_regions()
475 if (check_region(adr = cs->hw.gazel.cfg_reg, len = 0x80)) in reserve_regions()
479 request_region(cs->hw.gazel.cfg_reg, 0x80, "gazel"); in reserve_regions()
510 cs->hw.gazel.cfg_reg = card->para[1] + 0xC000; in setup_gazelisa()
526 cs->irq, cs->hw.gazel.isac, cs->hw.gazel.cfg_reg); in setup_gazelisa()
595 cs->hw.gazel.cfg_reg = pci_ioaddr0 & 0xfffe; in setup_gazelpci()
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Dhisax.h570 unsigned int cfg_reg; member
578 unsigned int cfg_reg; member
584 unsigned int cfg_reg; member
593 unsigned int cfg_reg; member
601 unsigned long cfg_reg; member
614 unsigned int cfg_reg; member
634 unsigned int cfg_reg; member
646 unsigned int cfg_reg; member
653 unsigned int cfg_reg; member
753 unsigned int cfg_reg; member
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/linux-2.4.37.9/arch/sparc64/kernel/
Dsbus.c616 unsigned long cfg_reg; in sbus_set_sbus64() local
619 cfg_reg = iommu->sbus_control_reg; in sbus_set_sbus64()
622 cfg_reg += 0x20UL; in sbus_set_sbus64()
625 cfg_reg += 0x28UL; in sbus_set_sbus64()
628 cfg_reg += 0x30UL; in sbus_set_sbus64()
631 cfg_reg += 0x38UL; in sbus_set_sbus64()
634 cfg_reg += 0x40UL; in sbus_set_sbus64()
637 cfg_reg += 0x48UL; in sbus_set_sbus64()
640 cfg_reg += 0x50UL; in sbus_set_sbus64()
647 val = upa_readq(cfg_reg); in sbus_set_sbus64()
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/linux-2.4.37.9/drivers/scsi/
Dgdth.h786 unchar cfg_reg; /* DPRAM cfg.(2:below 1MB,0:anywhere)*/ member