Searched refs:WIDEXFER (Results 1 – 13 of 13) sorted by relevance
51 #define WIDEXFER 0x80 macro
162 bit WIDEXFER 0x80 /* Wide transfer control */
357 target_settings |= WIDEXFER; in aha2840_load_seeprom()
1540 scsirate |= WIDEXFER; in ahc_parse_pci_eeprom()1546 scsirate |= WIDEXFER; in ahc_parse_pci_eeprom()
2042 scsirate &= ~WIDEXFER; in ahc_set_width()2044 scsirate |= WIDEXFER; in ahc_set_width()3069 targ_scsirate & WIDEXFER, in ahc_parse_msg()5022 | (scsirate & WIDEXFER); in ahc_init()5026 if ((scsirate & ~WIDEXFER) == 0 && offset != 0) in ahc_init()5059 if ((scsirate & WIDEXFER) != 0 in ahc_init()
1110 #define WIDEXFER 0x80 macro
870 test A, WIDEXFER jz mesgin_reject;1515 test NEGCONOPTS, WIDEXFER jz target_ITloop;
1350 test SCSIRATE, WIDEXFER jz target_ITloop;1581 test SCSIRATE, WIDEXFER jz mesgin_reject;
170 field WIDEXFER 0x80 /* Wide transfer control */
3027 #define WIDEXFER 0x01 macro
2516 field WIDEXFER 0x01
2893 con_opts |= WIDEXFER; in ahd_update_neg_table()
2239 int rate_mod = (scsirate & WIDEXFER) ? 1 : 0; in aic7xxx_set_syncrate()2295 scsirate &= ~WIDEXFER; in aic7xxx_set_width()2297 scsirate |= WIDEXFER; in aic7xxx_set_width()2311 lun, (scsirate & WIDEXFER) ? "Wide(16bit)" : "Narrow(8bit)" ); in aic7xxx_set_width()5505 bus_width = new_bus_width = target_scsirate & WIDEXFER; in aic7xxx_parse_msg()9145 if (aic_inb(p, TARG_SCSIRATE + i) & WIDEXFER) in aic7xxx_load_seeprom()9159 if (aic_inb(p, TARG_SCSIRATE + i) & ~WIDEXFER) in aic7xxx_load_seeprom()9329 (aic_inb(p, TARG_SCSIRATE + i) & WIDEXFER) ? in aic7xxx_load_seeprom()