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Searched refs:VR4181_MSYSINT2REG (Results 1 – 3 of 3) sorted by relevance

/linux-2.4.37.9/arch/mips/vr4181/common/
Dirq.c55 *VR4181_MSYSINT2REG |= (u16)(1 << irq); in sys_irq_enable()
67 *VR4181_MSYSINT2REG &= ~((u16)(1 << irq)); in sys_irq_disable()
218 *VR4181_MSYSINT2REG = 0; in init_IRQ()
Dint_handler.S147 lhu t2,%lo(VR4181_MSYSINT2REG)(t3)
/linux-2.4.37.9/include/asm-mips/vr4181/
Dvr4181.h112 #define VR4181_MSYSINT2REG __preg16(KSEG1 + 0x0A000206) /* Level 1 mask system interrupt register 2… macro