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Searched refs:VR4181_GPINTEN (Results 1 – 2 of 2) sorted by relevance

/linux-2.4.37.9/arch/mips/vr4181/common/
Dirq.c122 *VR4181_GPINTEN |= (u16)(1 << irq ); in gpio_irq_startup()
133 *VR4181_GPINTEN &= ~((u16)(1 << irq )); in gpio_irq_shutdown()
/linux-2.4.37.9/include/asm-mips/vr4181/
Dvr4181.h203 #define VR4181_GPINTEN __preg16(KSEG1 + 0x0B00030C) /* GPIO Interrupt Enable Register (R/W) */ macro
236 #define VR4181_SECIRQMASKL VR4181_GPINTEN