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Searched refs:VCHAN0 (Results 1 – 4 of 4) sorted by relevance

/linux-2.4.37.9/arch/ia64/sn/io/sn2/pcibr/
Dpcibr_rrb.c465 if (pcibr_soft->bs_rrb_valid_dflt[pciio_slot][VCHAN0] < 0) { in pcibr_rrb_alloc()
475 orig_vchan0 = pcibr_soft->bs_rrb_valid[pciio_slot][VCHAN0]; in pcibr_rrb_alloc()
528 (void) do_pcibr_rrb_free(bridge, pciio_slot, VCHAN0, -delta_vchan0); in pcibr_rrb_alloc()
533 (void) do_pcibr_rrb_alloc(bridge, pciio_slot, VCHAN0, delta_vchan0); in pcibr_rrb_alloc()
553 pcibr_soft->bs_rrb_valid[pciio_slot][VCHAN0] = final_vchan0; in pcibr_rrb_alloc()
652 pcibr_soft->bs_rrb_valid[pciio_slot][VCHAN0]; in pcibr_rrb_check()
711 chan[VCHAN0], chan[VCHAN1], chan[VCHAN2], chan[VCHAN3])); in pcibr_slot_initial_rrb_alloc()
716 chan[VCHAN0], chan[VCHAN1])); in pcibr_slot_initial_rrb_alloc()
881 0xFFF & pcibr_soft->bs_rrb_valid[slot][VCHAN0], in pcibr_rrb_debug()
889 0xFFF & pcibr_soft->bs_rrb_valid[slot][VCHAN0], in pcibr_rrb_debug()
Dpcibr_dvr.c725 if (pcibr_soft->bs_rrb_valid_dflt[slot][VCHAN0] >= 0) { in pcibr_device_unregister()
733 pcibr_soft->bs_rrb_valid[slot][VCHAN0] + in pcibr_device_unregister()
741 count_vchan0 = pcibr_soft->bs_rrb_valid_dflt[slot][VCHAN0]; in pcibr_device_unregister()
1266 pcibr_soft->bs_rrb_valid_dflt[slot][VCHAN0] = -1; in pcibr_attach2()
1804 do_pcibr_rrb_autoalloc(pcibr_soft, 1, VCHAN0, 8); in pcibr_attach2()
1805 do_pcibr_rrb_autoalloc(pcibr_soft, 2, VCHAN0, 8); in pcibr_attach2()
1810 do_pcibr_rrb_autoalloc(pcibr_soft, 1, VCHAN0, 8); in pcibr_attach2()
1811 do_pcibr_rrb_autoalloc(pcibr_soft, 2, VCHAN0, 8); in pcibr_attach2()
1815 do_pcibr_rrb_autoalloc(pcibr_soft, 0, VCHAN0, 1); in pcibr_attach2()
1828 do_pcibr_rrb_autoalloc(pcibr_soft, 0, VCHAN0, 4); in pcibr_attach2()
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Dpcibr_slot.c373 slotp->resp_bs_rrb_valid = pcibr_soft->bs_rrb_valid[slot][VCHAN0]; in pcibr_slot_info_return()
/linux-2.4.37.9/include/asm-ia64/sn/pci/
Dbridge.h1381 #define VCHAN0 0 /* virtual channel 0 (ie. the "normal" channel) */ macro