1 /*+M*************************************************************************
2 * Adaptec AIC7xxx device driver for Linux.
3 *
4 * Copyright (c) 1994 John Aycock
5 * The University of Calgary Department of Computer Science.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2, or (at your option)
10 * any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; see the file COPYING. If not, write to
19 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
20 *
21 * Sources include the Adaptec 1740 driver (aha1740.c), the Ultrastor 24F
22 * driver (ultrastor.c), various Linux kernel source, the Adaptec EISA
23 * config file (!adp7771.cfg), the Adaptec AHA-2740A Series User's Guide,
24 * the Linux Kernel Hacker's Guide, Writing a SCSI Device Driver for Linux,
25 * the Adaptec 1542 driver (aha1542.c), the Adaptec EISA overlay file
26 * (adp7770.ovl), the Adaptec AHA-2740 Series Technical Reference Manual,
27 * the Adaptec AIC-7770 Data Book, the ANSI SCSI specification, the
28 * ANSI SCSI-2 specification (draft 10c), ...
29 *
30 * --------------------------------------------------------------------------
31 *
32 * Modifications by Daniel M. Eischen (deischen@iworks.InterWorks.org):
33 *
34 * Substantially modified to include support for wide and twin bus
35 * adapters, DMAing of SCBs, tagged queueing, IRQ sharing, bug fixes,
36 * SCB paging, and other rework of the code.
37 *
38 * Parts of this driver were also based on the FreeBSD driver by
39 * Justin T. Gibbs. His copyright follows:
40 *
41 * --------------------------------------------------------------------------
42 * Copyright (c) 1994-1997 Justin Gibbs.
43 * All rights reserved.
44 *
45 * Redistribution and use in source and binary forms, with or without
46 * modification, are permitted provided that the following conditions
47 * are met:
48 * 1. Redistributions of source code must retain the above copyright
49 * notice, this list of conditions, and the following disclaimer,
50 * without modification, immediately at the beginning of the file.
51 * 2. Redistributions in binary form must reproduce the above copyright
52 * notice, this list of conditions and the following disclaimer in the
53 * documentation and/or other materials provided with the distribution.
54 * 3. The name of the author may not be used to endorse or promote products
55 * derived from this software without specific prior written permission.
56 *
57 * Where this Software is combined with software released under the terms of
58 * the GNU General Public License ("GPL") and the terms of the GPL would require the
59 * combined work to also be released under the terms of the GPL, the terms
60 * and conditions of this License will apply in addition to those of the
61 * GPL with the exception of any terms or conditions of this License that
62 * conflict with, or are expressly prohibited by, the GPL.
63 *
64 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
65 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
66 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
67 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
68 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
69 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
70 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
71 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
72 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
73 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
74 * SUCH DAMAGE.
75 *
76 * $Id: aic7xxx.c,v 1.119 1997/06/27 19:39:18 gibbs Exp $
77 *---------------------------------------------------------------------------
78 *
79 * Thanks also go to (in alphabetical order) the following:
80 *
81 * Rory Bolt - Sequencer bug fixes
82 * Jay Estabrook - Initial DEC Alpha support
83 * Doug Ledford - Much needed abort/reset bug fixes
84 * Kai Makisara - DMAing of SCBs
85 *
86 * A Boot time option was also added for not resetting the scsi bus.
87 *
88 * Form: aic7xxx=extended
89 * aic7xxx=no_reset
90 * aic7xxx=ultra
91 * aic7xxx=irq_trigger:[0,1] # 0 edge, 1 level
92 * aic7xxx=verbose
93 *
94 * Daniel M. Eischen, deischen@iworks.InterWorks.org, 1/23/97
95 *
96 * $Id: aic7xxx.c,v 4.1 1997/06/12 08:23:42 deang Exp $
97 *-M*************************************************************************/
98
99 /*+M**************************************************************************
100 *
101 * Further driver modifications made by Doug Ledford <dledford@redhat.com>
102 *
103 * Copyright (c) 1997-1999 Doug Ledford
104 *
105 * These changes are released under the same licensing terms as the FreeBSD
106 * driver written by Justin Gibbs. Please see his Copyright notice above
107 * for the exact terms and conditions covering my changes as well as the
108 * warranty statement.
109 *
110 * Modifications made to the aic7xxx.c,v 4.1 driver from Dan Eischen include
111 * but are not limited to:
112 *
113 * 1: Import of the latest FreeBSD sequencer code for this driver
114 * 2: Modification of kernel code to accomodate different sequencer semantics
115 * 3: Extensive changes throughout kernel portion of driver to improve
116 * abort/reset processing and error hanndling
117 * 4: Other work contributed by various people on the Internet
118 * 5: Changes to printk information and verbosity selection code
119 * 6: General reliability related changes, especially in IRQ management
120 * 7: Modifications to the default probe/attach order for supported cards
121 * 8: SMP friendliness has been improved
122 *
123 * Overall, this driver represents a significant departure from the official
124 * aic7xxx driver released by Dan Eischen in two ways. First, in the code
125 * itself. A diff between the two version of the driver is now a several
126 * thousand line diff. Second, in approach to solving the same problem. The
127 * problem is importing the FreeBSD aic7xxx driver code to linux can be a
128 * difficult and time consuming process, that also can be error prone. Dan
129 * Eischen's official driver uses the approach that the linux and FreeBSD
130 * drivers should be as identical as possible. To that end, his next version
131 * of this driver will be using a mid-layer code library that he is developing
132 * to moderate communications between the linux mid-level SCSI code and the
133 * low level FreeBSD driver. He intends to be able to essentially drop the
134 * FreeBSD driver into the linux kernel with only a few minor tweaks to some
135 * include files and the like and get things working, making for fast easy
136 * imports of the FreeBSD code into linux.
137 *
138 * I disagree with Dan's approach. Not that I don't think his way of doing
139 * things would be nice, easy to maintain, and create a more uniform driver
140 * between FreeBSD and Linux. I have no objection to those issues. My
141 * disagreement is on the needed functionality. There simply are certain
142 * things that are done differently in FreeBSD than linux that will cause
143 * problems for this driver regardless of any middle ware Dan implements.
144 * The biggest example of this at the moment is interrupt semantics. Linux
145 * doesn't provide the same protection techniques as FreeBSD does, nor can
146 * they be easily implemented in any middle ware code since they would truly
147 * belong in the kernel proper and would effect all drivers. For the time
148 * being, I see issues such as these as major stumbling blocks to the
149 * reliability of code based upon such middle ware. Therefore, I choose to
150 * use a different approach to importing the FreeBSD code that doesn't
151 * involve any middle ware type code. My approach is to import the sequencer
152 * code from FreeBSD wholesale. Then, to only make changes in the kernel
153 * portion of the driver as they are needed for the new sequencer semantics.
154 * In this way, the portion of the driver that speaks to the rest of the
155 * linux kernel is fairly static and can be changed/modified to solve
156 * any problems one might encounter without concern for the FreeBSD driver.
157 *
158 * Note: If time and experience should prove me wrong that the middle ware
159 * code Dan writes is reliable in its operation, then I'll retract my above
160 * statements. But, for those that don't know, I'm from Missouri (in the US)
161 * and our state motto is "The Show-Me State". Well, before I will put
162 * faith into it, you'll have to show me that it works :)
163 *
164 *_M*************************************************************************/
165
166 /*
167 * The next three defines are user configurable. These should be the only
168 * defines a user might need to get in here and change. There are other
169 * defines buried deeper in the code, but those really shouldn't need touched
170 * under normal conditions.
171 */
172
173 /*
174 * AIC7XXX_STRICT_PCI_SETUP
175 * Should we assume the PCI config options on our controllers are set with
176 * sane and proper values, or should we be anal about our PCI config
177 * registers and force them to what we want? The main advantage to
178 * defining this option is on non-Intel hardware where the BIOS may not
179 * have been run to set things up, or if you have one of the BIOSless
180 * Adaptec controllers, such as a 2910, that don't get set up by the
181 * BIOS. However, keep in mind that we really do set the most important
182 * items in the driver regardless of this setting, this only controls some
183 * of the more esoteric PCI options on these cards. In that sense, I
184 * would default to leaving this off. However, if people wish to try
185 * things both ways, that would also help me to know if there are some
186 * machines where it works one way but not another.
187 *
188 * -- July 7, 17:09
189 * OK...I need this on my machine for testing, so the default is to
190 * leave it defined.
191 *
192 * -- July 7, 18:49
193 * I needed it for testing, but it didn't make any difference, so back
194 * off she goes.
195 *
196 * -- July 16, 23:04
197 * I turned it back on to try and compensate for the 2.1.x PCI code
198 * which no longer relies solely on the BIOS and now tries to set
199 * things itself.
200 */
201
202 #define AIC7XXX_STRICT_PCI_SETUP
203
204 /*
205 * AIC7XXX_VERBOSE_DEBUGGING
206 * This option enables a lot of extra printk();s in the code, surrounded
207 * by if (aic7xxx_verbose ...) statements. Executing all of those if
208 * statements and the extra checks can get to where it actually does have
209 * an impact on CPU usage and such, as well as code size. Disabling this
210 * define will keep some of those from becoming part of the code.
211 *
212 * NOTE: Currently, this option has no real effect, I will be adding the
213 * various #ifdef's in the code later when I've decided a section is
214 * complete and no longer needs debugging. OK...a lot of things are now
215 * surrounded by this define, so turning this off does have an impact.
216 */
217
218 /*
219 * #define AIC7XXX_VERBOSE_DEBUGGING
220 */
221
222 #include <linux/module.h>
223 #include <stdarg.h>
224 #include <asm/io.h>
225 #include <asm/irq.h>
226 #include <asm/byteorder.h>
227 #include <linux/version.h>
228 #include <linux/string.h>
229 #include <linux/errno.h>
230 #include <linux/kernel.h>
231 #include <linux/ioport.h>
232 #include <linux/delay.h>
233 #include <linux/sched.h>
234 #include <linux/pci.h>
235 #include <linux/proc_fs.h>
236 #include <linux/blk.h>
237 #include <linux/tqueue.h>
238 #include <linux/init.h>
239 #include <linux/spinlock.h>
240 #include <linux/smp.h>
241 #include <linux/blk.h>
242 #include "sd.h"
243 #include "scsi.h"
244 #include "hosts.h"
245 #include "aic7xxx_old/aic7xxx.h"
246
247 #include "aic7xxx_old/sequencer.h"
248 #include "aic7xxx_old/scsi_message.h"
249 #include "aic7xxx_old/aic7xxx_reg.h"
250 #include <scsi/scsicam.h>
251
252 #include <linux/stat.h>
253 #include <linux/slab.h> /* for kmalloc() */
254
255 #include <linux/config.h> /* for CONFIG_PCI */
256
257 /*
258 * To generate the correct addresses for the controller to issue
259 * on the bus. Originally added for DEC Alpha support.
260 */
261 #define VIRT_TO_BUS(a) (unsigned int)virt_to_bus((void *)(a))
262
263 #define AIC7XXX_C_VERSION "5.2.4"
264
265 #define NUMBER(arr) (sizeof(arr) / sizeof(arr[0]))
266 #define MIN(a,b) (((a) < (b)) ? (a) : (b))
267 #define MAX(a,b) (((a) > (b)) ? (a) : (b))
268 #define ALL_TARGETS -1
269 #define ALL_CHANNELS -1
270 #define ALL_LUNS -1
271 #define MAX_TARGETS 16
272 #define MAX_LUNS 8
273 #ifndef TRUE
274 # define TRUE 1
275 #endif
276 #ifndef FALSE
277 # define FALSE 0
278 #endif
279
280 #if defined(__powerpc__) || defined(__i386__) || defined(__x86_64__)
281 # define MMAPIO
282 #endif
283
284 # if LINUX_VERSION_CODE < KERNEL_VERSION(2,1,95)
285 # define cpuid smp_processor_id()
286 # define DRIVER_LOCK_INIT \
287 spin_lock_init(&p->spin_lock);
288 # define DRIVER_LOCK \
289 if(!p->cpu_lock_count[cpuid]) { \
290 spin_lock_irqsave(&p->spin_lock, cpu_flags); \
291 p->cpu_lock_count[cpuid]++; \
292 } else { \
293 p->cpu_lock_count[cpuid]++; \
294 }
295 # define DRIVER_UNLOCK \
296 if(--p->cpu_lock_count[cpuid] == 0) \
297 spin_unlock_irqrestore(&p->spin_lock, cpu_flags);
298 # else
299 # define DRIVER_LOCK_INIT
300 # define DRIVER_LOCK
301 # define DRIVER_UNLOCK
302 # endif
303
304 /*
305 * You can try raising me if tagged queueing is enabled, or lowering
306 * me if you only have 4 SCBs.
307 */
308 #ifdef CONFIG_AIC7XXX_OLD_CMDS_PER_DEVICE
309 #define AIC7XXX_CMDS_PER_DEVICE CONFIG_AIC7XXX_OLD_CMDS_PER_DEVICE
310 #else
311 #define AIC7XXX_CMDS_PER_DEVICE 32
312 #endif
313
314 /*
315 * Control collection of SCSI transfer statistics for the /proc filesystem.
316 *
317 * NOTE: Do NOT enable this when running on kernels version 1.2.x and below.
318 * NOTE: This does affect performance since it has to maintain statistics.
319 */
320 #ifdef CONFIG_AIC7XXX_OLD_PROC_STATS
321 #define AIC7XXX_PROC_STATS
322 #endif
323
324 /*
325 * *** Determining commands per LUN ***
326 *
327 * When AIC7XXX_CMDS_PER_DEVICE is not defined, the driver will use its
328 * own algorithm to determine the commands/LUN. If SCB paging is
329 * enabled, which is always now, the default is 8 commands per lun
330 * that indicates it supports tagged queueing. All non-tagged devices
331 * use an internal queue depth of 3, with no more than one of those
332 * three commands active at one time.
333 */
334
335 typedef struct
336 {
337 unsigned char tag_commands[16]; /* Allow for wide/twin adapters. */
338 } adapter_tag_info_t;
339
340 /*
341 * Make a define that will tell the driver not to use tagged queueing
342 * by default.
343 */
344 #ifdef CONFIG_AIC7XXX_OLD_TCQ_ON_BY_DEFAULT
345 #define DEFAULT_TAG_COMMANDS {0, 0, 0, 0, 0, 0, 0, 0,\
346 0, 0, 0, 0, 0, 0, 0, 0}
347 #else
348 #define DEFAULT_TAG_COMMANDS {255, 255, 255, 255, 255, 255, 255, 255,\
349 255, 255, 255, 255, 255, 255, 255, 255}
350 #endif
351
352 /*
353 * Modify this as you see fit for your system. By setting tag_commands
354 * to 0, the driver will use it's own algorithm for determining the
355 * number of commands to use (see above). When 255, the driver will
356 * not enable tagged queueing for that particular device. When positive
357 * (> 0) and (< 255) the values in the array are used for the queue_depth.
358 * Note that the maximum value for an entry is 254, but you're insane if
359 * you try to use that many commands on one device.
360 *
361 * In this example, the first line will disable tagged queueing for all
362 * the devices on the first probed aic7xxx adapter.
363 *
364 * The second line enables tagged queueing with 4 commands/LUN for IDs
365 * (1, 2-11, 13-15), disables tagged queueing for ID 12, and tells the
366 * driver to use its own algorithm for ID 1.
367 *
368 * The third line is the same as the first line.
369 *
370 * The fourth line disables tagged queueing for devices 0 and 3. It
371 * enables tagged queueing for the other IDs, with 16 commands/LUN
372 * for IDs 1 and 4, 127 commands/LUN for ID 8, and 4 commands/LUN for
373 * IDs 2, 5-7, and 9-15.
374 */
375
376 /*
377 * NOTE: The below structure is for reference only, the actual structure
378 * to modify in order to change things is found after this fake one.
379 *
380 adapter_tag_info_t aic7xxx_tag_info[] =
381 {
382 {DEFAULT_TAG_COMMANDS},
383 {{4, 0, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 255, 4, 4, 4}},
384 {DEFAULT_TAG_COMMANDS},
385 {{255, 16, 4, 255, 16, 4, 4, 4, 127, 4, 4, 4, 4, 4, 4, 4}}
386 };
387 */
388
389 static adapter_tag_info_t aic7xxx_tag_info[] =
390 {
391 {DEFAULT_TAG_COMMANDS},
392 {DEFAULT_TAG_COMMANDS},
393 {DEFAULT_TAG_COMMANDS},
394 {DEFAULT_TAG_COMMANDS},
395 {DEFAULT_TAG_COMMANDS},
396 {DEFAULT_TAG_COMMANDS},
397 {DEFAULT_TAG_COMMANDS},
398 {DEFAULT_TAG_COMMANDS},
399 {DEFAULT_TAG_COMMANDS},
400 {DEFAULT_TAG_COMMANDS},
401 {DEFAULT_TAG_COMMANDS},
402 {DEFAULT_TAG_COMMANDS},
403 {DEFAULT_TAG_COMMANDS},
404 {DEFAULT_TAG_COMMANDS},
405 {DEFAULT_TAG_COMMANDS},
406 {DEFAULT_TAG_COMMANDS}
407 };
408
409
410 /*
411 * Define an array of board names that can be indexed by aha_type.
412 * Don't forget to change this when changing the types!
413 */
414 static const char *board_names[] = {
415 "AIC-7xxx Unknown", /* AIC_NONE */
416 "Adaptec AIC-7810 Hardware RAID Controller", /* AIC_7810 */
417 "Adaptec AIC-7770 SCSI host adapter", /* AIC_7770 */
418 "Adaptec AHA-274X SCSI host adapter", /* AIC_7771 */
419 "Adaptec AHA-284X SCSI host adapter", /* AIC_284x */
420 "Adaptec AIC-7850 SCSI host adapter", /* AIC_7850 */
421 "Adaptec AIC-7855 SCSI host adapter", /* AIC_7855 */
422 "Adaptec AIC-7860 Ultra SCSI host adapter", /* AIC_7860 */
423 "Adaptec AHA-2940A Ultra SCSI host adapter", /* AIC_7861 */
424 "Adaptec AIC-7870 SCSI host adapter", /* AIC_7870 */
425 "Adaptec AHA-294X SCSI host adapter", /* AIC_7871 */
426 "Adaptec AHA-394X SCSI host adapter", /* AIC_7872 */
427 "Adaptec AHA-398X SCSI host adapter", /* AIC_7873 */
428 "Adaptec AHA-2944 SCSI host adapter", /* AIC_7874 */
429 "Adaptec AIC-7880 Ultra SCSI host adapter", /* AIC_7880 */
430 "Adaptec AHA-294X Ultra SCSI host adapter", /* AIC_7881 */
431 "Adaptec AHA-394X Ultra SCSI host adapter", /* AIC_7882 */
432 "Adaptec AHA-398X Ultra SCSI host adapter", /* AIC_7883 */
433 "Adaptec AHA-2944 Ultra SCSI host adapter", /* AIC_7884 */
434 "Adaptec AHA-2940UW Pro Ultra SCSI host adapter", /* AIC_7887 */
435 "Adaptec AIC-7895 Ultra SCSI host adapter", /* AIC_7895 */
436 "Adaptec AIC-7890/1 Ultra2 SCSI host adapter", /* AIC_7890 */
437 "Adaptec AHA-293X Ultra2 SCSI host adapter", /* AIC_7890 */
438 "Adaptec AHA-294X Ultra2 SCSI host adapter", /* AIC_7890 */
439 "Adaptec AIC-7896/7 Ultra2 SCSI host adapter", /* AIC_7896 */
440 "Adaptec AHA-394X Ultra2 SCSI host adapter", /* AIC_7897 */
441 "Adaptec AHA-395X Ultra2 SCSI host adapter", /* AIC_7897 */
442 "Adaptec PCMCIA SCSI controller", /* card bus stuff */
443 "Adaptec AIC-7892 Ultra 160/m SCSI host adapter", /* AIC_7892 */
444 "Adaptec AIC-7899 Ultra 160/m SCSI host adapter", /* AIC_7899 */
445 };
446
447 /*
448 * There should be a specific return value for this in scsi.h, but
449 * it seems that most drivers ignore it.
450 */
451 #define DID_UNDERFLOW DID_ERROR
452
453 /*
454 * What we want to do is have the higher level scsi driver requeue
455 * the command to us. There is no specific driver status for this
456 * condition, but the higher level scsi driver will requeue the
457 * command on a DID_BUS_BUSY error.
458 *
459 * Upon further inspection and testing, it seems that DID_BUS_BUSY
460 * will *always* retry the command. We can get into an infinite loop
461 * if this happens when we really want some sort of counter that
462 * will automatically abort/reset the command after so many retries.
463 * Using DID_ERROR will do just that. (Made by a suggestion by
464 * Doug Ledford 8/1/96)
465 */
466 #define DID_RETRY_COMMAND DID_ERROR
467
468 #define HSCSIID 0x07
469 #define SCSI_RESET 0x040
470
471 /*
472 * EISA/VL-bus stuff
473 */
474 #define MINSLOT 1
475 #define MAXSLOT 15
476 #define SLOTBASE(x) ((x) << 12)
477 #define BASE_TO_SLOT(x) ((x) >> 12)
478
479 /*
480 * Standard EISA Host ID regs (Offset from slot base)
481 */
482 #define AHC_HID0 0x80 /* 0,1: msb of ID2, 2-7: ID1 */
483 #define AHC_HID1 0x81 /* 0-4: ID3, 5-7: LSB ID2 */
484 #define AHC_HID2 0x82 /* product */
485 #define AHC_HID3 0x83 /* firmware revision */
486
487 /*
488 * AIC-7770 I/O range to reserve for a card
489 */
490 #define MINREG 0xC00
491 #define MAXREG 0xCFF
492
493 #define INTDEF 0x5C /* Interrupt Definition Register */
494
495 /*
496 * AIC-78X0 PCI registers
497 */
498 #define CLASS_PROGIF_REVID 0x08
499 #define DEVREVID 0x000000FFul
500 #define PROGINFC 0x0000FF00ul
501 #define SUBCLASS 0x00FF0000ul
502 #define BASECLASS 0xFF000000ul
503
504 #define CSIZE_LATTIME 0x0C
505 #define CACHESIZE 0x0000003Ful /* only 5 bits */
506 #define LATTIME 0x0000FF00ul
507
508 #define DEVCONFIG 0x40
509 #define SCBSIZE32 0x00010000ul /* aic789X only */
510 #define MPORTMODE 0x00000400ul /* aic7870 only */
511 #define RAMPSM 0x00000200ul /* aic7870 only */
512 #define RAMPSM_ULTRA2 0x00000004
513 #define VOLSENSE 0x00000100ul
514 #define SCBRAMSEL 0x00000080ul
515 #define SCBRAMSEL_ULTRA2 0x00000008
516 #define MRDCEN 0x00000040ul
517 #define EXTSCBTIME 0x00000020ul /* aic7870 only */
518 #define EXTSCBPEN 0x00000010ul /* aic7870 only */
519 #define BERREN 0x00000008ul
520 #define DACEN 0x00000004ul
521 #define STPWLEVEL 0x00000002ul
522 #define DIFACTNEGEN 0x00000001ul /* aic7870 only */
523
524 #define SCAMCTL 0x1a /* Ultra2 only */
525 #define CCSCBBADDR 0xf0 /* aic7895/6/7 */
526
527 /*
528 * Define the different types of SEEPROMs on aic7xxx adapters
529 * and make it also represent the address size used in accessing
530 * its registers. The 93C46 chips have 1024 bits organized into
531 * 64 16-bit words, while the 93C56 chips have 2048 bits organized
532 * into 128 16-bit words. The C46 chips use 6 bits to address
533 * each word, while the C56 and C66 (4096 bits) use 8 bits to
534 * address each word.
535 */
536 typedef enum {C46 = 6, C56_66 = 8} seeprom_chip_type;
537
538 /*
539 *
540 * Define the format of the SEEPROM registers (16 bits).
541 *
542 */
543 struct seeprom_config {
544
545 /*
546 * SCSI ID Configuration Flags
547 */
548 #define CFXFER 0x0007 /* synchronous transfer rate */
549 #define CFSYNCH 0x0008 /* enable synchronous transfer */
550 #define CFDISC 0x0010 /* enable disconnection */
551 #define CFWIDEB 0x0020 /* wide bus device (wide card) */
552 #define CFSYNCHISULTRA 0x0040 /* CFSYNC is an ultra offset */
553 #define CFNEWULTRAFORMAT 0x0080 /* Use the Ultra2 SEEPROM format */
554 #define CFSTART 0x0100 /* send start unit SCSI command */
555 #define CFINCBIOS 0x0200 /* include in BIOS scan */
556 #define CFRNFOUND 0x0400 /* report even if not found */
557 #define CFMULTILUN 0x0800 /* probe mult luns in BIOS scan */
558 #define CFWBCACHEYES 0x4000 /* Enable W-Behind Cache on drive */
559 #define CFWBCACHENC 0xc000 /* Don't change W-Behind Cache */
560 /* UNUSED 0x3000 */
561 unsigned short device_flags[16]; /* words 0-15 */
562
563 /*
564 * BIOS Control Bits
565 */
566 #define CFSUPREM 0x0001 /* support all removable drives */
567 #define CFSUPREMB 0x0002 /* support removable drives for boot only */
568 #define CFBIOSEN 0x0004 /* BIOS enabled */
569 /* UNUSED 0x0008 */
570 #define CFSM2DRV 0x0010 /* support more than two drives */
571 #define CF284XEXTEND 0x0020 /* extended translation (284x cards) */
572 /* UNUSED 0x0040 */
573 #define CFEXTEND 0x0080 /* extended translation enabled */
574 /* UNUSED 0xFF00 */
575 unsigned short bios_control; /* word 16 */
576
577 /*
578 * Host Adapter Control Bits
579 */
580 #define CFAUTOTERM 0x0001 /* Perform Auto termination */
581 #define CFULTRAEN 0x0002 /* Ultra SCSI speed enable (Ultra cards) */
582 #define CF284XSELTO 0x0003 /* Selection timeout (284x cards) */
583 #define CF284XFIFO 0x000C /* FIFO Threshold (284x cards) */
584 #define CFSTERM 0x0004 /* SCSI low byte termination */
585 #define CFWSTERM 0x0008 /* SCSI high byte termination (wide card) */
586 #define CFSPARITY 0x0010 /* SCSI parity */
587 #define CF284XSTERM 0x0020 /* SCSI low byte termination (284x cards) */
588 #define CFRESETB 0x0040 /* reset SCSI bus at boot */
589 #define CFBPRIMARY 0x0100 /* Channel B primary on 7895 chipsets */
590 #define CFSEAUTOTERM 0x0400 /* aic7890 Perform SE Auto Term */
591 #define CFLVDSTERM 0x0800 /* aic7890 LVD Termination */
592 /* UNUSED 0xF280 */
593 unsigned short adapter_control; /* word 17 */
594
595 /*
596 * Bus Release, Host Adapter ID
597 */
598 #define CFSCSIID 0x000F /* host adapter SCSI ID */
599 /* UNUSED 0x00F0 */
600 #define CFBRTIME 0xFF00 /* bus release time */
601 unsigned short brtime_id; /* word 18 */
602
603 /*
604 * Maximum targets
605 */
606 #define CFMAXTARG 0x00FF /* maximum targets */
607 /* UNUSED 0xFF00 */
608 unsigned short max_targets; /* word 19 */
609
610 unsigned short res_1[11]; /* words 20-30 */
611 unsigned short checksum; /* word 31 */
612 };
613
614 #define SELBUS_MASK 0x0a
615 #define SELNARROW 0x00
616 #define SELBUSB 0x08
617 #define SINGLE_BUS 0x00
618
619 #define SCB_TARGET(scb) \
620 (((scb)->hscb->target_channel_lun & TID) >> 4)
621 #define SCB_LUN(scb) \
622 ((scb)->hscb->target_channel_lun & LID)
623 #define SCB_IS_SCSIBUS_B(scb) \
624 (((scb)->hscb->target_channel_lun & SELBUSB) != 0)
625
626 /*
627 * If an error occurs during a data transfer phase, run the command
628 * to completion - it's easier that way - making a note of the error
629 * condition in this location. This then will modify a DID_OK status
630 * into an appropriate error for the higher-level SCSI code.
631 */
632 #define aic7xxx_error(cmd) ((cmd)->SCp.Status)
633
634 /*
635 * Keep track of the targets returned status.
636 */
637 #define aic7xxx_status(cmd) ((cmd)->SCp.sent_command)
638
639 /*
640 * The position of the SCSI commands scb within the scb array.
641 */
642 #define aic7xxx_position(cmd) ((cmd)->SCp.have_data_in)
643
644 /*
645 * The stored DMA mapping for single-buffer data transfers.
646 */
647 #define aic7xxx_mapping(cmd) ((cmd)->SCp.phase)
648
649 /*
650 * So we can keep track of our host structs
651 */
652 static struct aic7xxx_host *first_aic7xxx = NULL;
653
654 /*
655 * As of Linux 2.1, the mid-level SCSI code uses virtual addresses
656 * in the scatter-gather lists. We need to convert the virtual
657 * addresses to physical addresses.
658 */
659 struct hw_scatterlist {
660 unsigned int address;
661 unsigned int length;
662 };
663
664 /*
665 * Maximum number of SG segments these cards can support.
666 */
667 #define AIC7XXX_MAX_SG 128
668
669 /*
670 * The maximum number of SCBs we could have for ANY type
671 * of card. DON'T FORGET TO CHANGE THE SCB MASK IN THE
672 * SEQUENCER CODE IF THIS IS MODIFIED!
673 */
674 #define AIC7XXX_MAXSCB 255
675
676
677 struct aic7xxx_hwscb {
678 /* ------------ Begin hardware supported fields ---------------- */
679 /* 0*/ unsigned char control;
680 /* 1*/ unsigned char target_channel_lun; /* 4/1/3 bits */
681 /* 2*/ unsigned char target_status;
682 /* 3*/ unsigned char SG_segment_count;
683 /* 4*/ unsigned int SG_list_pointer;
684 /* 8*/ unsigned char residual_SG_segment_count;
685 /* 9*/ unsigned char residual_data_count[3];
686 /*12*/ unsigned int data_pointer;
687 /*16*/ unsigned int data_count;
688 /*20*/ unsigned int SCSI_cmd_pointer;
689 /*24*/ unsigned char SCSI_cmd_length;
690 /*25*/ unsigned char tag; /* Index into our kernel SCB array.
691 * Also used as the tag for tagged I/O
692 */
693 #define SCB_PIO_TRANSFER_SIZE 26 /* amount we need to upload/download
694 * via PIO to initialize a transaction.
695 */
696 /*26*/ unsigned char next; /* Used to thread SCBs awaiting selection
697 * or disconnected down in the sequencer.
698 */
699 /*27*/ unsigned char prev;
700 /*28*/ unsigned int pad; /*
701 * Unused by the kernel, but we require
702 * the padding so that the array of
703 * hardware SCBs is aligned on 32 byte
704 * boundaries so the sequencer can index
705 */
706 };
707
708 typedef enum {
709 SCB_FREE = 0x0000,
710 SCB_DTR_SCB = 0x0001,
711 SCB_WAITINGQ = 0x0002,
712 SCB_ACTIVE = 0x0004,
713 SCB_SENSE = 0x0008,
714 SCB_ABORT = 0x0010,
715 SCB_DEVICE_RESET = 0x0020,
716 SCB_RESET = 0x0040,
717 SCB_RECOVERY_SCB = 0x0080,
718 SCB_MSGOUT_PPR = 0x0100,
719 SCB_MSGOUT_SENT = 0x0200,
720 SCB_MSGOUT_SDTR = 0x0400,
721 SCB_MSGOUT_WDTR = 0x0800,
722 SCB_MSGOUT_BITS = SCB_MSGOUT_PPR |
723 SCB_MSGOUT_SENT |
724 SCB_MSGOUT_SDTR |
725 SCB_MSGOUT_WDTR,
726 SCB_QUEUED_ABORT = 0x1000,
727 SCB_QUEUED_FOR_DONE = 0x2000,
728 SCB_WAS_BUSY = 0x4000
729 } scb_flag_type;
730
731 typedef enum {
732 AHC_FNONE = 0x00000000,
733 AHC_PAGESCBS = 0x00000001,
734 AHC_CHANNEL_B_PRIMARY = 0x00000002,
735 AHC_USEDEFAULTS = 0x00000004,
736 AHC_INDIRECT_PAGING = 0x00000008,
737 AHC_CHNLB = 0x00000020,
738 AHC_CHNLC = 0x00000040,
739 AHC_EXTEND_TRANS_A = 0x00000100,
740 AHC_EXTEND_TRANS_B = 0x00000200,
741 AHC_TERM_ENB_A = 0x00000400,
742 AHC_TERM_ENB_SE_LOW = 0x00000400,
743 AHC_TERM_ENB_B = 0x00000800,
744 AHC_TERM_ENB_SE_HIGH = 0x00000800,
745 AHC_HANDLING_REQINITS = 0x00001000,
746 AHC_TARGETMODE = 0x00002000,
747 AHC_NEWEEPROM_FMT = 0x00004000,
748 /*
749 * Here ends the FreeBSD defined flags and here begins the linux defined
750 * flags. NOTE: I did not preserve the old flag name during this change
751 * specifically to force me to evaluate what flags were being used properly
752 * and what flags weren't. This way, I could clean up the flag usage on
753 * a use by use basis. Doug Ledford
754 */
755 AHC_MOTHERBOARD = 0x00020000,
756 AHC_NO_STPWEN = 0x00040000,
757 AHC_RESET_DELAY = 0x00080000,
758 AHC_A_SCANNED = 0x00100000,
759 AHC_B_SCANNED = 0x00200000,
760 AHC_MULTI_CHANNEL = 0x00400000,
761 AHC_BIOS_ENABLED = 0x00800000,
762 AHC_SEEPROM_FOUND = 0x01000000,
763 AHC_TERM_ENB_LVD = 0x02000000,
764 AHC_ABORT_PENDING = 0x04000000,
765 AHC_RESET_PENDING = 0x08000000,
766 #define AHC_IN_ISR_BIT 28
767 AHC_IN_ISR = 0x10000000,
768 AHC_IN_ABORT = 0x20000000,
769 AHC_IN_RESET = 0x40000000,
770 AHC_EXTERNAL_SRAM = 0x80000000
771 } ahc_flag_type;
772
773 typedef enum {
774 AHC_NONE = 0x0000,
775 AHC_CHIPID_MASK = 0x00ff,
776 AHC_AIC7770 = 0x0001,
777 AHC_AIC7850 = 0x0002,
778 AHC_AIC7860 = 0x0003,
779 AHC_AIC7870 = 0x0004,
780 AHC_AIC7880 = 0x0005,
781 AHC_AIC7890 = 0x0006,
782 AHC_AIC7895 = 0x0007,
783 AHC_AIC7896 = 0x0008,
784 AHC_AIC7892 = 0x0009,
785 AHC_AIC7899 = 0x000a,
786 AHC_VL = 0x0100,
787 AHC_EISA = 0x0200,
788 AHC_PCI = 0x0400,
789 } ahc_chip;
790
791 typedef enum {
792 AHC_FENONE = 0x0000,
793 AHC_ULTRA = 0x0001,
794 AHC_ULTRA2 = 0x0002,
795 AHC_WIDE = 0x0004,
796 AHC_TWIN = 0x0008,
797 AHC_MORE_SRAM = 0x0010,
798 AHC_CMD_CHAN = 0x0020,
799 AHC_QUEUE_REGS = 0x0040,
800 AHC_SG_PRELOAD = 0x0080,
801 AHC_SPIOCAP = 0x0100,
802 AHC_ULTRA3 = 0x0200,
803 AHC_NEW_AUTOTERM = 0x0400,
804 AHC_AIC7770_FE = AHC_FENONE,
805 AHC_AIC7850_FE = AHC_SPIOCAP,
806 AHC_AIC7860_FE = AHC_ULTRA|AHC_SPIOCAP,
807 AHC_AIC7870_FE = AHC_FENONE,
808 AHC_AIC7880_FE = AHC_ULTRA,
809 AHC_AIC7890_FE = AHC_MORE_SRAM|AHC_CMD_CHAN|AHC_ULTRA2|
810 AHC_QUEUE_REGS|AHC_SG_PRELOAD|AHC_NEW_AUTOTERM,
811 AHC_AIC7895_FE = AHC_MORE_SRAM|AHC_CMD_CHAN|AHC_ULTRA,
812 AHC_AIC7896_FE = AHC_AIC7890_FE,
813 AHC_AIC7892_FE = AHC_AIC7890_FE|AHC_ULTRA3,
814 AHC_AIC7899_FE = AHC_AIC7890_FE|AHC_ULTRA3,
815 } ahc_feature;
816
817 #define SCB_DMA_ADDR(scb, addr) ((unsigned long)(addr) + (scb)->scb_dma->dma_offset)
818
819 struct aic7xxx_scb_dma {
820 unsigned long dma_offset; /* Correction you have to add
821 * to virtual address to get
822 * dma handle in this region */
823 dma_addr_t dma_address; /* DMA handle of the start,
824 * for unmap */
825 unsigned int dma_len; /* DMA length */
826 };
827
828 typedef enum {
829 AHC_BUG_NONE = 0x0000,
830 AHC_BUG_TMODE_WIDEODD = 0x0001,
831 AHC_BUG_AUTOFLUSH = 0x0002,
832 AHC_BUG_CACHETHEN = 0x0004,
833 AHC_BUG_CACHETHEN_DIS = 0x0008,
834 AHC_BUG_PCI_2_1_RETRY = 0x0010,
835 AHC_BUG_PCI_MWI = 0x0020,
836 AHC_BUG_SCBCHAN_UPLOAD = 0x0040,
837 } ahc_bugs;
838
839 struct aic7xxx_scb {
840 struct aic7xxx_hwscb *hscb; /* corresponding hardware scb */
841 Scsi_Cmnd *cmd; /* Scsi_Cmnd for this scb */
842 struct aic7xxx_scb *q_next; /* next scb in queue */
843 volatile scb_flag_type flags; /* current state of scb */
844 struct hw_scatterlist *sg_list; /* SG list in adapter format */
845 unsigned char tag_action;
846 unsigned char sg_count;
847 unsigned char *sense_cmd; /*
848 * Allocate 6 characters for
849 * sense command.
850 */
851 unsigned char *cmnd;
852 unsigned int sg_length; /* We init this during buildscb so we
853 * don't have to calculate anything
854 * during underflow/overflow/stat code
855 */
856 void *kmalloc_ptr;
857 struct aic7xxx_scb_dma *scb_dma;
858 };
859
860 /*
861 * Define a linked list of SCBs.
862 */
863 typedef struct {
864 struct aic7xxx_scb *head;
865 struct aic7xxx_scb *tail;
866 } scb_queue_type;
867
868 static struct {
869 unsigned char errno;
870 const char *errmesg;
871 } hard_error[] = {
872 { ILLHADDR, "Illegal Host Access" },
873 { ILLSADDR, "Illegal Sequencer Address referenced" },
874 { ILLOPCODE, "Illegal Opcode in sequencer program" },
875 { SQPARERR, "Sequencer Ram Parity Error" },
876 { DPARERR, "Data-Path Ram Parity Error" },
877 { MPARERR, "Scratch Ram/SCB Array Ram Parity Error" },
878 { PCIERRSTAT,"PCI Error detected" },
879 { CIOPARERR, "CIOBUS Parity Error" }
880 };
881
882 static unsigned char
883 generic_sense[] = { REQUEST_SENSE, 0, 0, 0, 255, 0 };
884
885 typedef struct {
886 scb_queue_type free_scbs; /*
887 * SCBs assigned to free slot on
888 * card (no paging required)
889 */
890 struct aic7xxx_scb *scb_array[AIC7XXX_MAXSCB];
891 struct aic7xxx_hwscb *hscbs;
892 unsigned char numscbs; /* current number of scbs */
893 unsigned char maxhscbs; /* hardware scbs */
894 unsigned char maxscbs; /* max scbs including pageable scbs */
895 dma_addr_t hscbs_dma; /* DMA handle to hscbs */
896 unsigned int hscbs_dma_len; /* length of the above DMA area */
897 void *hscb_kmalloc_ptr;
898 } scb_data_type;
899
900 struct target_cmd {
901 unsigned char mesg_bytes[4];
902 unsigned char command[28];
903 };
904
905 #define AHC_TRANS_CUR 0x0001
906 #define AHC_TRANS_ACTIVE 0x0002
907 #define AHC_TRANS_GOAL 0x0004
908 #define AHC_TRANS_USER 0x0008
909 #define AHC_TRANS_QUITE 0x0010
910 typedef struct {
911 unsigned char cur_width;
912 unsigned char goal_width;
913 unsigned char cur_period;
914 unsigned char goal_period;
915 unsigned char cur_offset;
916 unsigned char goal_offset;
917 unsigned char cur_options;
918 unsigned char goal_options;
919 unsigned char user_width;
920 unsigned char user_period;
921 unsigned char user_offset;
922 unsigned char user_options;
923 } transinfo_type;
924
925 /*
926 * Define a structure used for each host adapter. Note, in order to avoid
927 * problems with architectures I can't test on (because I don't have one,
928 * such as the Alpha based systems) which happen to give faults for
929 * non-aligned memory accesses, care was taken to align this structure
930 * in a way that gauranteed all accesses larger than 8 bits were aligned
931 * on the appropriate boundary. It's also organized to try and be more
932 * cache line efficient. Be careful when changing this lest you might hurt
933 * overall performance and bring down the wrath of the masses.
934 */
935 struct aic7xxx_host {
936 /*
937 * This is the first 64 bytes in the host struct
938 */
939
940 /*
941 * We are grouping things here....first, items that get either read or
942 * written with nearly every interrupt
943 */
944 volatile long flags;
945 ahc_feature features; /* chip features */
946 unsigned long base; /* card base address */
947 volatile unsigned char *maddr; /* memory mapped address */
948 unsigned long isr_count; /* Interrupt count */
949 unsigned long spurious_int;
950 scb_data_type *scb_data;
951 volatile unsigned short needppr;
952 volatile unsigned short needsdtr;
953 volatile unsigned short needwdtr;
954 volatile unsigned short dtr_pending;
955 struct aic7xxx_cmd_queue {
956 Scsi_Cmnd *head;
957 Scsi_Cmnd *tail;
958 } completeq;
959
960 /*
961 * Things read/written on nearly every entry into aic7xxx_queue()
962 */
963 volatile scb_queue_type waiting_scbs;
964 unsigned short discenable; /* Targets allowed to disconnect */
965 unsigned short tagenable; /* Targets using tagged I/O */
966 unsigned short orderedtag; /* Ordered Q tags allowed */
967 unsigned char unpause; /* unpause value for HCNTRL */
968 unsigned char pause; /* pause value for HCNTRL */
969 volatile unsigned char qoutfifonext;
970 volatile unsigned char activescbs; /* active scbs */
971 volatile unsigned char max_activescbs;
972 volatile unsigned char qinfifonext;
973 volatile unsigned char *untagged_scbs;
974 volatile unsigned char *qoutfifo;
975 volatile unsigned char *qinfifo;
976
977 #define DEVICE_PRESENT 0x01
978 #define BUS_DEVICE_RESET_PENDING 0x02
979 #define DEVICE_RESET_DELAY 0x04
980 #define DEVICE_PRINT_DTR 0x08
981 #define DEVICE_WAS_BUSY 0x10
982 #define DEVICE_SCSI_3 0x20
983 #define DEVICE_DTR_SCANNED 0x40
984 volatile unsigned char dev_flags[MAX_TARGETS];
985 volatile unsigned char dev_active_cmds[MAX_TARGETS];
986 volatile unsigned char dev_temp_queue_depth[MAX_TARGETS];
987 unsigned char dev_commands_sent[MAX_TARGETS];
988
989 unsigned int dev_timer_active; /* Which devs have a timer set */
990 struct timer_list dev_timer;
991 unsigned long dev_expires[MAX_TARGETS];
992
993 spinlock_t spin_lock;
994 volatile unsigned char cpu_lock_count[NR_CPUS];
995
996 unsigned char dev_last_queue_full[MAX_TARGETS];
997 unsigned char dev_last_queue_full_count[MAX_TARGETS];
998 unsigned char dev_max_queue_depth[MAX_TARGETS];
999
1000 volatile scb_queue_type delayed_scbs[MAX_TARGETS];
1001
1002
1003 unsigned char msg_buf[13]; /* The message for the target */
1004 unsigned char msg_type;
1005 #define MSG_TYPE_NONE 0x00
1006 #define MSG_TYPE_INITIATOR_MSGOUT 0x01
1007 #define MSG_TYPE_INITIATOR_MSGIN 0x02
1008 unsigned char msg_len; /* Length of message */
1009 unsigned char msg_index; /* Index into msg_buf array */
1010 transinfo_type transinfo[MAX_TARGETS];
1011
1012
1013 /*
1014 * We put the less frequently used host structure items after the more
1015 * frequently used items to try and ease the burden on the cache subsystem.
1016 * These entries are not *commonly* accessed, whereas the preceding entries
1017 * are accessed very often.
1018 */
1019
1020 unsigned int irq; /* IRQ for this adapter */
1021 int instance; /* aic7xxx instance number */
1022 int scsi_id; /* host adapter SCSI ID */
1023 int scsi_id_b; /* channel B for twin adapters */
1024 unsigned int bios_address;
1025 int board_name_index;
1026 unsigned short needppr_copy; /* default config */
1027 unsigned short needsdtr_copy; /* default config */
1028 unsigned short needwdtr_copy; /* default config */
1029 unsigned short ultraenb; /* Ultra mode target list */
1030 unsigned short bios_control; /* bios control - SEEPROM */
1031 unsigned short adapter_control; /* adapter control - SEEPROM */
1032 struct pci_dev *pdev;
1033 unsigned char pci_bus;
1034 unsigned char pci_device_fn;
1035 struct seeprom_config sc;
1036 unsigned short sc_type;
1037 unsigned short sc_size;
1038 struct aic7xxx_host *next; /* allow for multiple IRQs */
1039 struct Scsi_Host *host; /* pointer to scsi host */
1040 int host_no; /* SCSI host number */
1041 unsigned long mbase; /* I/O memory address */
1042 ahc_chip chip; /* chip type */
1043 ahc_bugs bugs;
1044 dma_addr_t fifo_dma; /* DMA handle for fifo arrays */
1045
1046 /*
1047 * Statistics Kept:
1048 *
1049 * Total Xfers (count for each command that has a data xfer),
1050 * broken down further by reads && writes.
1051 *
1052 * Binned sizes, writes && reads:
1053 * < 512, 512, 1-2K, 2-4K, 4-8K, 8-16K, 16-32K, 32-64K, 64K-128K, > 128K
1054 *
1055 * Total amounts read/written above 512 bytes (amts under ignored)
1056 *
1057 * NOTE: Enabling this feature is likely to cause a noticeable performance
1058 * decrease as the accesses into the stats structures blows apart multiple
1059 * cache lines and is CPU time consuming.
1060 *
1061 * NOTE: Since it doesn't really buy us much, but consumes *tons* of RAM
1062 * and blows apart all sorts of cache lines, I modified this so that we
1063 * no longer look at the LUN. All LUNs now go into the same bin on each
1064 * device for stats purposes.
1065 */
1066 struct aic7xxx_xferstats {
1067 long w_total; /* total writes */
1068 long r_total; /* total reads */
1069 #ifdef AIC7XXX_PROC_STATS
1070 long w_bins[8]; /* binned write */
1071 long r_bins[8]; /* binned reads */
1072 #endif /* AIC7XXX_PROC_STATS */
1073 } stats[MAX_TARGETS]; /* [(channel << 3)|target] */
1074
1075 #if 0
1076 struct target_cmd *targetcmds;
1077 unsigned int num_targetcmds;
1078 #endif
1079
1080 };
1081
1082 /*
1083 * Valid SCSIRATE values. (p. 3-17)
1084 * Provides a mapping of transfer periods in ns/4 to the proper value to
1085 * stick in the SCSIRATE reg to use that transfer rate.
1086 */
1087 #define AHC_SYNCRATE_ULTRA3 0
1088 #define AHC_SYNCRATE_ULTRA2 1
1089 #define AHC_SYNCRATE_ULTRA 3
1090 #define AHC_SYNCRATE_FAST 6
1091 #define AHC_SYNCRATE_CRC 0x40
1092 #define AHC_SYNCRATE_SE 0x10
1093 static struct aic7xxx_syncrate {
1094 /* Rates in Ultra mode have bit 8 of sxfr set */
1095 #define ULTRA_SXFR 0x100
1096 int sxfr_ultra2;
1097 int sxfr;
1098 unsigned char period;
1099 const char *rate[2];
1100 } aic7xxx_syncrates[] = {
1101 { 0x42, 0x000, 9, {"80.0", "160.0"} },
1102 { 0x13, 0x000, 10, {"40.0", "80.0"} },
1103 { 0x14, 0x000, 11, {"33.0", "66.6"} },
1104 { 0x15, 0x100, 12, {"20.0", "40.0"} },
1105 { 0x16, 0x110, 15, {"16.0", "32.0"} },
1106 { 0x17, 0x120, 18, {"13.4", "26.8"} },
1107 { 0x18, 0x000, 25, {"10.0", "20.0"} },
1108 { 0x19, 0x010, 31, {"8.0", "16.0"} },
1109 { 0x1a, 0x020, 37, {"6.67", "13.3"} },
1110 { 0x1b, 0x030, 43, {"5.7", "11.4"} },
1111 { 0x10, 0x040, 50, {"5.0", "10.0"} },
1112 { 0x00, 0x050, 56, {"4.4", "8.8" } },
1113 { 0x00, 0x060, 62, {"4.0", "8.0" } },
1114 { 0x00, 0x070, 68, {"3.6", "7.2" } },
1115 { 0x00, 0x000, 0, {NULL, NULL} },
1116 };
1117
1118 #define CTL_OF_SCB(scb) (((scb->hscb)->target_channel_lun >> 3) & 0x1), \
1119 (((scb->hscb)->target_channel_lun >> 4) & 0xf), \
1120 ((scb->hscb)->target_channel_lun & 0x07)
1121
1122 #define CTL_OF_CMD(cmd) ((cmd->channel) & 0x01), \
1123 ((cmd->target) & 0x0f), \
1124 ((cmd->lun) & 0x07)
1125
1126 #define TARGET_INDEX(cmd) ((cmd)->target | ((cmd)->channel << 3))
1127
1128 /*
1129 * A nice little define to make doing our printks a little easier
1130 */
1131
1132 #define WARN_LEAD KERN_WARNING "(scsi%d:%d:%d:%d) "
1133 #define INFO_LEAD KERN_INFO "(scsi%d:%d:%d:%d) "
1134
1135 /*
1136 * XXX - these options apply unilaterally to _all_ 274x/284x/294x
1137 * cards in the system. This should be fixed. Exceptions to this
1138 * rule are noted in the comments.
1139 */
1140
1141
1142 /*
1143 * Skip the scsi bus reset. Non 0 make us skip the reset at startup. This
1144 * has no effect on any later resets that might occur due to things like
1145 * SCSI bus timeouts.
1146 */
1147 static unsigned int aic7xxx_no_reset = 0;
1148 /*
1149 * Certain PCI motherboards will scan PCI devices from highest to lowest,
1150 * others scan from lowest to highest, and they tend to do all kinds of
1151 * strange things when they come into contact with PCI bridge chips. The
1152 * net result of all this is that the PCI card that is actually used to boot
1153 * the machine is very hard to detect. Most motherboards go from lowest
1154 * PCI slot number to highest, and the first SCSI controller found is the
1155 * one you boot from. The only exceptions to this are when a controller
1156 * has its BIOS disabled. So, we by default sort all of our SCSI controllers
1157 * from lowest PCI slot number to highest PCI slot number. We also force
1158 * all controllers with their BIOS disabled to the end of the list. This
1159 * works on *almost* all computers. Where it doesn't work, we have this
1160 * option. Setting this option to non-0 will reverse the order of the sort
1161 * to highest first, then lowest, but will still leave cards with their BIOS
1162 * disabled at the very end. That should fix everyone up unless there are
1163 * really strange cirumstances.
1164 */
1165 static int aic7xxx_reverse_scan = 0;
1166 /*
1167 * Should we force EXTENDED translation on a controller.
1168 * 0 == Use whatever is in the SEEPROM or default to off
1169 * 1 == Use whatever is in the SEEPROM or default to on
1170 */
1171 static unsigned int aic7xxx_extended = 0;
1172 /*
1173 * The IRQ trigger method used on EISA controllers. Does not effect PCI cards.
1174 * -1 = Use detected settings.
1175 * 0 = Force Edge triggered mode.
1176 * 1 = Force Level triggered mode.
1177 */
1178 static int aic7xxx_irq_trigger = -1;
1179 /*
1180 * This variable is used to override the termination settings on a controller.
1181 * This should not be used under normal conditions. However, in the case
1182 * that a controller does not have a readable SEEPROM (so that we can't
1183 * read the SEEPROM settings directly) and that a controller has a buggered
1184 * version of the cable detection logic, this can be used to force the
1185 * correct termination. It is preferable to use the manual termination
1186 * settings in the BIOS if possible, but some motherboard controllers store
1187 * those settings in a format we can't read. In other cases, auto term
1188 * should also work, but the chipset was put together with no auto term
1189 * logic (common on motherboard controllers). In those cases, we have
1190 * 32 bits here to work with. That's good for 8 controllers/channels. The
1191 * bits are organized as 4 bits per channel, with scsi0 getting the lowest
1192 * 4 bits in the int. A 1 in a bit position indicates the termination setting
1193 * that corresponds to that bit should be enabled, a 0 is disabled.
1194 * It looks something like this:
1195 *
1196 * 0x0f = 1111-Single Ended Low Byte Termination on/off
1197 * ||\-Single Ended High Byte Termination on/off
1198 * |\-LVD Low Byte Termination on/off
1199 * \-LVD High Byte Termination on/off
1200 *
1201 * For non-Ultra2 controllers, the upper 2 bits are not important. So, to
1202 * enable both high byte and low byte termination on scsi0, I would need to
1203 * make sure that the override_term variable was set to 0x03 (bits 0011).
1204 * To make sure that all termination is enabled on an Ultra2 controller at
1205 * scsi2 and only high byte termination on scsi1 and high and low byte
1206 * termination on scsi0, I would set override_term=0xf23 (bits 1111 0010 0011)
1207 *
1208 * For the most part, users should never have to use this, that's why I
1209 * left it fairly cryptic instead of easy to understand. If you need it,
1210 * most likely someone will be telling you what your's needs to be set to.
1211 */
1212 static int aic7xxx_override_term = -1;
1213 /*
1214 * Certain motherboard chipset controllers tend to screw
1215 * up the polarity of the term enable output pin. Use this variable
1216 * to force the correct polarity for your system. This is a bitfield variable
1217 * similar to the previous one, but this one has one bit per channel instead
1218 * of four.
1219 * 0 = Force the setting to active low.
1220 * 1 = Force setting to active high.
1221 * Most Adaptec cards are active high, several motherboards are active low.
1222 * To force a 2940 card at SCSI 0 to active high and a motherboard 7895
1223 * controller at scsi1 and scsi2 to active low, and a 2910 card at scsi3
1224 * to active high, you would need to set stpwlev=0x9 (bits 1001).
1225 *
1226 * People shouldn't need to use this, but if you are experiencing lots of
1227 * SCSI timeout problems, this may help. There is one sure way to test what
1228 * this option needs to be. Using a boot floppy to boot the system, configure
1229 * your system to enable all SCSI termination (in the Adaptec SCSI BIOS) and
1230 * if needed then also pass a value to override_term to make sure that the
1231 * driver is enabling SCSI termination, then set this variable to either 0
1232 * or 1. When the driver boots, make sure there are *NO* SCSI cables
1233 * connected to your controller. If it finds and inits the controller
1234 * without problem, then the setting you passed to stpwlev was correct. If
1235 * the driver goes into a reset loop and hangs the system, then you need the
1236 * other setting for this variable. If neither setting lets the machine
1237 * boot then you have definite termination problems that may not be fixable.
1238 */
1239 static int aic7xxx_stpwlev = -1;
1240 /*
1241 * Set this to non-0 in order to force the driver to panic the kernel
1242 * and print out debugging info on a SCSI abort or reset cycle.
1243 */
1244 static int aic7xxx_panic_on_abort = 0;
1245 /*
1246 * PCI bus parity checking of the Adaptec controllers. This is somewhat
1247 * dubious at best. To my knowledge, this option has never actually
1248 * solved a PCI parity problem, but on certain machines with broken PCI
1249 * chipset configurations, it can generate tons of false error messages.
1250 * It's included in the driver for completeness.
1251 * 0 = Shut off PCI parity check
1252 * -1 = Normal polarity pci parity checking
1253 * 1 = reverse polarity pci parity checking
1254 *
1255 * NOTE: you can't actually pass -1 on the lilo prompt. So, to set this
1256 * variable to -1 you would actually want to simply pass the variable
1257 * name without a number. That will invert the 0 which will result in
1258 * -1.
1259 */
1260 static int aic7xxx_pci_parity = 0;
1261 /*
1262 * Set this to any non-0 value to cause us to dump the contents of all
1263 * the card's registers in a hex dump format tailored to each model of
1264 * controller.
1265 *
1266 * NOTE: THE CONTROLLER IS LEFT IN AN UNUSEABLE STATE BY THIS OPTION.
1267 * YOU CANNOT BOOT UP WITH THIS OPTION, IT IS FOR DEBUGGING PURPOSES
1268 * ONLY
1269 */
1270 static int aic7xxx_dump_card = 0;
1271 /*
1272 * Set this to a non-0 value to make us dump out the 32 bit instruction
1273 * registers on the card after completing the sequencer download. This
1274 * allows the actual sequencer download to be verified. It is possible
1275 * to use this option and still boot up and run your system. This is
1276 * only intended for debugging purposes.
1277 */
1278 static int aic7xxx_dump_sequencer = 0;
1279 /*
1280 * Certain newer motherboards have put new PCI based devices into the
1281 * IO spaces that used to typically be occupied by VLB or EISA cards.
1282 * This overlap can cause these newer motherboards to lock up when scanned
1283 * for older EISA and VLB devices. Setting this option to non-0 will
1284 * cause the driver to skip scanning for any VLB or EISA controllers and
1285 * only support the PCI controllers. NOTE: this means that if the kernel
1286 * os compiled with PCI support disabled, then setting this to non-0
1287 * would result in never finding any devices :)
1288 */
1289 static int aic7xxx_no_probe = 0;
1290 /*
1291 * On some machines, enabling the external SCB RAM isn't reliable yet. I
1292 * haven't had time to make test patches for things like changing the
1293 * timing mode on that external RAM either. Some of those changes may
1294 * fix the problem. Until then though, we default to external SCB RAM
1295 * off and give a command line option to enable it.
1296 */
1297 static int aic7xxx_scbram = 0;
1298 /*
1299 * So that we can set how long each device is given as a selection timeout.
1300 * The table of values goes like this:
1301 * 0 - 256ms
1302 * 1 - 128ms
1303 * 2 - 64ms
1304 * 3 - 32ms
1305 * We default to 64ms because it's fast. Some old SCSI-I devices need a
1306 * longer time. The final value has to be left shifted by 3, hence 0x10
1307 * is the final value.
1308 */
1309 static int aic7xxx_seltime = 0x10;
1310 /*
1311 * So that insmod can find the variable and make it point to something
1312 */
1313 #ifdef MODULE
1314 static char * aic7xxx = NULL;
1315 MODULE_PARM(aic7xxx, "s");
1316
1317 /*
1318 * Just in case someone uses commas to separate items on the insmod
1319 * command line, we define a dummy buffer here to avoid having insmod
1320 * write wild stuff into our code segment
1321 */
1322 static char dummy_buffer[60] = "Please don't trounce on me insmod!!\n";
1323
1324 #endif
1325
1326 #define VERBOSE_NORMAL 0x0000
1327 #define VERBOSE_NEGOTIATION 0x0001
1328 #define VERBOSE_SEQINT 0x0002
1329 #define VERBOSE_SCSIINT 0x0004
1330 #define VERBOSE_PROBE 0x0008
1331 #define VERBOSE_PROBE2 0x0010
1332 #define VERBOSE_NEGOTIATION2 0x0020
1333 #define VERBOSE_MINOR_ERROR 0x0040
1334 #define VERBOSE_TRACING 0x0080
1335 #define VERBOSE_ABORT 0x0f00
1336 #define VERBOSE_ABORT_MID 0x0100
1337 #define VERBOSE_ABORT_FIND 0x0200
1338 #define VERBOSE_ABORT_PROCESS 0x0400
1339 #define VERBOSE_ABORT_RETURN 0x0800
1340 #define VERBOSE_RESET 0xf000
1341 #define VERBOSE_RESET_MID 0x1000
1342 #define VERBOSE_RESET_FIND 0x2000
1343 #define VERBOSE_RESET_PROCESS 0x4000
1344 #define VERBOSE_RESET_RETURN 0x8000
1345 static int aic7xxx_verbose = VERBOSE_NORMAL | VERBOSE_NEGOTIATION |
1346 VERBOSE_PROBE; /* verbose messages */
1347
1348
1349 /****************************************************************************
1350 *
1351 * We're going to start putting in function declarations so that order of
1352 * functions is no longer important. As needed, they are added here.
1353 *
1354 ***************************************************************************/
1355
1356 static void aic7xxx_panic_abort(struct aic7xxx_host *p, Scsi_Cmnd *cmd);
1357 static void aic7xxx_print_card(struct aic7xxx_host *p);
1358 static void aic7xxx_print_scratch_ram(struct aic7xxx_host *p);
1359 static void aic7xxx_print_sequencer(struct aic7xxx_host *p, int downloaded);
1360 #ifdef AIC7XXX_VERBOSE_DEBUGGING
1361 static void aic7xxx_check_scbs(struct aic7xxx_host *p, char *buffer);
1362 #endif
1363
1364 /****************************************************************************
1365 *
1366 * These functions are now used. They happen to be wrapped in useless
1367 * inb/outb port read/writes around the real reads and writes because it
1368 * seems that certain very fast CPUs have a problem dealing with us when
1369 * going at full speed.
1370 *
1371 ***************************************************************************/
1372
1373 static inline unsigned char
aic_inb(struct aic7xxx_host * p,long port)1374 aic_inb(struct aic7xxx_host *p, long port)
1375 {
1376 #ifdef MMAPIO
1377 unsigned char x;
1378 if(p->maddr)
1379 {
1380 x = readb(p->maddr + port);
1381 }
1382 else
1383 {
1384 x = inb(p->base + port);
1385 }
1386 return(x);
1387 #else
1388 return(inb(p->base + port));
1389 #endif
1390 }
1391
1392 static inline void
aic_outb(struct aic7xxx_host * p,unsigned char val,long port)1393 aic_outb(struct aic7xxx_host *p, unsigned char val, long port)
1394 {
1395 #ifdef MMAPIO
1396 if(p->maddr)
1397 {
1398 writeb(val, p->maddr + port);
1399 mb(); /* locked operation in order to force CPU ordering */
1400 readb(p->maddr + HCNTRL); /* dummy read to flush the PCI write */
1401 }
1402 else
1403 {
1404 outb(val, p->base + port);
1405 mb(); /* locked operation in order to force CPU ordering */
1406 }
1407 #else
1408 outb(val, p->base + port);
1409 mb(); /* locked operation in order to force CPU ordering */
1410 #endif
1411 }
1412
1413 /*+F*************************************************************************
1414 * Function:
1415 * aic7xxx_setup
1416 *
1417 * Description:
1418 * Handle Linux boot parameters. This routine allows for assigning a value
1419 * to a parameter with a ':' between the parameter and the value.
1420 * ie. aic7xxx=unpause:0x0A,extended
1421 *-F*************************************************************************/
1422 static int
aic7xxx_setup(char * s)1423 aic7xxx_setup(char *s)
1424 {
1425 int i, n;
1426 char *p;
1427 char *end;
1428
1429 static struct {
1430 const char *name;
1431 unsigned int *flag;
1432 } options[] = {
1433 { "extended", &aic7xxx_extended },
1434 { "no_reset", &aic7xxx_no_reset },
1435 { "irq_trigger", &aic7xxx_irq_trigger },
1436 { "verbose", &aic7xxx_verbose },
1437 { "reverse_scan",&aic7xxx_reverse_scan },
1438 { "override_term", &aic7xxx_override_term },
1439 { "stpwlev", &aic7xxx_stpwlev },
1440 { "no_probe", &aic7xxx_no_probe },
1441 { "panic_on_abort", &aic7xxx_panic_on_abort },
1442 { "pci_parity", &aic7xxx_pci_parity },
1443 { "dump_card", &aic7xxx_dump_card },
1444 { "dump_sequencer", &aic7xxx_dump_sequencer },
1445 { "scbram", &aic7xxx_scbram },
1446 { "seltime", &aic7xxx_seltime },
1447 { "tag_info", NULL }
1448 };
1449
1450 end = strchr(s, '\0');
1451
1452 for (p = strtok(s, ",."); p; p = strtok(NULL, ",."))
1453 {
1454 for (i = 0; i < NUMBER(options); i++)
1455 {
1456 n = strlen(options[i].name);
1457 if (!strncmp(options[i].name, p, n))
1458 {
1459 if (!strncmp(p, "tag_info", n))
1460 {
1461 if (p[n] == ':')
1462 {
1463 char *base;
1464 char *tok, *tok_end, *tok_end2;
1465 char tok_list[] = { '.', ',', '{', '}', '\0' };
1466 int i, instance = -1, device = -1;
1467 unsigned char done = FALSE;
1468
1469 base = p;
1470 tok = base + n + 1; /* Forward us just past the ':' */
1471 tok_end = strchr(tok, '\0');
1472 if (tok_end < end)
1473 *tok_end = ',';
1474 while(!done)
1475 {
1476 switch(*tok)
1477 {
1478 case '{':
1479 if (instance == -1)
1480 instance = 0;
1481 else if (device == -1)
1482 device = 0;
1483 tok++;
1484 break;
1485 case '}':
1486 if (device != -1)
1487 device = -1;
1488 else if (instance != -1)
1489 instance = -1;
1490 tok++;
1491 break;
1492 case ',':
1493 case '.':
1494 if (instance == -1)
1495 done = TRUE;
1496 else if (device >= 0)
1497 device++;
1498 else if (instance >= 0)
1499 instance++;
1500 if ( (device >= MAX_TARGETS) ||
1501 (instance >= NUMBER(aic7xxx_tag_info)) )
1502 done = TRUE;
1503 tok++;
1504 if (!done)
1505 {
1506 base = tok;
1507 }
1508 break;
1509 case '\0':
1510 done = TRUE;
1511 break;
1512 default:
1513 done = TRUE;
1514 tok_end = strchr(tok, '\0');
1515 for(i=0; tok_list[i]; i++)
1516 {
1517 tok_end2 = strchr(tok, tok_list[i]);
1518 if ( (tok_end2) && (tok_end2 < tok_end) )
1519 {
1520 tok_end = tok_end2;
1521 done = FALSE;
1522 }
1523 }
1524 if ( (instance >= 0) && (device >= 0) &&
1525 (instance < NUMBER(aic7xxx_tag_info)) &&
1526 (device < MAX_TARGETS) )
1527 aic7xxx_tag_info[instance].tag_commands[device] =
1528 simple_strtoul(tok, NULL, 0) & 0xff;
1529 tok = tok_end;
1530 break;
1531 }
1532 }
1533 while((p != base) && (p != NULL))
1534 p = strtok(NULL, ",.");
1535 }
1536 }
1537 else if (p[n] == ':')
1538 {
1539 *(options[i].flag) = simple_strtoul(p + n + 1, NULL, 0);
1540 if(!strncmp(p, "seltime", n))
1541 {
1542 *(options[i].flag) = (*(options[i].flag) % 4) << 3;
1543 }
1544 }
1545 else if (!strncmp(p, "verbose", n))
1546 {
1547 *(options[i].flag) = 0xff29;
1548 }
1549 else
1550 {
1551 *(options[i].flag) = ~(*(options[i].flag));
1552 if(!strncmp(p, "seltime", n))
1553 {
1554 *(options[i].flag) = (*(options[i].flag) % 4) << 3;
1555 }
1556 }
1557 }
1558 }
1559 }
1560 return 1;
1561 }
1562
1563 __setup("aic7xxx=", aic7xxx_setup);
1564
1565 /*+F*************************************************************************
1566 * Function:
1567 * pause_sequencer
1568 *
1569 * Description:
1570 * Pause the sequencer and wait for it to actually stop - this
1571 * is important since the sequencer can disable pausing for critical
1572 * sections.
1573 *-F*************************************************************************/
1574 static void
pause_sequencer(struct aic7xxx_host * p)1575 pause_sequencer(struct aic7xxx_host *p)
1576 {
1577 aic_outb(p, p->pause, HCNTRL);
1578 while ((aic_inb(p, HCNTRL) & PAUSE) == 0)
1579 {
1580 ;
1581 }
1582 if(p->features & AHC_ULTRA2)
1583 {
1584 aic_inb(p, CCSCBCTL);
1585 }
1586 }
1587
1588 /*+F*************************************************************************
1589 * Function:
1590 * unpause_sequencer
1591 *
1592 * Description:
1593 * Unpause the sequencer. Unremarkable, yet done often enough to
1594 * warrant an easy way to do it.
1595 *-F*************************************************************************/
1596 static void
unpause_sequencer(struct aic7xxx_host * p,int unpause_always)1597 unpause_sequencer(struct aic7xxx_host *p, int unpause_always)
1598 {
1599 if (unpause_always ||
1600 ( !(aic_inb(p, INTSTAT) & (SCSIINT | SEQINT | BRKADRINT)) &&
1601 !(p->flags & AHC_HANDLING_REQINITS) ) )
1602 {
1603 aic_outb(p, p->unpause, HCNTRL);
1604 }
1605 }
1606
1607 /*+F*************************************************************************
1608 * Function:
1609 * restart_sequencer
1610 *
1611 * Description:
1612 * Restart the sequencer program from address zero. This assumes
1613 * that the sequencer is already paused.
1614 *-F*************************************************************************/
1615 static void
restart_sequencer(struct aic7xxx_host * p)1616 restart_sequencer(struct aic7xxx_host *p)
1617 {
1618 aic_outb(p, 0, SEQADDR0);
1619 aic_outb(p, 0, SEQADDR1);
1620 aic_outb(p, FASTMODE, SEQCTL);
1621 }
1622
1623 /*
1624 * We include the aic7xxx_seq.c file here so that the other defines have
1625 * already been made, and so that it comes before the code that actually
1626 * downloads the instructions (since we don't typically use function
1627 * prototype, our code has to be ordered that way, it's a left-over from
1628 * the original driver days.....I should fix it some time DL).
1629 */
1630 #include "aic7xxx_old/aic7xxx_seq.c"
1631
1632 /*+F*************************************************************************
1633 * Function:
1634 * aic7xxx_check_patch
1635 *
1636 * Description:
1637 * See if the next patch to download should be downloaded.
1638 *-F*************************************************************************/
1639 static int
aic7xxx_check_patch(struct aic7xxx_host * p,struct sequencer_patch ** start_patch,int start_instr,int * skip_addr)1640 aic7xxx_check_patch(struct aic7xxx_host *p,
1641 struct sequencer_patch **start_patch, int start_instr, int *skip_addr)
1642 {
1643 struct sequencer_patch *cur_patch;
1644 struct sequencer_patch *last_patch;
1645 int num_patches;
1646
1647 num_patches = sizeof(sequencer_patches)/sizeof(struct sequencer_patch);
1648 last_patch = &sequencer_patches[num_patches];
1649 cur_patch = *start_patch;
1650
1651 while ((cur_patch < last_patch) && (start_instr == cur_patch->begin))
1652 {
1653 if (cur_patch->patch_func(p) == 0)
1654 {
1655 /*
1656 * Start rejecting code.
1657 */
1658 *skip_addr = start_instr + cur_patch->skip_instr;
1659 cur_patch += cur_patch->skip_patch;
1660 }
1661 else
1662 {
1663 /*
1664 * Found an OK patch. Advance the patch pointer to the next patch
1665 * and wait for our instruction pointer to get here.
1666 */
1667 cur_patch++;
1668 }
1669 }
1670
1671 *start_patch = cur_patch;
1672 if (start_instr < *skip_addr)
1673 /*
1674 * Still skipping
1675 */
1676 return (0);
1677 return(1);
1678 }
1679
1680
1681 /*+F*************************************************************************
1682 * Function:
1683 * aic7xxx_download_instr
1684 *
1685 * Description:
1686 * Find the next patch to download.
1687 *-F*************************************************************************/
1688 static void
aic7xxx_download_instr(struct aic7xxx_host * p,int instrptr,unsigned char * dconsts)1689 aic7xxx_download_instr(struct aic7xxx_host *p, int instrptr,
1690 unsigned char *dconsts)
1691 {
1692 union ins_formats instr;
1693 struct ins_format1 *fmt1_ins;
1694 struct ins_format3 *fmt3_ins;
1695 unsigned char opcode;
1696
1697 instr = *(union ins_formats*) &seqprog[instrptr * 4];
1698
1699 instr.integer = le32_to_cpu(instr.integer);
1700
1701 fmt1_ins = &instr.format1;
1702 fmt3_ins = NULL;
1703
1704 /* Pull the opcode */
1705 opcode = instr.format1.opcode;
1706 switch (opcode)
1707 {
1708 case AIC_OP_JMP:
1709 case AIC_OP_JC:
1710 case AIC_OP_JNC:
1711 case AIC_OP_CALL:
1712 case AIC_OP_JNE:
1713 case AIC_OP_JNZ:
1714 case AIC_OP_JE:
1715 case AIC_OP_JZ:
1716 {
1717 struct sequencer_patch *cur_patch;
1718 int address_offset;
1719 unsigned int address;
1720 int skip_addr;
1721 int i;
1722
1723 fmt3_ins = &instr.format3;
1724 address_offset = 0;
1725 address = fmt3_ins->address;
1726 cur_patch = sequencer_patches;
1727 skip_addr = 0;
1728
1729 for (i = 0; i < address;)
1730 {
1731 aic7xxx_check_patch(p, &cur_patch, i, &skip_addr);
1732 if (skip_addr > i)
1733 {
1734 int end_addr;
1735
1736 end_addr = MIN(address, skip_addr);
1737 address_offset += end_addr - i;
1738 i = skip_addr;
1739 }
1740 else
1741 {
1742 i++;
1743 }
1744 }
1745 address -= address_offset;
1746 fmt3_ins->address = address;
1747 /* Fall Through to the next code section */
1748 }
1749 case AIC_OP_OR:
1750 case AIC_OP_AND:
1751 case AIC_OP_XOR:
1752 case AIC_OP_ADD:
1753 case AIC_OP_ADC:
1754 case AIC_OP_BMOV:
1755 if (fmt1_ins->parity != 0)
1756 {
1757 fmt1_ins->immediate = dconsts[fmt1_ins->immediate];
1758 }
1759 fmt1_ins->parity = 0;
1760 /* Fall Through to the next code section */
1761 case AIC_OP_ROL:
1762 if ((p->features & AHC_ULTRA2) != 0)
1763 {
1764 int i, count;
1765
1766 /* Calculate odd parity for the instruction */
1767 for ( i=0, count=0; i < 31; i++)
1768 {
1769 unsigned int mask;
1770
1771 mask = 0x01 << i;
1772 if ((instr.integer & mask) != 0)
1773 count++;
1774 }
1775 if (!(count & 0x01))
1776 instr.format1.parity = 1;
1777 }
1778 else
1779 {
1780 if (fmt3_ins != NULL)
1781 {
1782 instr.integer = fmt3_ins->immediate |
1783 (fmt3_ins->source << 8) |
1784 (fmt3_ins->address << 16) |
1785 (fmt3_ins->opcode << 25);
1786 }
1787 else
1788 {
1789 instr.integer = fmt1_ins->immediate |
1790 (fmt1_ins->source << 8) |
1791 (fmt1_ins->destination << 16) |
1792 (fmt1_ins->ret << 24) |
1793 (fmt1_ins->opcode << 25);
1794 }
1795 }
1796 aic_outb(p, (instr.integer & 0xff), SEQRAM);
1797 aic_outb(p, ((instr.integer >> 8) & 0xff), SEQRAM);
1798 aic_outb(p, ((instr.integer >> 16) & 0xff), SEQRAM);
1799 aic_outb(p, ((instr.integer >> 24) & 0xff), SEQRAM);
1800 udelay(10);
1801 break;
1802
1803 default:
1804 panic("aic7xxx: Unknown opcode encountered in sequencer program.");
1805 break;
1806 }
1807 }
1808
1809
1810 /*+F*************************************************************************
1811 * Function:
1812 * aic7xxx_loadseq
1813 *
1814 * Description:
1815 * Load the sequencer code into the controller memory.
1816 *-F*************************************************************************/
1817 static void
aic7xxx_loadseq(struct aic7xxx_host * p)1818 aic7xxx_loadseq(struct aic7xxx_host *p)
1819 {
1820 struct sequencer_patch *cur_patch;
1821 int i;
1822 int downloaded;
1823 int skip_addr;
1824 unsigned char download_consts[4] = {0, 0, 0, 0};
1825
1826 if (aic7xxx_verbose & VERBOSE_PROBE)
1827 {
1828 printk(KERN_INFO "(scsi%d) Downloading sequencer code...", p->host_no);
1829 }
1830 #if 0
1831 download_consts[TMODE_NUMCMDS] = p->num_targetcmds;
1832 #endif
1833 download_consts[TMODE_NUMCMDS] = 0;
1834 cur_patch = &sequencer_patches[0];
1835 downloaded = 0;
1836 skip_addr = 0;
1837
1838 aic_outb(p, PERRORDIS|LOADRAM|FAILDIS|FASTMODE, SEQCTL);
1839 aic_outb(p, 0, SEQADDR0);
1840 aic_outb(p, 0, SEQADDR1);
1841
1842 for (i = 0; i < sizeof(seqprog) / 4; i++)
1843 {
1844 if (aic7xxx_check_patch(p, &cur_patch, i, &skip_addr) == 0)
1845 {
1846 /* Skip this instruction for this configuration. */
1847 continue;
1848 }
1849 aic7xxx_download_instr(p, i, &download_consts[0]);
1850 downloaded++;
1851 }
1852
1853 aic_outb(p, 0, SEQADDR0);
1854 aic_outb(p, 0, SEQADDR1);
1855 aic_outb(p, FASTMODE | FAILDIS, SEQCTL);
1856 unpause_sequencer(p, TRUE);
1857 mdelay(1);
1858 pause_sequencer(p);
1859 aic_outb(p, FASTMODE, SEQCTL);
1860 if (aic7xxx_verbose & VERBOSE_PROBE)
1861 {
1862 printk(" %d instructions downloaded\n", downloaded);
1863 }
1864 if (aic7xxx_dump_sequencer)
1865 aic7xxx_print_sequencer(p, downloaded);
1866 }
1867
1868 /*+F*************************************************************************
1869 * Function:
1870 * aic7xxx_print_sequencer
1871 *
1872 * Description:
1873 * Print the contents of the sequencer memory to the screen.
1874 *-F*************************************************************************/
1875 static void
aic7xxx_print_sequencer(struct aic7xxx_host * p,int downloaded)1876 aic7xxx_print_sequencer(struct aic7xxx_host *p, int downloaded)
1877 {
1878 int i, k, temp;
1879
1880 aic_outb(p, PERRORDIS|LOADRAM|FAILDIS|FASTMODE, SEQCTL);
1881 aic_outb(p, 0, SEQADDR0);
1882 aic_outb(p, 0, SEQADDR1);
1883
1884 k = 0;
1885 for (i=0; i < downloaded; i++)
1886 {
1887 if ( k == 0 )
1888 printk("%03x: ", i);
1889 temp = aic_inb(p, SEQRAM);
1890 temp |= (aic_inb(p, SEQRAM) << 8);
1891 temp |= (aic_inb(p, SEQRAM) << 16);
1892 temp |= (aic_inb(p, SEQRAM) << 24);
1893 printk("%08x", temp);
1894 if ( ++k == 8 )
1895 {
1896 printk("\n");
1897 k = 0;
1898 }
1899 else
1900 printk(" ");
1901 }
1902 aic_outb(p, 0, SEQADDR0);
1903 aic_outb(p, 0, SEQADDR1);
1904 aic_outb(p, FASTMODE | FAILDIS, SEQCTL);
1905 unpause_sequencer(p, TRUE);
1906 mdelay(1);
1907 pause_sequencer(p);
1908 aic_outb(p, FASTMODE, SEQCTL);
1909 printk("\n");
1910 }
1911
1912 /*+F*************************************************************************
1913 * Function:
1914 * aic7xxx_info
1915 *
1916 * Description:
1917 * Return a string describing the driver.
1918 *-F*************************************************************************/
1919 const char *
aic7xxx_info(struct Scsi_Host * dooh)1920 aic7xxx_info(struct Scsi_Host *dooh)
1921 {
1922 static char buffer[256];
1923 char *bp;
1924 struct aic7xxx_host *p;
1925
1926 bp = &buffer[0];
1927 p = (struct aic7xxx_host *)dooh->hostdata;
1928 memset(bp, 0, sizeof(buffer));
1929 strcpy(bp, "Adaptec AHA274x/284x/294x (EISA/VLB/PCI-Fast SCSI) ");
1930 strcat(bp, AIC7XXX_C_VERSION);
1931 strcat(bp, "/");
1932 strcat(bp, AIC7XXX_H_VERSION);
1933 strcat(bp, "\n");
1934 strcat(bp, " <");
1935 strcat(bp, board_names[p->board_name_index]);
1936 strcat(bp, ">");
1937
1938 return(bp);
1939 }
1940
1941 /*+F*************************************************************************
1942 * Function:
1943 * aic7xxx_find_syncrate
1944 *
1945 * Description:
1946 * Look up the valid period to SCSIRATE conversion in our table
1947 *-F*************************************************************************/
1948 static struct aic7xxx_syncrate *
aic7xxx_find_syncrate(struct aic7xxx_host * p,unsigned int * period,unsigned int maxsync,unsigned char * options)1949 aic7xxx_find_syncrate(struct aic7xxx_host *p, unsigned int *period,
1950 unsigned int maxsync, unsigned char *options)
1951 {
1952 struct aic7xxx_syncrate *syncrate;
1953 int done = FALSE;
1954
1955 switch(*options)
1956 {
1957 case MSG_EXT_PPR_OPTION_DT_CRC:
1958 case MSG_EXT_PPR_OPTION_DT_UNITS:
1959 if(!(p->features & AHC_ULTRA3))
1960 {
1961 *options = 0;
1962 maxsync = MAX(maxsync, AHC_SYNCRATE_ULTRA2);
1963 }
1964 break;
1965 case MSG_EXT_PPR_OPTION_DT_CRC_QUICK:
1966 case MSG_EXT_PPR_OPTION_DT_UNITS_QUICK:
1967 if(!(p->features & AHC_ULTRA3))
1968 {
1969 *options = 0;
1970 maxsync = MAX(maxsync, AHC_SYNCRATE_ULTRA2);
1971 }
1972 else
1973 {
1974 /*
1975 * we don't support the Quick Arbitration variants of dual edge
1976 * clocking. As it turns out, we want to send back the
1977 * same basic option, but without the QA attribute.
1978 * We know that we are responding because we would never set
1979 * these options ourself, we would only respond to them.
1980 */
1981 switch(*options)
1982 {
1983 case MSG_EXT_PPR_OPTION_DT_CRC_QUICK:
1984 *options = MSG_EXT_PPR_OPTION_DT_CRC;
1985 break;
1986 case MSG_EXT_PPR_OPTION_DT_UNITS_QUICK:
1987 *options = MSG_EXT_PPR_OPTION_DT_UNITS;
1988 break;
1989 }
1990 }
1991 break;
1992 default:
1993 *options = 0;
1994 maxsync = MAX(maxsync, AHC_SYNCRATE_ULTRA2);
1995 break;
1996 }
1997 syncrate = &aic7xxx_syncrates[maxsync];
1998 while ( (syncrate->rate[0] != NULL) &&
1999 (!(p->features & AHC_ULTRA2) || syncrate->sxfr_ultra2) )
2000 {
2001 if (*period <= syncrate->period)
2002 {
2003 switch(*options)
2004 {
2005 case MSG_EXT_PPR_OPTION_DT_CRC:
2006 case MSG_EXT_PPR_OPTION_DT_UNITS:
2007 if(!(syncrate->sxfr_ultra2 & AHC_SYNCRATE_CRC))
2008 {
2009 done = TRUE;
2010 /*
2011 * oops, we went too low for the CRC/DualEdge signalling, so
2012 * clear the options byte
2013 */
2014 *options = 0;
2015 /*
2016 * We'll be sending a reply to this packet to set the options
2017 * properly, so unilaterally set the period as well.
2018 */
2019 *period = syncrate->period;
2020 }
2021 else
2022 {
2023 done = TRUE;
2024 if(syncrate == &aic7xxx_syncrates[maxsync])
2025 {
2026 *period = syncrate->period;
2027 }
2028 }
2029 break;
2030 default:
2031 if(!(syncrate->sxfr_ultra2 & AHC_SYNCRATE_CRC))
2032 {
2033 done = TRUE;
2034 if(syncrate == &aic7xxx_syncrates[maxsync])
2035 {
2036 *period = syncrate->period;
2037 }
2038 }
2039 break;
2040 }
2041 if(done)
2042 {
2043 break;
2044 }
2045 }
2046 syncrate++;
2047 }
2048 if ( (*period == 0) || (syncrate->rate[0] == NULL) ||
2049 ((p->features & AHC_ULTRA2) && (syncrate->sxfr_ultra2 == 0)) )
2050 {
2051 /*
2052 * Use async transfers for this target
2053 */
2054 *options = 0;
2055 *period = 255;
2056 syncrate = NULL;
2057 }
2058 return (syncrate);
2059 }
2060
2061
2062 /*+F*************************************************************************
2063 * Function:
2064 * aic7xxx_find_period
2065 *
2066 * Description:
2067 * Look up the valid SCSIRATE to period conversion in our table
2068 *-F*************************************************************************/
2069 static unsigned int
aic7xxx_find_period(struct aic7xxx_host * p,unsigned int scsirate,unsigned int maxsync)2070 aic7xxx_find_period(struct aic7xxx_host *p, unsigned int scsirate,
2071 unsigned int maxsync)
2072 {
2073 struct aic7xxx_syncrate *syncrate;
2074
2075 if (p->features & AHC_ULTRA2)
2076 {
2077 scsirate &= SXFR_ULTRA2;
2078 }
2079 else
2080 {
2081 scsirate &= SXFR;
2082 }
2083
2084 syncrate = &aic7xxx_syncrates[maxsync];
2085 while (syncrate->rate[0] != NULL)
2086 {
2087 if (p->features & AHC_ULTRA2)
2088 {
2089 if (syncrate->sxfr_ultra2 == 0)
2090 break;
2091 else if (scsirate == syncrate->sxfr_ultra2)
2092 return (syncrate->period);
2093 else if (scsirate == (syncrate->sxfr_ultra2 & ~AHC_SYNCRATE_CRC))
2094 return (syncrate->period);
2095 }
2096 else if (scsirate == (syncrate->sxfr & ~ULTRA_SXFR))
2097 {
2098 return (syncrate->period);
2099 }
2100 syncrate++;
2101 }
2102 return (0); /* async */
2103 }
2104
2105 /*+F*************************************************************************
2106 * Function:
2107 * aic7xxx_validate_offset
2108 *
2109 * Description:
2110 * Set a valid offset value for a particular card in use and transfer
2111 * settings in use.
2112 *-F*************************************************************************/
2113 static void
aic7xxx_validate_offset(struct aic7xxx_host * p,struct aic7xxx_syncrate * syncrate,unsigned int * offset,int wide)2114 aic7xxx_validate_offset(struct aic7xxx_host *p,
2115 struct aic7xxx_syncrate *syncrate, unsigned int *offset, int wide)
2116 {
2117 unsigned int maxoffset;
2118
2119 /* Limit offset to what the card (and device) can do */
2120 if (syncrate == NULL)
2121 {
2122 maxoffset = 0;
2123 }
2124 else if (p->features & AHC_ULTRA2)
2125 {
2126 maxoffset = MAX_OFFSET_ULTRA2;
2127 }
2128 else
2129 {
2130 if (wide)
2131 maxoffset = MAX_OFFSET_16BIT;
2132 else
2133 maxoffset = MAX_OFFSET_8BIT;
2134 }
2135 *offset = MIN(*offset, maxoffset);
2136 }
2137
2138 /*+F*************************************************************************
2139 * Function:
2140 * aic7xxx_set_syncrate
2141 *
2142 * Description:
2143 * Set the actual syncrate down in the card and in our host structs
2144 *-F*************************************************************************/
2145 static void
aic7xxx_set_syncrate(struct aic7xxx_host * p,struct aic7xxx_syncrate * syncrate,int target,int channel,unsigned int period,unsigned int offset,unsigned char options,unsigned int type)2146 aic7xxx_set_syncrate(struct aic7xxx_host *p, struct aic7xxx_syncrate *syncrate,
2147 int target, int channel, unsigned int period, unsigned int offset,
2148 unsigned char options, unsigned int type)
2149 {
2150 unsigned char tindex;
2151 unsigned short target_mask;
2152 unsigned char lun, old_options;
2153 unsigned int old_period, old_offset;
2154
2155 tindex = target | (channel << 3);
2156 target_mask = 0x01 << tindex;
2157 lun = aic_inb(p, SCB_TCL) & 0x07;
2158
2159 if (syncrate == NULL)
2160 {
2161 period = 0;
2162 offset = 0;
2163 }
2164
2165 old_period = p->transinfo[tindex].cur_period;
2166 old_offset = p->transinfo[tindex].cur_offset;
2167 old_options = p->transinfo[tindex].cur_options;
2168
2169
2170 if (type & AHC_TRANS_CUR)
2171 {
2172 unsigned int scsirate;
2173
2174 scsirate = aic_inb(p, TARG_SCSIRATE + tindex);
2175 if (p->features & AHC_ULTRA2)
2176 {
2177 scsirate &= ~SXFR_ULTRA2;
2178 if (syncrate != NULL)
2179 {
2180 switch(options)
2181 {
2182 case MSG_EXT_PPR_OPTION_DT_UNITS:
2183 /*
2184 * mask off the CRC bit in the xfer settings
2185 */
2186 scsirate |= (syncrate->sxfr_ultra2 & ~AHC_SYNCRATE_CRC);
2187 break;
2188 default:
2189 scsirate |= syncrate->sxfr_ultra2;
2190 break;
2191 }
2192 }
2193 if (type & AHC_TRANS_ACTIVE)
2194 {
2195 aic_outb(p, offset, SCSIOFFSET);
2196 }
2197 aic_outb(p, offset, TARG_OFFSET + tindex);
2198 }
2199 else /* Not an Ultra2 controller */
2200 {
2201 scsirate &= ~(SXFR|SOFS);
2202 p->ultraenb &= ~target_mask;
2203 if (syncrate != NULL)
2204 {
2205 if (syncrate->sxfr & ULTRA_SXFR)
2206 {
2207 p->ultraenb |= target_mask;
2208 }
2209 scsirate |= (syncrate->sxfr & SXFR);
2210 scsirate |= (offset & SOFS);
2211 }
2212 if (type & AHC_TRANS_ACTIVE)
2213 {
2214 unsigned char sxfrctl0;
2215
2216 sxfrctl0 = aic_inb(p, SXFRCTL0);
2217 sxfrctl0 &= ~FAST20;
2218 if (p->ultraenb & target_mask)
2219 sxfrctl0 |= FAST20;
2220 aic_outb(p, sxfrctl0, SXFRCTL0);
2221 }
2222 aic_outb(p, p->ultraenb & 0xff, ULTRA_ENB);
2223 aic_outb(p, (p->ultraenb >> 8) & 0xff, ULTRA_ENB + 1 );
2224 }
2225 if (type & AHC_TRANS_ACTIVE)
2226 {
2227 aic_outb(p, scsirate, SCSIRATE);
2228 }
2229 aic_outb(p, scsirate, TARG_SCSIRATE + tindex);
2230 p->transinfo[tindex].cur_period = period;
2231 p->transinfo[tindex].cur_offset = offset;
2232 p->transinfo[tindex].cur_options = options;
2233 if ( !(type & AHC_TRANS_QUITE) &&
2234 (aic7xxx_verbose & VERBOSE_NEGOTIATION) &&
2235 (p->dev_flags[tindex] & DEVICE_PRINT_DTR) )
2236 {
2237 if (offset)
2238 {
2239 int rate_mod = (scsirate & WIDEXFER) ? 1 : 0;
2240
2241 printk(INFO_LEAD "Synchronous at %s Mbyte/sec, "
2242 "offset %d.\n", p->host_no, channel, target, lun,
2243 syncrate->rate[rate_mod], offset);
2244 }
2245 else
2246 {
2247 printk(INFO_LEAD "Using asynchronous transfers.\n",
2248 p->host_no, channel, target, lun);
2249 }
2250 p->dev_flags[tindex] &= ~DEVICE_PRINT_DTR;
2251 }
2252 }
2253
2254 if (type & AHC_TRANS_GOAL)
2255 {
2256 p->transinfo[tindex].goal_period = period;
2257 p->transinfo[tindex].goal_offset = offset;
2258 p->transinfo[tindex].goal_options = options;
2259 }
2260
2261 if (type & AHC_TRANS_USER)
2262 {
2263 p->transinfo[tindex].user_period = period;
2264 p->transinfo[tindex].user_offset = offset;
2265 p->transinfo[tindex].user_options = options;
2266 }
2267 }
2268
2269 /*+F*************************************************************************
2270 * Function:
2271 * aic7xxx_set_width
2272 *
2273 * Description:
2274 * Set the actual width down in the card and in our host structs
2275 *-F*************************************************************************/
2276 static void
aic7xxx_set_width(struct aic7xxx_host * p,int target,int channel,int lun,unsigned int width,unsigned int type)2277 aic7xxx_set_width(struct aic7xxx_host *p, int target, int channel, int lun,
2278 unsigned int width, unsigned int type)
2279 {
2280 unsigned char tindex;
2281 unsigned short target_mask;
2282 unsigned int old_width;
2283
2284 tindex = target | (channel << 3);
2285 target_mask = 1 << tindex;
2286
2287 old_width = p->transinfo[tindex].cur_width;
2288
2289 if (type & AHC_TRANS_CUR)
2290 {
2291 unsigned char scsirate;
2292
2293 scsirate = aic_inb(p, TARG_SCSIRATE + tindex);
2294
2295 scsirate &= ~WIDEXFER;
2296 if (width == MSG_EXT_WDTR_BUS_16_BIT)
2297 scsirate |= WIDEXFER;
2298
2299 aic_outb(p, scsirate, TARG_SCSIRATE + tindex);
2300
2301 if (type & AHC_TRANS_ACTIVE)
2302 aic_outb(p, scsirate, SCSIRATE);
2303
2304 p->transinfo[tindex].cur_width = width;
2305
2306 if ( !(type & AHC_TRANS_QUITE) &&
2307 (aic7xxx_verbose & VERBOSE_NEGOTIATION2) &&
2308 (p->dev_flags[tindex] & DEVICE_PRINT_DTR) )
2309 {
2310 printk(INFO_LEAD "Using %s transfers\n", p->host_no, channel, target,
2311 lun, (scsirate & WIDEXFER) ? "Wide(16bit)" : "Narrow(8bit)" );
2312 }
2313 }
2314
2315 if (type & AHC_TRANS_GOAL)
2316 p->transinfo[tindex].goal_width = width;
2317 if (type & AHC_TRANS_USER)
2318 p->transinfo[tindex].user_width = width;
2319
2320 if (p->transinfo[tindex].goal_offset)
2321 {
2322 if (p->features & AHC_ULTRA2)
2323 {
2324 p->transinfo[tindex].goal_offset = MAX_OFFSET_ULTRA2;
2325 }
2326 else if (width == MSG_EXT_WDTR_BUS_16_BIT)
2327 {
2328 p->transinfo[tindex].goal_offset = MAX_OFFSET_16BIT;
2329 }
2330 else
2331 {
2332 p->transinfo[tindex].goal_offset = MAX_OFFSET_8BIT;
2333 }
2334 }
2335 }
2336
2337 /*+F*************************************************************************
2338 * Function:
2339 * scbq_init
2340 *
2341 * Description:
2342 * SCB queue initialization.
2343 *
2344 *-F*************************************************************************/
2345 static void
scbq_init(volatile scb_queue_type * queue)2346 scbq_init(volatile scb_queue_type *queue)
2347 {
2348 queue->head = NULL;
2349 queue->tail = NULL;
2350 }
2351
2352 /*+F*************************************************************************
2353 * Function:
2354 * scbq_insert_head
2355 *
2356 * Description:
2357 * Add an SCB to the head of the list.
2358 *
2359 *-F*************************************************************************/
2360 static inline void
scbq_insert_head(volatile scb_queue_type * queue,struct aic7xxx_scb * scb)2361 scbq_insert_head(volatile scb_queue_type *queue, struct aic7xxx_scb *scb)
2362 {
2363 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,1,95)
2364 unsigned long cpu_flags;
2365 #endif
2366
2367 DRIVER_LOCK
2368 scb->q_next = queue->head;
2369 queue->head = scb;
2370 if (queue->tail == NULL) /* If list was empty, update tail. */
2371 queue->tail = queue->head;
2372 DRIVER_UNLOCK
2373 }
2374
2375 /*+F*************************************************************************
2376 * Function:
2377 * scbq_remove_head
2378 *
2379 * Description:
2380 * Remove an SCB from the head of the list.
2381 *
2382 *-F*************************************************************************/
2383 static inline struct aic7xxx_scb *
scbq_remove_head(volatile scb_queue_type * queue)2384 scbq_remove_head(volatile scb_queue_type *queue)
2385 {
2386 struct aic7xxx_scb * scbp;
2387 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,1,95)
2388 unsigned long cpu_flags;
2389 #endif
2390
2391 DRIVER_LOCK
2392 scbp = queue->head;
2393 if (queue->head != NULL)
2394 queue->head = queue->head->q_next;
2395 if (queue->head == NULL) /* If list is now empty, update tail. */
2396 queue->tail = NULL;
2397 DRIVER_UNLOCK
2398 return(scbp);
2399 }
2400
2401 /*+F*************************************************************************
2402 * Function:
2403 * scbq_remove
2404 *
2405 * Description:
2406 * Removes an SCB from the list.
2407 *
2408 *-F*************************************************************************/
2409 static inline void
scbq_remove(volatile scb_queue_type * queue,struct aic7xxx_scb * scb)2410 scbq_remove(volatile scb_queue_type *queue, struct aic7xxx_scb *scb)
2411 {
2412 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,1,95)
2413 unsigned long cpu_flags;
2414 #endif
2415
2416 DRIVER_LOCK
2417 if (queue->head == scb)
2418 {
2419 /* At beginning of queue, remove from head. */
2420 scbq_remove_head(queue);
2421 }
2422 else
2423 {
2424 struct aic7xxx_scb *curscb = queue->head;
2425
2426 /*
2427 * Search until the next scb is the one we're looking for, or
2428 * we run out of queue.
2429 */
2430 while ((curscb != NULL) && (curscb->q_next != scb))
2431 {
2432 curscb = curscb->q_next;
2433 }
2434 if (curscb != NULL)
2435 {
2436 /* Found it. */
2437 curscb->q_next = scb->q_next;
2438 if (scb->q_next == NULL)
2439 {
2440 /* Update the tail when removing the tail. */
2441 queue->tail = curscb;
2442 }
2443 }
2444 }
2445 DRIVER_UNLOCK
2446 }
2447
2448 /*+F*************************************************************************
2449 * Function:
2450 * scbq_insert_tail
2451 *
2452 * Description:
2453 * Add an SCB at the tail of the list.
2454 *
2455 *-F*************************************************************************/
2456 static inline void
scbq_insert_tail(volatile scb_queue_type * queue,struct aic7xxx_scb * scb)2457 scbq_insert_tail(volatile scb_queue_type *queue, struct aic7xxx_scb *scb)
2458 {
2459 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,1,95)
2460 unsigned long cpu_flags;
2461 #endif
2462
2463 DRIVER_LOCK
2464 scb->q_next = NULL;
2465 if (queue->tail != NULL) /* Add the scb at the end of the list. */
2466 queue->tail->q_next = scb;
2467 queue->tail = scb; /* Update the tail. */
2468 if (queue->head == NULL) /* If list was empty, update head. */
2469 queue->head = queue->tail;
2470 DRIVER_UNLOCK
2471 }
2472
2473 /*+F*************************************************************************
2474 * Function:
2475 * aic7xxx_match_scb
2476 *
2477 * Description:
2478 * Checks to see if an scb matches the target/channel as specified.
2479 * If target is ALL_TARGETS (-1), then we're looking for any device
2480 * on the specified channel; this happens when a channel is going
2481 * to be reset and all devices on that channel must be aborted.
2482 *-F*************************************************************************/
2483 static int
aic7xxx_match_scb(struct aic7xxx_host * p,struct aic7xxx_scb * scb,int target,int channel,int lun,unsigned char tag)2484 aic7xxx_match_scb(struct aic7xxx_host *p, struct aic7xxx_scb *scb,
2485 int target, int channel, int lun, unsigned char tag)
2486 {
2487 int targ = (scb->hscb->target_channel_lun >> 4) & 0x0F;
2488 int chan = (scb->hscb->target_channel_lun >> 3) & 0x01;
2489 int slun = scb->hscb->target_channel_lun & 0x07;
2490 int match;
2491
2492 match = ((chan == channel) || (channel == ALL_CHANNELS));
2493 if (match != 0)
2494 match = ((targ == target) || (target == ALL_TARGETS));
2495 if (match != 0)
2496 match = ((lun == slun) || (lun == ALL_LUNS));
2497 if (match != 0)
2498 match = ((tag == scb->hscb->tag) || (tag == SCB_LIST_NULL));
2499
2500 return (match);
2501 }
2502
2503 /*+F*************************************************************************
2504 * Function:
2505 * aic7xxx_add_curscb_to_free_list
2506 *
2507 * Description:
2508 * Adds the current scb (in SCBPTR) to the list of free SCBs.
2509 *-F*************************************************************************/
2510 static void
aic7xxx_add_curscb_to_free_list(struct aic7xxx_host * p)2511 aic7xxx_add_curscb_to_free_list(struct aic7xxx_host *p)
2512 {
2513 /*
2514 * Invalidate the tag so that aic7xxx_find_scb doesn't think
2515 * it's active
2516 */
2517 aic_outb(p, SCB_LIST_NULL, SCB_TAG);
2518 aic_outb(p, 0, SCB_CONTROL);
2519
2520 aic_outb(p, aic_inb(p, FREE_SCBH), SCB_NEXT);
2521 aic_outb(p, aic_inb(p, SCBPTR), FREE_SCBH);
2522 }
2523
2524 /*+F*************************************************************************
2525 * Function:
2526 * aic7xxx_rem_scb_from_disc_list
2527 *
2528 * Description:
2529 * Removes the current SCB from the disconnected list and adds it
2530 * to the free list.
2531 *-F*************************************************************************/
2532 static unsigned char
aic7xxx_rem_scb_from_disc_list(struct aic7xxx_host * p,unsigned char scbptr,unsigned char prev)2533 aic7xxx_rem_scb_from_disc_list(struct aic7xxx_host *p, unsigned char scbptr,
2534 unsigned char prev)
2535 {
2536 unsigned char next;
2537
2538 aic_outb(p, scbptr, SCBPTR);
2539 next = aic_inb(p, SCB_NEXT);
2540 aic7xxx_add_curscb_to_free_list(p);
2541
2542 if (prev != SCB_LIST_NULL)
2543 {
2544 aic_outb(p, prev, SCBPTR);
2545 aic_outb(p, next, SCB_NEXT);
2546 }
2547 else
2548 {
2549 aic_outb(p, next, DISCONNECTED_SCBH);
2550 }
2551
2552 return next;
2553 }
2554
2555 /*+F*************************************************************************
2556 * Function:
2557 * aic7xxx_busy_target
2558 *
2559 * Description:
2560 * Set the specified target busy.
2561 *-F*************************************************************************/
2562 static inline void
aic7xxx_busy_target(struct aic7xxx_host * p,struct aic7xxx_scb * scb)2563 aic7xxx_busy_target(struct aic7xxx_host *p, struct aic7xxx_scb *scb)
2564 {
2565 p->untagged_scbs[scb->hscb->target_channel_lun] = scb->hscb->tag;
2566 }
2567
2568 /*+F*************************************************************************
2569 * Function:
2570 * aic7xxx_index_busy_target
2571 *
2572 * Description:
2573 * Returns the index of the busy target, and optionally sets the
2574 * target inactive.
2575 *-F*************************************************************************/
2576 static inline unsigned char
aic7xxx_index_busy_target(struct aic7xxx_host * p,unsigned char tcl,int unbusy)2577 aic7xxx_index_busy_target(struct aic7xxx_host *p, unsigned char tcl,
2578 int unbusy)
2579 {
2580 unsigned char busy_scbid;
2581
2582 busy_scbid = p->untagged_scbs[tcl];
2583 if (unbusy)
2584 {
2585 p->untagged_scbs[tcl] = SCB_LIST_NULL;
2586 }
2587 return (busy_scbid);
2588 }
2589
2590 /*+F*************************************************************************
2591 * Function:
2592 * aic7xxx_find_scb
2593 *
2594 * Description:
2595 * Look through the SCB array of the card and attempt to find the
2596 * hardware SCB that corresponds to the passed in SCB. Return
2597 * SCB_LIST_NULL if unsuccessful. This routine assumes that the
2598 * card is already paused.
2599 *-F*************************************************************************/
2600 static unsigned char
aic7xxx_find_scb(struct aic7xxx_host * p,struct aic7xxx_scb * scb)2601 aic7xxx_find_scb(struct aic7xxx_host *p, struct aic7xxx_scb *scb)
2602 {
2603 unsigned char saved_scbptr;
2604 unsigned char curindex;
2605
2606 saved_scbptr = aic_inb(p, SCBPTR);
2607 curindex = 0;
2608 for (curindex = 0; curindex < p->scb_data->maxhscbs; curindex++)
2609 {
2610 aic_outb(p, curindex, SCBPTR);
2611 if (aic_inb(p, SCB_TAG) == scb->hscb->tag)
2612 {
2613 break;
2614 }
2615 }
2616 aic_outb(p, saved_scbptr, SCBPTR);
2617 if (curindex >= p->scb_data->maxhscbs)
2618 {
2619 curindex = SCB_LIST_NULL;
2620 }
2621
2622 return (curindex);
2623 }
2624
2625 /*+F*************************************************************************
2626 * Function:
2627 * aic7xxx_allocate_scb
2628 *
2629 * Description:
2630 * Get an SCB from the free list or by allocating a new one.
2631 *-F*************************************************************************/
2632 static int
aic7xxx_allocate_scb(struct aic7xxx_host * p)2633 aic7xxx_allocate_scb(struct aic7xxx_host *p)
2634 {
2635 struct aic7xxx_scb *scbp = NULL;
2636 int scb_size = (sizeof (struct hw_scatterlist) * AIC7XXX_MAX_SG) + 12 + 6;
2637 int i;
2638 int step = PAGE_SIZE / 1024;
2639 unsigned long scb_count = 0;
2640 struct hw_scatterlist *hsgp;
2641 struct aic7xxx_scb *scb_ap;
2642 struct aic7xxx_scb_dma *scb_dma;
2643 unsigned char *bufs;
2644
2645 if (p->scb_data->numscbs < p->scb_data->maxscbs)
2646 {
2647 /*
2648 * Calculate the optimal number of SCBs to allocate.
2649 *
2650 * NOTE: This formula works because the sizeof(sg_array) is always
2651 * 1024. Therefore, scb_size * i would always be > PAGE_SIZE *
2652 * (i/step). The (i-1) allows the left hand side of the equation
2653 * to grow into the right hand side to a point of near perfect
2654 * efficiency since scb_size * (i -1) is growing slightly faster
2655 * than the right hand side. If the number of SG array elements
2656 * is changed, this function may not be near so efficient any more.
2657 *
2658 * Since the DMA'able buffers are now allocated in a seperate
2659 * chunk this algorithm has been modified to match. The '12'
2660 * and '6' factors in scb_size are for the DMA'able command byte
2661 * and sensebuffers respectively. -DaveM
2662 */
2663 for ( i=step;; i *= 2 )
2664 {
2665 if ( (scb_size * (i-1)) >= ( (PAGE_SIZE * (i/step)) - 64 ) )
2666 {
2667 i /= 2;
2668 break;
2669 }
2670 }
2671 scb_count = MIN( (i-1), p->scb_data->maxscbs - p->scb_data->numscbs);
2672 scb_ap = (struct aic7xxx_scb *)kmalloc(sizeof (struct aic7xxx_scb) * scb_count
2673 + sizeof(struct aic7xxx_scb_dma), GFP_ATOMIC);
2674 if (scb_ap == NULL)
2675 return(0);
2676 scb_dma = (struct aic7xxx_scb_dma *)&scb_ap[scb_count];
2677 hsgp = (struct hw_scatterlist *)
2678 pci_alloc_consistent(p->pdev, scb_size * scb_count,
2679 &scb_dma->dma_address);
2680 if (hsgp == NULL)
2681 {
2682 kfree(scb_ap);
2683 return(0);
2684 }
2685 bufs = (unsigned char *)&hsgp[scb_count * AIC7XXX_MAX_SG];
2686 #ifdef AIC7XXX_VERBOSE_DEBUGGING
2687 if (aic7xxx_verbose > 0xffff)
2688 {
2689 if (p->scb_data->numscbs == 0)
2690 printk(INFO_LEAD "Allocating initial %ld SCB structures.\n",
2691 p->host_no, -1, -1, -1, scb_count);
2692 else
2693 printk(INFO_LEAD "Allocating %ld additional SCB structures.\n",
2694 p->host_no, -1, -1, -1, scb_count);
2695 }
2696 #endif
2697 memset(scb_ap, 0, sizeof (struct aic7xxx_scb) * scb_count);
2698 scb_dma->dma_offset = (unsigned long)scb_dma->dma_address
2699 - (unsigned long)hsgp;
2700 scb_dma->dma_len = scb_size * scb_count;
2701 for (i=0; i < scb_count; i++)
2702 {
2703 scbp = &scb_ap[i];
2704 scbp->hscb = &p->scb_data->hscbs[p->scb_data->numscbs];
2705 scbp->sg_list = &hsgp[i * AIC7XXX_MAX_SG];
2706 scbp->sense_cmd = bufs;
2707 scbp->cmnd = bufs + 6;
2708 bufs += 12 + 6;
2709 scbp->scb_dma = scb_dma;
2710 memset(scbp->hscb, 0, sizeof(struct aic7xxx_hwscb));
2711 scbp->hscb->tag = p->scb_data->numscbs;
2712 /*
2713 * Place in the scb array; never is removed
2714 */
2715 p->scb_data->scb_array[p->scb_data->numscbs++] = scbp;
2716 scbq_insert_tail(&p->scb_data->free_scbs, scbp);
2717 }
2718 scbp->kmalloc_ptr = scb_ap;
2719 }
2720 return(scb_count);
2721 }
2722
2723 /*+F*************************************************************************
2724 * Function:
2725 * aic7xxx_queue_cmd_complete
2726 *
2727 * Description:
2728 * Due to race conditions present in the SCSI subsystem, it is easier
2729 * to queue completed commands, then call scsi_done() on them when
2730 * we're finished. This function queues the completed commands.
2731 *-F*************************************************************************/
2732 static void
aic7xxx_queue_cmd_complete(struct aic7xxx_host * p,Scsi_Cmnd * cmd)2733 aic7xxx_queue_cmd_complete(struct aic7xxx_host *p, Scsi_Cmnd *cmd)
2734 {
2735 cmd->host_scribble = (char *)p->completeq.head;
2736 p->completeq.head = cmd;
2737 }
2738
2739 /*+F*************************************************************************
2740 * Function:
2741 * aic7xxx_done_cmds_complete
2742 *
2743 * Description:
2744 * Process the completed command queue.
2745 *-F*************************************************************************/
2746 static void
aic7xxx_done_cmds_complete(struct aic7xxx_host * p)2747 aic7xxx_done_cmds_complete(struct aic7xxx_host *p)
2748 {
2749 Scsi_Cmnd *cmd;
2750 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,1,95)
2751 unsigned int cpu_flags = 0;
2752 #endif
2753
2754 DRIVER_LOCK
2755 while (p->completeq.head != NULL)
2756 {
2757 cmd = p->completeq.head;
2758 p->completeq.head = (Scsi_Cmnd *)cmd->host_scribble;
2759 cmd->host_scribble = NULL;
2760 cmd->scsi_done(cmd);
2761 }
2762 DRIVER_UNLOCK
2763 }
2764
2765 /*+F*************************************************************************
2766 * Function:
2767 * aic7xxx_free_scb
2768 *
2769 * Description:
2770 * Free the scb and insert into the free scb list.
2771 *-F*************************************************************************/
2772 static void
aic7xxx_free_scb(struct aic7xxx_host * p,struct aic7xxx_scb * scb)2773 aic7xxx_free_scb(struct aic7xxx_host *p, struct aic7xxx_scb *scb)
2774 {
2775
2776 scb->flags = SCB_FREE;
2777 scb->cmd = NULL;
2778 scb->sg_count = 0;
2779 scb->sg_length = 0;
2780 scb->tag_action = 0;
2781 scb->hscb->control = 0;
2782 scb->hscb->target_status = 0;
2783 scb->hscb->target_channel_lun = SCB_LIST_NULL;
2784
2785 scbq_insert_head(&p->scb_data->free_scbs, scb);
2786 }
2787
2788 /*+F*************************************************************************
2789 * Function:
2790 * aic7xxx_done
2791 *
2792 * Description:
2793 * Calls the higher level scsi done function and frees the scb.
2794 *-F*************************************************************************/
2795 static void
aic7xxx_done(struct aic7xxx_host * p,struct aic7xxx_scb * scb)2796 aic7xxx_done(struct aic7xxx_host *p, struct aic7xxx_scb *scb)
2797 {
2798 Scsi_Cmnd *cmd = scb->cmd;
2799 int tindex = TARGET_INDEX(cmd);
2800 struct aic7xxx_scb *scbp;
2801 unsigned char queue_depth;
2802
2803 if (cmd->use_sg > 1)
2804 {
2805 struct scatterlist *sg;
2806
2807 sg = (struct scatterlist *)cmd->request_buffer;
2808 pci_unmap_sg(p->pdev, sg, cmd->use_sg, scsi_to_pci_dma_dir(cmd->sc_data_direction));
2809 }
2810 else if (cmd->request_bufflen)
2811 pci_unmap_single(p->pdev, aic7xxx_mapping(cmd),
2812 cmd->request_bufflen,
2813 scsi_to_pci_dma_dir(cmd->sc_data_direction));
2814 if (scb->flags & SCB_SENSE)
2815 {
2816 pci_unmap_single(p->pdev,
2817 le32_to_cpu(scb->sg_list[0].address),
2818 sizeof(cmd->sense_buffer),
2819 PCI_DMA_FROMDEVICE);
2820 }
2821 if (scb->flags & SCB_RECOVERY_SCB)
2822 {
2823 p->flags &= ~AHC_ABORT_PENDING;
2824 }
2825 if (scb->flags & (SCB_RESET|SCB_ABORT))
2826 {
2827 cmd->result |= (DID_RESET << 16);
2828 }
2829
2830 if (!(p->dev_flags[tindex] & DEVICE_PRESENT))
2831 {
2832 if ( (cmd->cmnd[0] == INQUIRY) && (cmd->result == DID_OK) )
2833 {
2834
2835 p->dev_flags[tindex] |= DEVICE_PRESENT;
2836 #define WIDE_INQUIRY_BITS 0x60
2837 #define SYNC_INQUIRY_BITS 0x10
2838 #define SCSI_VERSION_BITS 0x07
2839 #define SCSI_DT_BIT 0x04
2840 if(!(p->dev_flags[tindex] & DEVICE_DTR_SCANNED)) {
2841 char *buffer;
2842
2843 if(cmd->use_sg)
2844 {
2845 struct scatterlist *sg;
2846
2847 sg = (struct scatterlist *)cmd->request_buffer;
2848 buffer = (char *)sg[0].address;
2849 }
2850 else
2851 {
2852 buffer = (char *)cmd->request_buffer;
2853 }
2854
2855
2856 if ( (buffer[7] & WIDE_INQUIRY_BITS) &&
2857 (p->features & AHC_WIDE) )
2858 {
2859 p->needwdtr |= (1<<tindex);
2860 p->needwdtr_copy |= (1<<tindex);
2861 p->transinfo[tindex].goal_width = p->transinfo[tindex].user_width;
2862 }
2863 else
2864 {
2865 p->needwdtr &= ~(1<<tindex);
2866 p->needwdtr_copy &= ~(1<<tindex);
2867 pause_sequencer(p);
2868 aic7xxx_set_width(p, cmd->target, cmd->channel, cmd->lun,
2869 MSG_EXT_WDTR_BUS_8_BIT, (AHC_TRANS_ACTIVE |
2870 AHC_TRANS_GOAL |
2871 AHC_TRANS_CUR) );
2872 unpause_sequencer(p, FALSE);
2873 }
2874 if ( (buffer[7] & SYNC_INQUIRY_BITS) &&
2875 p->transinfo[tindex].user_offset )
2876 {
2877 p->transinfo[tindex].goal_period = p->transinfo[tindex].user_period;
2878 p->transinfo[tindex].goal_options = p->transinfo[tindex].user_options;
2879 if (p->features & AHC_ULTRA2)
2880 p->transinfo[tindex].goal_offset = MAX_OFFSET_ULTRA2;
2881 else if (p->transinfo[tindex].goal_width == MSG_EXT_WDTR_BUS_16_BIT)
2882 p->transinfo[tindex].goal_offset = MAX_OFFSET_16BIT;
2883 else
2884 p->transinfo[tindex].goal_offset = MAX_OFFSET_8BIT;
2885 if ( (((buffer[2] & SCSI_VERSION_BITS) >= 3) ||
2886 (buffer[56] & SCSI_DT_BIT) ||
2887 (p->dev_flags[tindex] & DEVICE_SCSI_3) ) &&
2888 (p->transinfo[tindex].user_period <= 9) &&
2889 (p->transinfo[tindex].user_options) )
2890 {
2891 p->needppr |= (1<<tindex);
2892 p->needppr_copy |= (1<<tindex);
2893 p->needsdtr &= ~(1<<tindex);
2894 p->needsdtr_copy &= ~(1<<tindex);
2895 p->needwdtr &= ~(1<<tindex);
2896 p->needwdtr_copy &= ~(1<<tindex);
2897 p->dev_flags[tindex] |= DEVICE_SCSI_3;
2898 }
2899 else
2900 {
2901 p->needsdtr |= (1<<tindex);
2902 p->needsdtr_copy |= (1<<tindex);
2903 p->transinfo[tindex].goal_period =
2904 MAX(10, p->transinfo[tindex].goal_period);
2905 p->transinfo[tindex].goal_options = 0;
2906 }
2907 }
2908 else
2909 {
2910 p->needsdtr &= ~(1<<tindex);
2911 p->needsdtr_copy &= ~(1<<tindex);
2912 p->transinfo[tindex].goal_period = 255;
2913 p->transinfo[tindex].goal_offset = 0;
2914 p->transinfo[tindex].goal_options = 0;
2915 }
2916 p->dev_flags[tindex] |= DEVICE_DTR_SCANNED;
2917 p->dev_flags[tindex] |= DEVICE_PRINT_DTR;
2918 }
2919 #undef WIDE_INQUIRY_BITS
2920 #undef SYNC_INQUIRY_BITS
2921 #undef SCSI_VERSION_BITS
2922 #undef SCSI_DT_BIT
2923 }
2924 }
2925
2926 if ((scb->flags & SCB_MSGOUT_BITS) != 0)
2927 {
2928 unsigned short mask;
2929 int message_error = FALSE;
2930
2931 mask = 0x01 << tindex;
2932
2933 /*
2934 * Check to see if we get an invalid message or a message error
2935 * after failing to negotiate a wide or sync transfer message.
2936 */
2937 if ((scb->flags & SCB_SENSE) &&
2938 ((scb->cmd->sense_buffer[12] == 0x43) || /* INVALID_MESSAGE */
2939 (scb->cmd->sense_buffer[12] == 0x49))) /* MESSAGE_ERROR */
2940 {
2941 message_error = TRUE;
2942 }
2943
2944 if (scb->flags & SCB_MSGOUT_WDTR)
2945 {
2946 if (message_error)
2947 {
2948 if ( (aic7xxx_verbose & VERBOSE_NEGOTIATION2) &&
2949 (p->dev_flags[tindex] & DEVICE_PRINT_DTR) )
2950 {
2951 printk(INFO_LEAD "Device failed to complete Wide Negotiation "
2952 "processing and\n", p->host_no, CTL_OF_SCB(scb));
2953 printk(INFO_LEAD "returned a sense error code for invalid message, "
2954 "disabling future\n", p->host_no, CTL_OF_SCB(scb));
2955 printk(INFO_LEAD "Wide negotiation to this device.\n", p->host_no,
2956 CTL_OF_SCB(scb));
2957 }
2958 p->needwdtr &= ~mask;
2959 p->needwdtr_copy &= ~mask;
2960 }
2961 }
2962 if (scb->flags & SCB_MSGOUT_SDTR)
2963 {
2964 if (message_error)
2965 {
2966 if ( (aic7xxx_verbose & VERBOSE_NEGOTIATION2) &&
2967 (p->dev_flags[tindex] & DEVICE_PRINT_DTR) )
2968 {
2969 printk(INFO_LEAD "Device failed to complete Sync Negotiation "
2970 "processing and\n", p->host_no, CTL_OF_SCB(scb));
2971 printk(INFO_LEAD "returned a sense error code for invalid message, "
2972 "disabling future\n", p->host_no, CTL_OF_SCB(scb));
2973 printk(INFO_LEAD "Sync negotiation to this device.\n", p->host_no,
2974 CTL_OF_SCB(scb));
2975 p->dev_flags[tindex] &= ~DEVICE_PRINT_DTR;
2976 }
2977 p->needsdtr &= ~mask;
2978 p->needsdtr_copy &= ~mask;
2979 }
2980 }
2981 if (scb->flags & SCB_MSGOUT_PPR)
2982 {
2983 if(message_error)
2984 {
2985 if ( (aic7xxx_verbose & VERBOSE_NEGOTIATION2) &&
2986 (p->dev_flags[tindex] & DEVICE_PRINT_DTR) )
2987 {
2988 printk(INFO_LEAD "Device failed to complete Parallel Protocol "
2989 "Request processing and\n", p->host_no, CTL_OF_SCB(scb));
2990 printk(INFO_LEAD "returned a sense error code for invalid message, "
2991 "disabling future\n", p->host_no, CTL_OF_SCB(scb));
2992 printk(INFO_LEAD "Parallel Protocol Request negotiation to this "
2993 "device.\n", p->host_no, CTL_OF_SCB(scb));
2994 }
2995 /*
2996 * Disable PPR negotiation and revert back to WDTR and SDTR setup
2997 */
2998 p->needppr &= ~mask;
2999 p->needppr_copy &= ~mask;
3000 p->needsdtr |= mask;
3001 p->needsdtr_copy |= mask;
3002 p->needwdtr |= mask;
3003 p->needwdtr_copy |= mask;
3004 }
3005 }
3006 }
3007
3008 queue_depth = p->dev_temp_queue_depth[tindex];
3009 if (queue_depth >= p->dev_active_cmds[tindex])
3010 {
3011 scbp = scbq_remove_head(&p->delayed_scbs[tindex]);
3012 if (scbp)
3013 {
3014 if (queue_depth == 1)
3015 {
3016 /*
3017 * Give extra preference to untagged devices, such as CD-R devices
3018 * This makes it more likely that a drive *won't* stuff up while
3019 * waiting on data at a critical time, such as CD-R writing and
3020 * audio CD ripping operations. Should also benefit tape drives.
3021 */
3022 scbq_insert_head(&p->waiting_scbs, scbp);
3023 }
3024 else
3025 {
3026 scbq_insert_tail(&p->waiting_scbs, scbp);
3027 }
3028 #ifdef AIC7XXX_VERBOSE_DEBUGGING
3029 if (aic7xxx_verbose > 0xffff)
3030 printk(INFO_LEAD "Moving SCB from delayed to waiting queue.\n",
3031 p->host_no, CTL_OF_SCB(scbp));
3032 #endif
3033 if (queue_depth > p->dev_active_cmds[tindex])
3034 {
3035 scbp = scbq_remove_head(&p->delayed_scbs[tindex]);
3036 if (scbp)
3037 scbq_insert_tail(&p->waiting_scbs, scbp);
3038 }
3039 }
3040 }
3041 if (!(scb->tag_action))
3042 {
3043 aic7xxx_index_busy_target(p, scb->hscb->target_channel_lun,
3044 /* unbusy */ TRUE);
3045 if (p->tagenable & (1<<tindex))
3046 {
3047 p->dev_temp_queue_depth[tindex] = p->dev_max_queue_depth[tindex];
3048 }
3049 }
3050 if(scb->flags & SCB_DTR_SCB)
3051 {
3052 p->dtr_pending &= ~(1 << tindex);
3053 }
3054 p->dev_active_cmds[tindex]--;
3055 p->activescbs--;
3056
3057 {
3058 int actual;
3059
3060 /*
3061 * XXX: we should actually know how much actually transferred
3062 * XXX: for each command, but apparently that's too difficult.
3063 *
3064 * We set a lower limit of 512 bytes on the transfer length. We
3065 * ignore anything less than this because we don't have a real
3066 * reason to count it. Read/Writes to tapes are usually about 20K
3067 * and disks are a minimum of 512 bytes unless you want to count
3068 * non-read/write commands (such as TEST_UNIT_READY) which we don't
3069 */
3070 actual = scb->sg_length;
3071 if ((actual >= 512) && (((cmd->result >> 16) & 0xf) == DID_OK))
3072 {
3073 struct aic7xxx_xferstats *sp;
3074 #ifdef AIC7XXX_PROC_STATS
3075 long *ptr;
3076 int x;
3077 #endif /* AIC7XXX_PROC_STATS */
3078
3079 sp = &p->stats[TARGET_INDEX(cmd)];
3080
3081 /*
3082 * For block devices, cmd->request.cmd is always == either READ or
3083 * WRITE. For character devices, this isn't always set properly, so
3084 * we check data_cmnd[0]. This catches the conditions for st.c, but
3085 * I'm still not sure if request.cmd is valid for sg devices.
3086 */
3087 if ( (cmd->request.cmd == WRITE) || (cmd->data_cmnd[0] == WRITE_6) ||
3088 (cmd->data_cmnd[0] == WRITE_FILEMARKS) )
3089 {
3090 sp->w_total++;
3091 #ifdef AIC7XXX_VERBOSE_DEBUGGING
3092 if ( (sp->w_total > 16) && (aic7xxx_verbose > 0xffff) )
3093 aic7xxx_verbose &= 0xffff;
3094 #endif
3095 #ifdef AIC7XXX_PROC_STATS
3096 ptr = sp->w_bins;
3097 #endif /* AIC7XXX_PROC_STATS */
3098 }
3099 else
3100 {
3101 sp->r_total++;
3102 #ifdef AIC7XXX_VERBOSE_DEBUGGING
3103 if ( (sp->r_total > 16) && (aic7xxx_verbose > 0xffff) )
3104 aic7xxx_verbose &= 0xffff;
3105 #endif
3106 #ifdef AIC7XXX_PROC_STATS
3107 ptr = sp->r_bins;
3108 #endif /* AIC7XXX_PROC_STATS */
3109 }
3110 #ifdef AIC7XXX_PROC_STATS
3111 x = -11;
3112 while(actual)
3113 {
3114 actual >>= 1;
3115 x++;
3116 }
3117 if (x < 0)
3118 {
3119 ptr[0]++;
3120 }
3121 else if (x > 7)
3122 {
3123 ptr[7]++;
3124 }
3125 else
3126 {
3127 ptr[x]++;
3128 }
3129 #endif /* AIC7XXX_PROC_STATS */
3130 }
3131 }
3132 aic7xxx_free_scb(p, scb);
3133 aic7xxx_queue_cmd_complete(p, cmd);
3134
3135 }
3136
3137 /*+F*************************************************************************
3138 * Function:
3139 * aic7xxx_run_done_queue
3140 *
3141 * Description:
3142 * Calls the aic7xxx_done() for the Scsi_Cmnd of each scb in the
3143 * aborted list, and adds each scb to the free list. If complete
3144 * is TRUE, we also process the commands complete list.
3145 *-F*************************************************************************/
3146 static void
aic7xxx_run_done_queue(struct aic7xxx_host * p,int complete)3147 aic7xxx_run_done_queue(struct aic7xxx_host *p, /*complete*/ int complete)
3148 {
3149 struct aic7xxx_scb *scb;
3150 int i, found = 0;
3151
3152 for (i = 0; i < p->scb_data->numscbs; i++)
3153 {
3154 scb = p->scb_data->scb_array[i];
3155 if (scb->flags & SCB_QUEUED_FOR_DONE)
3156 {
3157 if (aic7xxx_verbose & (VERBOSE_ABORT_PROCESS | VERBOSE_RESET_PROCESS))
3158 printk(INFO_LEAD "Aborting scb %d\n",
3159 p->host_no, CTL_OF_SCB(scb), scb->hscb->tag);
3160 found++;
3161 /*
3162 * Clear any residual information since the normal aic7xxx_done() path
3163 * doesn't touch the residuals.
3164 */
3165 scb->hscb->residual_SG_segment_count = 0;
3166 scb->hscb->residual_data_count[0] = 0;
3167 scb->hscb->residual_data_count[1] = 0;
3168 scb->hscb->residual_data_count[2] = 0;
3169 aic7xxx_done(p, scb);
3170 }
3171 }
3172 if (aic7xxx_verbose & (VERBOSE_ABORT_RETURN | VERBOSE_RESET_RETURN))
3173 {
3174 printk(INFO_LEAD "%d commands found and queued for "
3175 "completion.\n", p->host_no, -1, -1, -1, found);
3176 }
3177 if (complete)
3178 {
3179 aic7xxx_done_cmds_complete(p);
3180 }
3181 }
3182
3183 /*+F*************************************************************************
3184 * Function:
3185 * aic7xxx_abort_waiting_scb
3186 *
3187 * Description:
3188 * Manipulate the waiting for selection list and return the
3189 * scb that follows the one that we remove.
3190 *-F*************************************************************************/
3191 static unsigned char
aic7xxx_abort_waiting_scb(struct aic7xxx_host * p,struct aic7xxx_scb * scb,unsigned char scbpos,unsigned char prev)3192 aic7xxx_abort_waiting_scb(struct aic7xxx_host *p, struct aic7xxx_scb *scb,
3193 unsigned char scbpos, unsigned char prev)
3194 {
3195 unsigned char curscb, next;
3196
3197 /*
3198 * Select the SCB we want to abort and pull the next pointer out of it.
3199 */
3200 curscb = aic_inb(p, SCBPTR);
3201 aic_outb(p, scbpos, SCBPTR);
3202 next = aic_inb(p, SCB_NEXT);
3203
3204 aic7xxx_add_curscb_to_free_list(p);
3205
3206 /*
3207 * Update the waiting list
3208 */
3209 if (prev == SCB_LIST_NULL)
3210 {
3211 /*
3212 * First in the list
3213 */
3214 aic_outb(p, next, WAITING_SCBH);
3215 }
3216 else
3217 {
3218 /*
3219 * Select the scb that pointed to us and update its next pointer.
3220 */
3221 aic_outb(p, prev, SCBPTR);
3222 aic_outb(p, next, SCB_NEXT);
3223 }
3224 /*
3225 * Point us back at the original scb position and inform the SCSI
3226 * system that the command has been aborted.
3227 */
3228 aic_outb(p, curscb, SCBPTR);
3229 return (next);
3230 }
3231
3232 /*+F*************************************************************************
3233 * Function:
3234 * aic7xxx_search_qinfifo
3235 *
3236 * Description:
3237 * Search the queue-in FIFO for matching SCBs and conditionally
3238 * requeue. Returns the number of matching SCBs.
3239 *-F*************************************************************************/
3240 static int
aic7xxx_search_qinfifo(struct aic7xxx_host * p,int target,int channel,int lun,unsigned char tag,int flags,int requeue,volatile scb_queue_type * queue)3241 aic7xxx_search_qinfifo(struct aic7xxx_host *p, int target, int channel,
3242 int lun, unsigned char tag, int flags, int requeue,
3243 volatile scb_queue_type *queue)
3244 {
3245 int found;
3246 unsigned char qinpos, qintail;
3247 struct aic7xxx_scb *scbp;
3248
3249 found = 0;
3250 qinpos = aic_inb(p, QINPOS);
3251 qintail = p->qinfifonext;
3252
3253 p->qinfifonext = qinpos;
3254
3255 while (qinpos != qintail)
3256 {
3257 scbp = p->scb_data->scb_array[p->qinfifo[qinpos++]];
3258 if (aic7xxx_match_scb(p, scbp, target, channel, lun, tag))
3259 {
3260 /*
3261 * We found an scb that needs to be removed.
3262 */
3263 if (requeue && (queue != NULL))
3264 {
3265 if (scbp->flags & SCB_WAITINGQ)
3266 {
3267 scbq_remove(queue, scbp);
3268 scbq_remove(&p->waiting_scbs, scbp);
3269 scbq_remove(&p->delayed_scbs[TARGET_INDEX(scbp->cmd)], scbp);
3270 p->dev_active_cmds[TARGET_INDEX(scbp->cmd)]++;
3271 p->activescbs++;
3272 }
3273 scbq_insert_tail(queue, scbp);
3274 p->dev_active_cmds[TARGET_INDEX(scbp->cmd)]--;
3275 p->activescbs--;
3276 scbp->flags |= SCB_WAITINGQ;
3277 if ( !(scbp->tag_action & TAG_ENB) )
3278 {
3279 aic7xxx_index_busy_target(p, scbp->hscb->target_channel_lun,
3280 TRUE);
3281 }
3282 }
3283 else if (requeue)
3284 {
3285 p->qinfifo[p->qinfifonext++] = scbp->hscb->tag;
3286 }
3287 else
3288 {
3289 /*
3290 * Preserve any SCB_RECOVERY_SCB flags on this scb then set the
3291 * flags we were called with, presumeably so aic7xxx_run_done_queue
3292 * can find this scb
3293 */
3294 scbp->flags = flags | (scbp->flags & SCB_RECOVERY_SCB);
3295 if (aic7xxx_index_busy_target(p, scbp->hscb->target_channel_lun,
3296 FALSE) == scbp->hscb->tag)
3297 {
3298 aic7xxx_index_busy_target(p, scbp->hscb->target_channel_lun,
3299 TRUE);
3300 }
3301 }
3302 found++;
3303 }
3304 else
3305 {
3306 p->qinfifo[p->qinfifonext++] = scbp->hscb->tag;
3307 }
3308 }
3309 /*
3310 * Now that we've done the work, clear out any left over commands in the
3311 * qinfifo and update the KERNEL_QINPOS down on the card.
3312 *
3313 * NOTE: This routine expect the sequencer to already be paused when
3314 * it is run....make sure it's that way!
3315 */
3316 qinpos = p->qinfifonext;
3317 while(qinpos != qintail)
3318 {
3319 p->qinfifo[qinpos++] = SCB_LIST_NULL;
3320 }
3321 if (p->features & AHC_QUEUE_REGS)
3322 aic_outb(p, p->qinfifonext, HNSCB_QOFF);
3323 else
3324 aic_outb(p, p->qinfifonext, KERNEL_QINPOS);
3325
3326 return (found);
3327 }
3328
3329 /*+F*************************************************************************
3330 * Function:
3331 * aic7xxx_scb_on_qoutfifo
3332 *
3333 * Description:
3334 * Is the scb that was passed to us currently on the qoutfifo?
3335 *-F*************************************************************************/
3336 static int
aic7xxx_scb_on_qoutfifo(struct aic7xxx_host * p,struct aic7xxx_scb * scb)3337 aic7xxx_scb_on_qoutfifo(struct aic7xxx_host *p, struct aic7xxx_scb *scb)
3338 {
3339 int i=0;
3340
3341 while(p->qoutfifo[(p->qoutfifonext + i) & 0xff ] != SCB_LIST_NULL)
3342 {
3343 if(p->qoutfifo[(p->qoutfifonext + i) & 0xff ] == scb->hscb->tag)
3344 return TRUE;
3345 else
3346 i++;
3347 }
3348 return FALSE;
3349 }
3350
3351
3352 /*+F*************************************************************************
3353 * Function:
3354 * aic7xxx_reset_device
3355 *
3356 * Description:
3357 * The device at the given target/channel has been reset. Abort
3358 * all active and queued scbs for that target/channel. This function
3359 * need not worry about linked next pointers because if was a MSG_ABORT_TAG
3360 * then we had a tagged command (no linked next), if it was MSG_ABORT or
3361 * MSG_BUS_DEV_RESET then the device won't know about any commands any more
3362 * and no busy commands will exist, and if it was a bus reset, then nothing
3363 * knows about any linked next commands any more. In all cases, we don't
3364 * need to worry about the linked next or busy scb, we just need to clear
3365 * them.
3366 *-F*************************************************************************/
3367 static void
aic7xxx_reset_device(struct aic7xxx_host * p,int target,int channel,int lun,unsigned char tag)3368 aic7xxx_reset_device(struct aic7xxx_host *p, int target, int channel,
3369 int lun, unsigned char tag)
3370 {
3371 struct aic7xxx_scb *scbp;
3372 unsigned char active_scb, tcl;
3373 int i = 0, j, init_lists = FALSE;
3374
3375 /*
3376 * Restore this when we're done
3377 */
3378 active_scb = aic_inb(p, SCBPTR);
3379
3380 if (aic7xxx_verbose & (VERBOSE_RESET_PROCESS | VERBOSE_ABORT_PROCESS))
3381 {
3382 printk(INFO_LEAD "Reset device, active_scb %d\n",
3383 p->host_no, channel, target, lun, active_scb);
3384 printk(INFO_LEAD "Current scb_tag %d, SEQADDR 0x%x, LASTPHASE "
3385 "0x%x\n",
3386 p->host_no, channel, target, lun, aic_inb(p, SCB_TAG),
3387 aic_inb(p, SEQADDR0) | (aic_inb(p, SEQADDR1) << 8),
3388 aic_inb(p, LASTPHASE));
3389 printk(INFO_LEAD "SG_CACHEPTR 0x%x, SG_COUNT %d, SCSISIGI 0x%x\n",
3390 p->host_no, channel, target, lun,
3391 (p->features & AHC_ULTRA2) ? aic_inb(p, SG_CACHEPTR) : 0,
3392 aic_inb(p, SG_COUNT), aic_inb(p, SCSISIGI));
3393 printk(INFO_LEAD "SSTAT0 0x%x, SSTAT1 0x%x, SSTAT2 0x%x\n",
3394 p->host_no, channel, target, lun, aic_inb(p, SSTAT0),
3395 aic_inb(p, SSTAT1), aic_inb(p, SSTAT2));
3396 }
3397 /*
3398 * Deal with the busy target and linked next issues.
3399 */
3400 {
3401 int min_target, max_target;
3402 struct aic7xxx_scb *scbp, *prev_scbp;
3403
3404 /* Make all targets 'relative' to bus A. */
3405 if (target == ALL_TARGETS)
3406 {
3407 switch (channel)
3408 {
3409 case 0:
3410 min_target = 0;
3411 max_target = (p->features & AHC_WIDE) ? 15 : 7;
3412 break;
3413 case 1:
3414 min_target = 8;
3415 max_target = 15;
3416 break;
3417 case ALL_CHANNELS:
3418 default:
3419 min_target = 0;
3420 max_target = (p->features & (AHC_TWIN|AHC_WIDE)) ? 15 : 7;
3421 break;
3422 }
3423 }
3424 else
3425 {
3426 min_target = target | (channel << 3);
3427 max_target = min_target;
3428 }
3429
3430
3431 for (i = min_target; i <= max_target; i++)
3432 {
3433 if ( i == p->scsi_id )
3434 {
3435 continue;
3436 }
3437 if (aic7xxx_verbose & (VERBOSE_ABORT_PROCESS | VERBOSE_RESET_PROCESS))
3438 printk(INFO_LEAD "Cleaning up status information "
3439 "and delayed_scbs.\n", p->host_no, channel, i, lun);
3440 p->dev_flags[i] &= ~BUS_DEVICE_RESET_PENDING;
3441 if ( tag == SCB_LIST_NULL )
3442 {
3443 p->dev_flags[i] |= DEVICE_PRINT_DTR | DEVICE_RESET_DELAY;
3444 p->dev_expires[i] = jiffies + (1 * HZ);
3445 p->dev_timer_active |= (0x01 << i);
3446 p->dev_last_queue_full_count[i] = 0;
3447 p->dev_last_queue_full[i] = 0;
3448 p->dev_temp_queue_depth[i] =
3449 p->dev_max_queue_depth[i];
3450 }
3451 for(j=0; j<MAX_LUNS; j++)
3452 {
3453 if (channel == 1)
3454 tcl = ((i << 4) & 0x70) | (channel << 3) | j;
3455 else
3456 tcl = (i << 4) | (channel << 3) | j;
3457 if ( (aic7xxx_index_busy_target(p, tcl, FALSE) == tag) ||
3458 (tag == SCB_LIST_NULL) )
3459 aic7xxx_index_busy_target(p, tcl, /* unbusy */ TRUE);
3460 }
3461 j = 0;
3462 prev_scbp = NULL;
3463 scbp = p->delayed_scbs[i].head;
3464 while ( (scbp != NULL) && (j++ <= (p->scb_data->numscbs + 1)) )
3465 {
3466 prev_scbp = scbp;
3467 scbp = scbp->q_next;
3468 if ( prev_scbp == scbp )
3469 {
3470 if (aic7xxx_verbose & (VERBOSE_ABORT | VERBOSE_RESET))
3471 printk(WARN_LEAD "Yikes!! scb->q_next == scb "
3472 "in the delayed_scbs queue!\n", p->host_no, channel, i, lun);
3473 scbp = NULL;
3474 prev_scbp->q_next = NULL;
3475 p->delayed_scbs[i].tail = prev_scbp;
3476 }
3477 if (aic7xxx_match_scb(p, prev_scbp, target, channel, lun, tag))
3478 {
3479 scbq_remove(&p->delayed_scbs[i], prev_scbp);
3480 if (prev_scbp->flags & SCB_WAITINGQ)
3481 {
3482 p->dev_active_cmds[i]++;
3483 p->activescbs++;
3484 }
3485 prev_scbp->flags &= ~(SCB_ACTIVE | SCB_WAITINGQ);
3486 prev_scbp->flags |= SCB_RESET | SCB_QUEUED_FOR_DONE;
3487 }
3488 }
3489 if ( j > (p->scb_data->numscbs + 1) )
3490 {
3491 if (aic7xxx_verbose & (VERBOSE_ABORT | VERBOSE_RESET))
3492 printk(WARN_LEAD "Yikes!! There's a loop in the "
3493 "delayed_scbs queue!\n", p->host_no, channel, i, lun);
3494 scbq_init(&p->delayed_scbs[i]);
3495 }
3496 if ( !(p->dev_timer_active & (0x01 << MAX_TARGETS)) ||
3497 time_after_eq(p->dev_timer.expires, p->dev_expires[i]) )
3498 {
3499 mod_timer(&p->dev_timer, p->dev_expires[i]);
3500 p->dev_timer_active |= (0x01 << MAX_TARGETS);
3501 }
3502 }
3503 }
3504
3505 if (aic7xxx_verbose & (VERBOSE_ABORT_PROCESS | VERBOSE_RESET_PROCESS))
3506 printk(INFO_LEAD "Cleaning QINFIFO.\n", p->host_no, channel, target, lun );
3507 aic7xxx_search_qinfifo(p, target, channel, lun, tag,
3508 SCB_RESET | SCB_QUEUED_FOR_DONE, /* requeue */ FALSE, NULL);
3509
3510 /*
3511 * Search the waiting_scbs queue for matches, this catches any SCB_QUEUED
3512 * ABORT/RESET commands.
3513 */
3514 if (aic7xxx_verbose & (VERBOSE_ABORT_PROCESS | VERBOSE_RESET_PROCESS))
3515 printk(INFO_LEAD "Cleaning waiting_scbs.\n", p->host_no, channel,
3516 target, lun );
3517 {
3518 struct aic7xxx_scb *scbp, *prev_scbp;
3519
3520 j = 0;
3521 prev_scbp = NULL;
3522 scbp = p->waiting_scbs.head;
3523 while ( (scbp != NULL) && (j++ <= (p->scb_data->numscbs + 1)) )
3524 {
3525 prev_scbp = scbp;
3526 scbp = scbp->q_next;
3527 if ( prev_scbp == scbp )
3528 {
3529 if (aic7xxx_verbose & (VERBOSE_ABORT | VERBOSE_RESET))
3530 printk(WARN_LEAD "Yikes!! scb->q_next == scb "
3531 "in the waiting_scbs queue!\n", p->host_no, CTL_OF_SCB(scbp));
3532 scbp = NULL;
3533 prev_scbp->q_next = NULL;
3534 p->waiting_scbs.tail = prev_scbp;
3535 }
3536 if (aic7xxx_match_scb(p, prev_scbp, target, channel, lun, tag))
3537 {
3538 scbq_remove(&p->waiting_scbs, prev_scbp);
3539 if (prev_scbp->flags & SCB_WAITINGQ)
3540 {
3541 p->dev_active_cmds[TARGET_INDEX(prev_scbp->cmd)]++;
3542 p->activescbs++;
3543 }
3544 prev_scbp->flags &= ~(SCB_ACTIVE | SCB_WAITINGQ);
3545 prev_scbp->flags |= SCB_RESET | SCB_QUEUED_FOR_DONE;
3546 }
3547 }
3548 if ( j > (p->scb_data->numscbs + 1) )
3549 {
3550 if (aic7xxx_verbose & (VERBOSE_ABORT | VERBOSE_RESET))
3551 printk(WARN_LEAD "Yikes!! There's a loop in the "
3552 "waiting_scbs queue!\n", p->host_no, channel, target, lun);
3553 scbq_init(&p->waiting_scbs);
3554 }
3555 }
3556
3557
3558 /*
3559 * Search waiting for selection list.
3560 */
3561 if (aic7xxx_verbose & (VERBOSE_ABORT_PROCESS | VERBOSE_RESET_PROCESS))
3562 printk(INFO_LEAD "Cleaning waiting for selection "
3563 "list.\n", p->host_no, channel, target, lun);
3564 {
3565 unsigned char next, prev, scb_index;
3566
3567 next = aic_inb(p, WAITING_SCBH); /* Start at head of list. */
3568 prev = SCB_LIST_NULL;
3569 j = 0;
3570 while ( (next != SCB_LIST_NULL) && (j++ <= (p->scb_data->maxscbs + 1)) )
3571 {
3572 aic_outb(p, next, SCBPTR);
3573 scb_index = aic_inb(p, SCB_TAG);
3574 if (scb_index >= p->scb_data->numscbs)
3575 {
3576 /*
3577 * No aic7xxx_verbose check here.....we want to see this since it
3578 * means either the kernel driver or the sequencer screwed things up
3579 */
3580 printk(WARN_LEAD "Waiting List inconsistency; SCB index=%d, "
3581 "numscbs=%d\n", p->host_no, channel, target, lun, scb_index,
3582 p->scb_data->numscbs);
3583 next = aic_inb(p, SCB_NEXT);
3584 aic7xxx_add_curscb_to_free_list(p);
3585 }
3586 else
3587 {
3588 scbp = p->scb_data->scb_array[scb_index];
3589 if (aic7xxx_match_scb(p, scbp, target, channel, lun, tag))
3590 {
3591 next = aic7xxx_abort_waiting_scb(p, scbp, next, prev);
3592 if (scbp->flags & SCB_WAITINGQ)
3593 {
3594 p->dev_active_cmds[TARGET_INDEX(scbp->cmd)]++;
3595 p->activescbs++;
3596 }
3597 scbp->flags &= ~(SCB_ACTIVE | SCB_WAITINGQ);
3598 scbp->flags |= SCB_RESET | SCB_QUEUED_FOR_DONE;
3599 if (prev == SCB_LIST_NULL)
3600 {
3601 /*
3602 * This is either the first scb on the waiting list, or we
3603 * have already yanked the first and haven't left any behind.
3604 * Either way, we need to turn off the selection hardware if
3605 * it isn't already off.
3606 */
3607 aic_outb(p, aic_inb(p, SCSISEQ) & ~ENSELO, SCSISEQ);
3608 aic_outb(p, CLRSELTIMEO, CLRSINT1);
3609 }
3610 }
3611 else
3612 {
3613 prev = next;
3614 next = aic_inb(p, SCB_NEXT);
3615 }
3616 }
3617 }
3618 if ( j > (p->scb_data->maxscbs + 1) )
3619 {
3620 printk(WARN_LEAD "Yikes!! There is a loop in the waiting for "
3621 "selection list!\n", p->host_no, channel, target, lun);
3622 init_lists = TRUE;
3623 }
3624 }
3625
3626 /*
3627 * Go through disconnected list and remove any entries we have queued
3628 * for completion, zeroing their control byte too.
3629 */
3630 if (aic7xxx_verbose & (VERBOSE_ABORT_PROCESS | VERBOSE_RESET_PROCESS))
3631 printk(INFO_LEAD "Cleaning disconnected scbs "
3632 "list.\n", p->host_no, channel, target, lun);
3633 if (p->flags & AHC_PAGESCBS)
3634 {
3635 unsigned char next, prev, scb_index;
3636
3637 next = aic_inb(p, DISCONNECTED_SCBH);
3638 prev = SCB_LIST_NULL;
3639 j = 0;
3640 while ( (next != SCB_LIST_NULL) && (j++ <= (p->scb_data->maxscbs + 1)) )
3641 {
3642 aic_outb(p, next, SCBPTR);
3643 scb_index = aic_inb(p, SCB_TAG);
3644 if (scb_index > p->scb_data->numscbs)
3645 {
3646 printk(WARN_LEAD "Disconnected List inconsistency; SCB index=%d, "
3647 "numscbs=%d\n", p->host_no, channel, target, lun, scb_index,
3648 p->scb_data->numscbs);
3649 next = aic7xxx_rem_scb_from_disc_list(p, next, prev);
3650 }
3651 else
3652 {
3653 scbp = p->scb_data->scb_array[scb_index];
3654 if (aic7xxx_match_scb(p, scbp, target, channel, lun, tag))
3655 {
3656 next = aic7xxx_rem_scb_from_disc_list(p, next, prev);
3657 if (scbp->flags & SCB_WAITINGQ)
3658 {
3659 p->dev_active_cmds[TARGET_INDEX(scbp->cmd)]++;
3660 p->activescbs++;
3661 }
3662 scbp->flags &= ~(SCB_ACTIVE | SCB_WAITINGQ);
3663 scbp->flags |= SCB_RESET | SCB_QUEUED_FOR_DONE;
3664 scbp->hscb->control = 0;
3665 }
3666 else
3667 {
3668 prev = next;
3669 next = aic_inb(p, SCB_NEXT);
3670 }
3671 }
3672 }
3673 if ( j > (p->scb_data->maxscbs + 1) )
3674 {
3675 printk(WARN_LEAD "Yikes!! There is a loop in the disconnected list!\n",
3676 p->host_no, channel, target, lun);
3677 init_lists = TRUE;
3678 }
3679 }
3680
3681 /*
3682 * Walk the free list making sure no entries on the free list have
3683 * a valid SCB_TAG value or SCB_CONTROL byte.
3684 */
3685 if (p->flags & AHC_PAGESCBS)
3686 {
3687 unsigned char next;
3688
3689 j = 0;
3690 next = aic_inb(p, FREE_SCBH);
3691 if ( (next >= p->scb_data->maxhscbs) && (next != SCB_LIST_NULL) )
3692 {
3693 printk(WARN_LEAD "Bogus FREE_SCBH!.\n", p->host_no, channel,
3694 target, lun);
3695 init_lists = TRUE;
3696 next = SCB_LIST_NULL;
3697 }
3698 while ( (next != SCB_LIST_NULL) && (j++ <= (p->scb_data->maxscbs + 1)) )
3699 {
3700 aic_outb(p, next, SCBPTR);
3701 if (aic_inb(p, SCB_TAG) < p->scb_data->numscbs)
3702 {
3703 printk(WARN_LEAD "Free list inconsistency!.\n", p->host_no, channel,
3704 target, lun);
3705 init_lists = TRUE;
3706 next = SCB_LIST_NULL;
3707 }
3708 else
3709 {
3710 aic_outb(p, SCB_LIST_NULL, SCB_TAG);
3711 aic_outb(p, 0, SCB_CONTROL);
3712 next = aic_inb(p, SCB_NEXT);
3713 }
3714 }
3715 if ( j > (p->scb_data->maxscbs + 1) )
3716 {
3717 printk(WARN_LEAD "Yikes!! There is a loop in the free list!\n",
3718 p->host_no, channel, target, lun);
3719 init_lists = TRUE;
3720 }
3721 }
3722
3723 /*
3724 * Go through the hardware SCB array looking for commands that
3725 * were active but not on any list.
3726 */
3727 if (init_lists)
3728 {
3729 aic_outb(p, SCB_LIST_NULL, FREE_SCBH);
3730 aic_outb(p, SCB_LIST_NULL, WAITING_SCBH);
3731 aic_outb(p, SCB_LIST_NULL, DISCONNECTED_SCBH);
3732 }
3733 for (i = p->scb_data->maxhscbs - 1; i >= 0; i--)
3734 {
3735 unsigned char scbid;
3736
3737 aic_outb(p, i, SCBPTR);
3738 if (init_lists)
3739 {
3740 aic_outb(p, SCB_LIST_NULL, SCB_TAG);
3741 aic_outb(p, SCB_LIST_NULL, SCB_NEXT);
3742 aic_outb(p, 0, SCB_CONTROL);
3743 aic7xxx_add_curscb_to_free_list(p);
3744 }
3745 else
3746 {
3747 scbid = aic_inb(p, SCB_TAG);
3748 if (scbid < p->scb_data->numscbs)
3749 {
3750 scbp = p->scb_data->scb_array[scbid];
3751 if (aic7xxx_match_scb(p, scbp, target, channel, lun, tag))
3752 {
3753 aic_outb(p, 0, SCB_CONTROL);
3754 aic_outb(p, SCB_LIST_NULL, SCB_TAG);
3755 aic7xxx_add_curscb_to_free_list(p);
3756 }
3757 }
3758 }
3759 }
3760
3761 /*
3762 * Go through the entire SCB array now and look for commands for
3763 * for this target that are stillactive. These are other (most likely
3764 * tagged) commands that were disconnected when the reset occurred.
3765 * Any commands we find here we know this about, it wasn't on any queue,
3766 * it wasn't in the qinfifo, it wasn't in the disconnected or waiting
3767 * lists, so it really must have been a paged out SCB. In that case,
3768 * we shouldn't need to bother with updating any counters, just mark
3769 * the correct flags and go on.
3770 */
3771 for (i = 0; i < p->scb_data->numscbs; i++)
3772 {
3773 scbp = p->scb_data->scb_array[i];
3774 if ((scbp->flags & SCB_ACTIVE) &&
3775 aic7xxx_match_scb(p, scbp, target, channel, lun, tag) &&
3776 !aic7xxx_scb_on_qoutfifo(p, scbp))
3777 {
3778 if (scbp->flags & SCB_WAITINGQ)
3779 {
3780 scbq_remove(&p->waiting_scbs, scbp);
3781 scbq_remove(&p->delayed_scbs[TARGET_INDEX(scbp->cmd)], scbp);
3782 p->dev_active_cmds[TARGET_INDEX(scbp->cmd)]++;
3783 p->activescbs++;
3784 }
3785 scbp->flags |= SCB_RESET | SCB_QUEUED_FOR_DONE;
3786 scbp->flags &= ~(SCB_ACTIVE | SCB_WAITINGQ);
3787 }
3788 }
3789
3790 aic_outb(p, active_scb, SCBPTR);
3791 }
3792
3793
3794 /*+F*************************************************************************
3795 * Function:
3796 * aic7xxx_clear_intstat
3797 *
3798 * Description:
3799 * Clears the interrupt status.
3800 *-F*************************************************************************/
3801 static void
aic7xxx_clear_intstat(struct aic7xxx_host * p)3802 aic7xxx_clear_intstat(struct aic7xxx_host *p)
3803 {
3804 /* Clear any interrupt conditions this may have caused. */
3805 aic_outb(p, CLRSELDO | CLRSELDI | CLRSELINGO, CLRSINT0);
3806 aic_outb(p, CLRSELTIMEO | CLRATNO | CLRSCSIRSTI | CLRBUSFREE | CLRSCSIPERR |
3807 CLRPHASECHG | CLRREQINIT, CLRSINT1);
3808 aic_outb(p, CLRSCSIINT | CLRSEQINT | CLRBRKADRINT | CLRPARERR, CLRINT);
3809 }
3810
3811 /*+F*************************************************************************
3812 * Function:
3813 * aic7xxx_reset_current_bus
3814 *
3815 * Description:
3816 * Reset the current SCSI bus.
3817 *-F*************************************************************************/
3818 static void
aic7xxx_reset_current_bus(struct aic7xxx_host * p)3819 aic7xxx_reset_current_bus(struct aic7xxx_host *p)
3820 {
3821
3822 /* Disable reset interrupts. */
3823 aic_outb(p, aic_inb(p, SIMODE1) & ~ENSCSIRST, SIMODE1);
3824
3825 /* Turn off the bus' current operations, after all, we shouldn't have any
3826 * valid commands left to cause a RSELI and SELO once we've tossed the
3827 * bus away with this reset, so we might as well shut down the sequencer
3828 * until the bus is restarted as oppossed to saving the current settings
3829 * and restoring them (which makes no sense to me). */
3830
3831 /* Turn on the bus reset. */
3832 aic_outb(p, aic_inb(p, SCSISEQ) | SCSIRSTO, SCSISEQ);
3833 while ( (aic_inb(p, SCSISEQ) & SCSIRSTO) == 0)
3834 mdelay(5);
3835
3836 /*
3837 * Some of the new Ultra2 chipsets need a longer delay after a chip
3838 * reset than just the init setup creates, so we have to delay here
3839 * before we go into a reset in order to make the chips happy.
3840 */
3841 if (p->features & AHC_ULTRA2)
3842 mdelay(250);
3843 else
3844 mdelay(50);
3845
3846 /* Turn off the bus reset. */
3847 aic_outb(p, 0, SCSISEQ);
3848 mdelay(10);
3849
3850 aic7xxx_clear_intstat(p);
3851 /* Re-enable reset interrupts. */
3852 aic_outb(p, aic_inb(p, SIMODE1) | ENSCSIRST, SIMODE1);
3853
3854 }
3855
3856 /*+F*************************************************************************
3857 * Function:
3858 * aic7xxx_reset_channel
3859 *
3860 * Description:
3861 * Reset the channel.
3862 *-F*************************************************************************/
3863 static void
aic7xxx_reset_channel(struct aic7xxx_host * p,int channel,int initiate_reset)3864 aic7xxx_reset_channel(struct aic7xxx_host *p, int channel, int initiate_reset)
3865 {
3866 unsigned long offset_min, offset_max;
3867 unsigned char sblkctl;
3868 int cur_channel;
3869
3870 if (aic7xxx_verbose & VERBOSE_RESET_PROCESS)
3871 printk(INFO_LEAD "Reset channel called, %s initiate reset.\n",
3872 p->host_no, channel, -1, -1, (initiate_reset==TRUE) ? "will" : "won't" );
3873
3874
3875 if (channel == 1)
3876 {
3877 p->needsdtr |= (p->needsdtr_copy & 0xFF00);
3878 p->dtr_pending &= 0x00FF;
3879 offset_min = 8;
3880 offset_max = 16;
3881 }
3882 else
3883 {
3884 if (p->features & AHC_TWIN)
3885 {
3886 /* Channel A */
3887 p->needsdtr |= (p->needsdtr_copy & 0x00FF);
3888 p->dtr_pending &= 0xFF00;
3889 offset_min = 0;
3890 offset_max = 8;
3891 }
3892 else
3893 {
3894 p->needppr = p->needppr_copy;
3895 p->needsdtr = p->needsdtr_copy;
3896 p->needwdtr = p->needwdtr_copy;
3897 p->dtr_pending = 0x0;
3898 offset_min = 0;
3899 if (p->features & AHC_WIDE)
3900 {
3901 offset_max = 16;
3902 }
3903 else
3904 {
3905 offset_max = 8;
3906 }
3907 }
3908 }
3909
3910 while (offset_min < offset_max)
3911 {
3912 /*
3913 * Revert to async/narrow transfers until we renegotiate.
3914 */
3915 aic_outb(p, 0, TARG_SCSIRATE + offset_min);
3916 if (p->features & AHC_ULTRA2)
3917 {
3918 aic_outb(p, 0, TARG_OFFSET + offset_min);
3919 }
3920 offset_min++;
3921 }
3922
3923 /*
3924 * Reset the bus and unpause/restart the controller
3925 */
3926 sblkctl = aic_inb(p, SBLKCTL);
3927 if ( (p->chip & AHC_CHIPID_MASK) == AHC_AIC7770 )
3928 cur_channel = (sblkctl & SELBUSB) >> 3;
3929 else
3930 cur_channel = 0;
3931 if ( (cur_channel != channel) && (p->features & AHC_TWIN) )
3932 {
3933 /*
3934 * Case 1: Command for another bus is active
3935 */
3936 if (aic7xxx_verbose & VERBOSE_RESET_PROCESS)
3937 printk(INFO_LEAD "Stealthily resetting idle channel.\n", p->host_no,
3938 channel, -1, -1);
3939 /*
3940 * Stealthily reset the other bus without upsetting the current bus.
3941 */
3942 aic_outb(p, sblkctl ^ SELBUSB, SBLKCTL);
3943 aic_outb(p, aic_inb(p, SIMODE1) & ~ENBUSFREE, SIMODE1);
3944 if (initiate_reset)
3945 {
3946 aic7xxx_reset_current_bus(p);
3947 }
3948 aic_outb(p, aic_inb(p, SCSISEQ) & (ENSELI|ENRSELI|ENAUTOATNP), SCSISEQ);
3949 aic7xxx_clear_intstat(p);
3950 aic_outb(p, sblkctl, SBLKCTL);
3951 }
3952 else
3953 {
3954 /*
3955 * Case 2: A command from this bus is active or we're idle.
3956 */
3957 if (aic7xxx_verbose & VERBOSE_RESET_PROCESS)
3958 printk(INFO_LEAD "Resetting currently active channel.\n", p->host_no,
3959 channel, -1, -1);
3960 aic_outb(p, aic_inb(p, SIMODE1) & ~(ENBUSFREE|ENREQINIT),
3961 SIMODE1);
3962 p->flags &= ~AHC_HANDLING_REQINITS;
3963 p->msg_type = MSG_TYPE_NONE;
3964 p->msg_len = 0;
3965 if (initiate_reset)
3966 {
3967 aic7xxx_reset_current_bus(p);
3968 }
3969 aic_outb(p, aic_inb(p, SCSISEQ) & (ENSELI|ENRSELI|ENAUTOATNP), SCSISEQ);
3970 aic7xxx_clear_intstat(p);
3971 }
3972 if (aic7xxx_verbose & VERBOSE_RESET_RETURN)
3973 printk(INFO_LEAD "Channel reset\n", p->host_no, channel, -1, -1);
3974 /*
3975 * Clean up all the state information for the pending transactions
3976 * on this bus.
3977 */
3978 aic7xxx_reset_device(p, ALL_TARGETS, channel, ALL_LUNS, SCB_LIST_NULL);
3979
3980 if ( !(p->features & AHC_TWIN) )
3981 {
3982 restart_sequencer(p);
3983 }
3984
3985 return;
3986 }
3987
3988 /*+F*************************************************************************
3989 * Function:
3990 * aic7xxx_run_waiting_queues
3991 *
3992 * Description:
3993 * Scan the awaiting_scbs queue downloading and starting as many
3994 * scbs as we can.
3995 *-F*************************************************************************/
3996 static void
aic7xxx_run_waiting_queues(struct aic7xxx_host * p)3997 aic7xxx_run_waiting_queues(struct aic7xxx_host *p)
3998 {
3999 struct aic7xxx_scb *scb;
4000 int tindex;
4001 int sent;
4002 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,1,95)
4003 unsigned long cpu_flags = 0;
4004 #endif
4005
4006
4007 if (p->waiting_scbs.head == NULL)
4008 return;
4009
4010 sent = 0;
4011
4012 /*
4013 * First handle SCBs that are waiting but have been assigned a slot.
4014 */
4015 DRIVER_LOCK
4016 while ((scb = scbq_remove_head(&p->waiting_scbs)) != NULL)
4017 {
4018 tindex = TARGET_INDEX(scb->cmd);
4019 if ( !scb->tag_action && (p->tagenable & (1<<tindex)) )
4020 {
4021 p->dev_temp_queue_depth[tindex] = 1;
4022 }
4023 if ( (p->dev_active_cmds[tindex] >=
4024 p->dev_temp_queue_depth[tindex]) ||
4025 (p->dev_flags[tindex] & (DEVICE_RESET_DELAY|DEVICE_WAS_BUSY)) ||
4026 (p->flags & AHC_RESET_DELAY) )
4027 {
4028 scbq_insert_tail(&p->delayed_scbs[tindex], scb);
4029 }
4030 else
4031 {
4032 scb->flags &= ~SCB_WAITINGQ;
4033 p->dev_active_cmds[tindex]++;
4034 p->activescbs++;
4035 if ( !(scb->tag_action) )
4036 {
4037 aic7xxx_busy_target(p, scb);
4038 }
4039 p->qinfifo[p->qinfifonext++] = scb->hscb->tag;
4040 sent++;
4041 }
4042 }
4043 if (sent)
4044 {
4045 if (p->features & AHC_QUEUE_REGS)
4046 aic_outb(p, p->qinfifonext, HNSCB_QOFF);
4047 else
4048 {
4049 pause_sequencer(p);
4050 aic_outb(p, p->qinfifonext, KERNEL_QINPOS);
4051 unpause_sequencer(p, FALSE);
4052 }
4053 if (p->activescbs > p->max_activescbs)
4054 p->max_activescbs = p->activescbs;
4055 }
4056 DRIVER_UNLOCK
4057 }
4058
4059 #ifdef CONFIG_PCI
4060
4061 #define DPE 0x80
4062 #define SSE 0x40
4063 #define RMA 0x20
4064 #define RTA 0x10
4065 #define STA 0x08
4066 #define DPR 0x01
4067
4068 /*+F*************************************************************************
4069 * Function:
4070 * aic7xxx_pci_intr
4071 *
4072 * Description:
4073 * Check the scsi card for PCI errors and clear the interrupt
4074 *
4075 * NOTE: If you don't have this function and a 2940 card encounters
4076 * a PCI error condition, the machine will end up locked as the
4077 * interrupt handler gets slammed with non-stop PCI error interrupts
4078 *-F*************************************************************************/
4079 static void
aic7xxx_pci_intr(struct aic7xxx_host * p)4080 aic7xxx_pci_intr(struct aic7xxx_host *p)
4081 {
4082 unsigned char status1;
4083
4084 pci_read_config_byte(p->pdev, PCI_STATUS + 1, &status1);
4085
4086 if ( (status1 & DPE) && (aic7xxx_verbose & VERBOSE_MINOR_ERROR) )
4087 printk(WARN_LEAD "Data Parity Error during PCI address or PCI write"
4088 "phase.\n", p->host_no, -1, -1, -1);
4089 if ( (status1 & SSE) && (aic7xxx_verbose & VERBOSE_MINOR_ERROR) )
4090 printk(WARN_LEAD "Signal System Error Detected\n", p->host_no,
4091 -1, -1, -1);
4092 if ( (status1 & RMA) && (aic7xxx_verbose & VERBOSE_MINOR_ERROR) )
4093 printk(WARN_LEAD "Received a PCI Master Abort\n", p->host_no,
4094 -1, -1, -1);
4095 if ( (status1 & RTA) && (aic7xxx_verbose & VERBOSE_MINOR_ERROR) )
4096 printk(WARN_LEAD "Received a PCI Target Abort\n", p->host_no,
4097 -1, -1, -1);
4098 if ( (status1 & STA) && (aic7xxx_verbose & VERBOSE_MINOR_ERROR) )
4099 printk(WARN_LEAD "Signaled a PCI Target Abort\n", p->host_no,
4100 -1, -1, -1);
4101 if ( (status1 & DPR) && (aic7xxx_verbose & VERBOSE_MINOR_ERROR) )
4102 printk(WARN_LEAD "Data Parity Error has been reported via PCI pin "
4103 "PERR#\n", p->host_no, -1, -1, -1);
4104
4105 pci_write_config_byte(p->pdev, PCI_STATUS + 1, status1);
4106 if (status1 & (DPR|RMA|RTA))
4107 aic_outb(p, CLRPARERR, CLRINT);
4108
4109 if ( (aic7xxx_panic_on_abort) && (p->spurious_int > 500) )
4110 aic7xxx_panic_abort(p, NULL);
4111
4112 }
4113 #endif /* CONFIG_PCI */
4114
4115 /*+F*************************************************************************
4116 * Function:
4117 * aic7xxx_timer
4118 *
4119 * Description:
4120 * Take expired extries off of delayed queues and place on waiting queue
4121 * then run waiting queue to start commands.
4122 ***************************************************************************/
4123 static void
aic7xxx_timer(struct aic7xxx_host * p)4124 aic7xxx_timer(struct aic7xxx_host *p)
4125 {
4126 int i, j;
4127 unsigned long cpu_flags = 0;
4128 struct aic7xxx_scb *scb;
4129
4130 spin_lock_irqsave(&io_request_lock, cpu_flags);
4131 p->dev_timer_active &= ~(0x01 << MAX_TARGETS);
4132 if ( (p->dev_timer_active & (0x01 << p->scsi_id)) &&
4133 time_after_eq(jiffies, p->dev_expires[p->scsi_id]) )
4134 {
4135 p->flags &= ~AHC_RESET_DELAY;
4136 p->dev_timer_active &= ~(0x01 << p->scsi_id);
4137 }
4138 for(i=0; i<MAX_TARGETS; i++)
4139 {
4140 if ( (i != p->scsi_id) &&
4141 (p->dev_timer_active & (0x01 << i)) &&
4142 time_after_eq(jiffies, p->dev_expires[i]) )
4143 {
4144 p->dev_timer_active &= ~(0x01 << i);
4145 p->dev_flags[i] &= ~(DEVICE_RESET_DELAY|DEVICE_WAS_BUSY);
4146 p->dev_temp_queue_depth[i] = p->dev_max_queue_depth[i];
4147 j = 0;
4148 while ( ((scb = scbq_remove_head(&p->delayed_scbs[i])) != NULL) &&
4149 (j++ < p->scb_data->numscbs) )
4150 {
4151 scbq_insert_tail(&p->waiting_scbs, scb);
4152 }
4153 if (j == p->scb_data->numscbs)
4154 {
4155 printk(INFO_LEAD "timer: Yikes, loop in delayed_scbs list.\n",
4156 p->host_no, 0, i, -1);
4157 scbq_init(&p->delayed_scbs[i]);
4158 scbq_init(&p->waiting_scbs);
4159 /*
4160 * Well, things are screwed now, wait for a reset to clean the junk
4161 * out.
4162 */
4163 }
4164 }
4165 else if ( p->dev_timer_active & (0x01 << i) )
4166 {
4167 if ( p->dev_timer_active & (0x01 << MAX_TARGETS) )
4168 {
4169 if ( time_after_eq(p->dev_timer.expires, p->dev_expires[i]) )
4170 {
4171 p->dev_timer.expires = p->dev_expires[i];
4172 }
4173 }
4174 else
4175 {
4176 p->dev_timer.expires = p->dev_expires[i];
4177 p->dev_timer_active |= (0x01 << MAX_TARGETS);
4178 }
4179 }
4180 }
4181 if ( p->dev_timer_active & (0x01 << MAX_TARGETS) )
4182 {
4183 add_timer(&p->dev_timer);
4184 }
4185
4186 aic7xxx_run_waiting_queues(p);
4187 spin_unlock_irqrestore(&io_request_lock, cpu_flags);
4188 }
4189
4190 /*+F*************************************************************************
4191 * Function:
4192 * aic7xxx_construct_ppr
4193 *
4194 * Description:
4195 * Build up a Parallel Protocol Request message for use with SCSI-3
4196 * devices.
4197 *-F*************************************************************************/
4198 static void
aic7xxx_construct_ppr(struct aic7xxx_host * p,struct aic7xxx_scb * scb)4199 aic7xxx_construct_ppr(struct aic7xxx_host *p, struct aic7xxx_scb *scb)
4200 {
4201 int tindex = TARGET_INDEX(scb->cmd);
4202
4203 p->msg_buf[p->msg_index++] = MSG_EXTENDED;
4204 p->msg_buf[p->msg_index++] = MSG_EXT_PPR_LEN;
4205 p->msg_buf[p->msg_index++] = MSG_EXT_PPR;
4206 p->msg_buf[p->msg_index++] = p->transinfo[tindex].goal_period;
4207 p->msg_buf[p->msg_index++] = 0;
4208 p->msg_buf[p->msg_index++] = p->transinfo[tindex].goal_offset;
4209 p->msg_buf[p->msg_index++] = p->transinfo[tindex].goal_width;
4210 p->msg_buf[p->msg_index++] = p->transinfo[tindex].goal_options;
4211 p->msg_len += 8;
4212 }
4213
4214 /*+F*************************************************************************
4215 * Function:
4216 * aic7xxx_construct_sdtr
4217 *
4218 * Description:
4219 * Constucts a synchronous data transfer message in the message
4220 * buffer on the sequencer.
4221 *-F*************************************************************************/
4222 static void
aic7xxx_construct_sdtr(struct aic7xxx_host * p,unsigned char period,unsigned char offset)4223 aic7xxx_construct_sdtr(struct aic7xxx_host *p, unsigned char period,
4224 unsigned char offset)
4225 {
4226 p->msg_buf[p->msg_index++] = MSG_EXTENDED;
4227 p->msg_buf[p->msg_index++] = MSG_EXT_SDTR_LEN;
4228 p->msg_buf[p->msg_index++] = MSG_EXT_SDTR;
4229 p->msg_buf[p->msg_index++] = period;
4230 p->msg_buf[p->msg_index++] = offset;
4231 p->msg_len += 5;
4232 }
4233
4234 /*+F*************************************************************************
4235 * Function:
4236 * aic7xxx_construct_wdtr
4237 *
4238 * Description:
4239 * Constucts a wide data transfer message in the message buffer
4240 * on the sequencer.
4241 *-F*************************************************************************/
4242 static void
aic7xxx_construct_wdtr(struct aic7xxx_host * p,unsigned char bus_width)4243 aic7xxx_construct_wdtr(struct aic7xxx_host *p, unsigned char bus_width)
4244 {
4245 p->msg_buf[p->msg_index++] = MSG_EXTENDED;
4246 p->msg_buf[p->msg_index++] = MSG_EXT_WDTR_LEN;
4247 p->msg_buf[p->msg_index++] = MSG_EXT_WDTR;
4248 p->msg_buf[p->msg_index++] = bus_width;
4249 p->msg_len += 4;
4250 }
4251
4252 /*+F*************************************************************************
4253 * Function:
4254 * aic7xxx_calc_residual
4255 *
4256 * Description:
4257 * Calculate the residual data not yet transferred.
4258 *-F*************************************************************************/
4259 static void
aic7xxx_calculate_residual(struct aic7xxx_host * p,struct aic7xxx_scb * scb)4260 aic7xxx_calculate_residual (struct aic7xxx_host *p, struct aic7xxx_scb *scb)
4261 {
4262 struct aic7xxx_hwscb *hscb;
4263 Scsi_Cmnd *cmd;
4264 int actual, i;
4265
4266 cmd = scb->cmd;
4267 hscb = scb->hscb;
4268
4269 /*
4270 * Don't destroy valid residual information with
4271 * residual coming from a check sense operation.
4272 */
4273 if (((scb->hscb->control & DISCONNECTED) == 0) &&
4274 (scb->flags & SCB_SENSE) == 0)
4275 {
4276 /*
4277 * We had an underflow. At this time, there's only
4278 * one other driver that bothers to check for this,
4279 * and cmd->underflow seems to be set rather half-
4280 * heartedly in the higher-level SCSI code.
4281 */
4282 actual = scb->sg_length;
4283 for (i=1; i < hscb->residual_SG_segment_count; i++)
4284 {
4285 actual -= scb->sg_list[scb->sg_count - i].length;
4286 }
4287 actual -= (hscb->residual_data_count[2] << 16) |
4288 (hscb->residual_data_count[1] << 8) |
4289 hscb->residual_data_count[0];
4290
4291 if (actual < cmd->underflow)
4292 {
4293 if (aic7xxx_verbose & VERBOSE_MINOR_ERROR)
4294 {
4295 printk(INFO_LEAD "Underflow - Wanted %u, %s %u, residual SG "
4296 "count %d.\n", p->host_no, CTL_OF_SCB(scb), cmd->underflow,
4297 (cmd->request.cmd == WRITE) ? "wrote" : "read", actual,
4298 hscb->residual_SG_segment_count);
4299 printk(INFO_LEAD "status 0x%x.\n", p->host_no, CTL_OF_SCB(scb),
4300 hscb->target_status);
4301 }
4302 /*
4303 * In 2.4, only send back the residual information, don't flag this
4304 * as an error. Before 2.4 we had to flag this as an error because
4305 * the mid layer didn't check residual data counts to see if the
4306 * command needs retried.
4307 */
4308 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,4,0)
4309 cmd->resid = scb->sg_length - actual;
4310 #else
4311 aic7xxx_error(cmd) = DID_RETRY_COMMAND;
4312 #endif
4313 aic7xxx_status(cmd) = hscb->target_status;
4314 }
4315 }
4316
4317 /*
4318 * Clean out the residual information in the SCB for the
4319 * next consumer.
4320 */
4321 hscb->residual_data_count[2] = 0;
4322 hscb->residual_data_count[1] = 0;
4323 hscb->residual_data_count[0] = 0;
4324 hscb->residual_SG_segment_count = 0;
4325 }
4326
4327 /*+F*************************************************************************
4328 * Function:
4329 * aic7xxx_handle_device_reset
4330 *
4331 * Description:
4332 * Interrupt handler for sequencer interrupts (SEQINT).
4333 *-F*************************************************************************/
4334 static void
aic7xxx_handle_device_reset(struct aic7xxx_host * p,int target,int channel)4335 aic7xxx_handle_device_reset(struct aic7xxx_host *p, int target, int channel)
4336 {
4337 unsigned short targ_mask;
4338 unsigned char tindex = target;
4339
4340 tindex |= ((channel & 0x01) << 3);
4341
4342 targ_mask = (0x01 << tindex);
4343 /*
4344 * Go back to async/narrow transfers and renegotiate.
4345 */
4346 p->needppr |= (p->needppr_copy & targ_mask);
4347 p->needsdtr |= (p->needsdtr_copy & targ_mask);
4348 p->needwdtr |= (p->needwdtr_copy & targ_mask);
4349 p->dtr_pending &= ~targ_mask;
4350 aic_outb(p, 0, TARG_SCSIRATE + tindex);
4351 if (p->features & AHC_ULTRA2)
4352 aic_outb(p, 0, TARG_OFFSET + tindex);
4353 aic7xxx_reset_device(p, target, channel, ALL_LUNS, SCB_LIST_NULL);
4354 if (aic7xxx_verbose & VERBOSE_RESET_PROCESS)
4355 printk(INFO_LEAD "Bus Device Reset delivered.\n", p->host_no, channel,
4356 target, -1);
4357 aic7xxx_run_done_queue(p, /*complete*/ TRUE);
4358 }
4359
4360 /*+F*************************************************************************
4361 * Function:
4362 * aic7xxx_handle_seqint
4363 *
4364 * Description:
4365 * Interrupt handler for sequencer interrupts (SEQINT).
4366 *-F*************************************************************************/
4367 static void
aic7xxx_handle_seqint(struct aic7xxx_host * p,unsigned char intstat)4368 aic7xxx_handle_seqint(struct aic7xxx_host *p, unsigned char intstat)
4369 {
4370 struct aic7xxx_scb *scb;
4371 unsigned short target_mask;
4372 unsigned char target, lun, tindex;
4373 unsigned char queue_flag = FALSE;
4374 char channel;
4375
4376 target = ((aic_inb(p, SAVED_TCL) >> 4) & 0x0f);
4377 if ( (p->chip & AHC_CHIPID_MASK) == AHC_AIC7770 )
4378 channel = (aic_inb(p, SBLKCTL) & SELBUSB) >> 3;
4379 else
4380 channel = 0;
4381 tindex = target + (channel << 3);
4382 lun = aic_inb(p, SAVED_TCL) & 0x07;
4383 target_mask = (0x01 << tindex);
4384
4385 /*
4386 * Go ahead and clear the SEQINT now, that avoids any interrupt race
4387 * conditions later on in case we enable some other interrupt.
4388 */
4389 aic_outb(p, CLRSEQINT, CLRINT);
4390 switch (intstat & SEQINT_MASK)
4391 {
4392 case NO_MATCH:
4393 {
4394 aic_outb(p, aic_inb(p, SCSISEQ) & (ENSELI|ENRSELI|ENAUTOATNP),
4395 SCSISEQ);
4396 printk(WARN_LEAD "No active SCB for reconnecting target - Issuing "
4397 "BUS DEVICE RESET.\n", p->host_no, channel, target, lun);
4398 printk(WARN_LEAD " SAVED_TCL=0x%x, ARG_1=0x%x, SEQADDR=0x%x\n",
4399 p->host_no, channel, target, lun,
4400 aic_inb(p, SAVED_TCL), aic_inb(p, ARG_1),
4401 (aic_inb(p, SEQADDR1) << 8) | aic_inb(p, SEQADDR0));
4402 if (aic7xxx_panic_on_abort)
4403 aic7xxx_panic_abort(p, NULL);
4404 }
4405 break;
4406
4407 case SEND_REJECT:
4408 {
4409 if (aic7xxx_verbose & VERBOSE_MINOR_ERROR)
4410 printk(INFO_LEAD "Rejecting unknown message (0x%x) received from "
4411 "target, SEQ_FLAGS=0x%x\n", p->host_no, channel, target, lun,
4412 aic_inb(p, ACCUM), aic_inb(p, SEQ_FLAGS));
4413 }
4414 break;
4415
4416 case NO_IDENT:
4417 {
4418 /*
4419 * The reconnecting target either did not send an identify
4420 * message, or did, but we didn't find an SCB to match and
4421 * before it could respond to our ATN/abort, it hit a dataphase.
4422 * The only safe thing to do is to blow it away with a bus
4423 * reset.
4424 */
4425 if (aic7xxx_verbose & (VERBOSE_SEQINT | VERBOSE_RESET_MID))
4426 printk(INFO_LEAD "Target did not send an IDENTIFY message; "
4427 "LASTPHASE 0x%x, SAVED_TCL 0x%x\n", p->host_no, channel, target,
4428 lun, aic_inb(p, LASTPHASE), aic_inb(p, SAVED_TCL));
4429
4430 aic7xxx_reset_channel(p, channel, /*initiate reset*/ TRUE);
4431 aic7xxx_run_done_queue(p, TRUE);
4432
4433 }
4434 break;
4435
4436 case BAD_PHASE:
4437 if (aic_inb(p, LASTPHASE) == P_BUSFREE)
4438 {
4439 if (aic7xxx_verbose & VERBOSE_SEQINT)
4440 printk(INFO_LEAD "Missed busfree.\n", p->host_no, channel,
4441 target, lun);
4442 restart_sequencer(p);
4443 }
4444 else
4445 {
4446 if (aic7xxx_verbose & VERBOSE_SEQINT)
4447 printk(INFO_LEAD "Unknown scsi bus phase, continuing\n", p->host_no,
4448 channel, target, lun);
4449 }
4450 break;
4451
4452 case EXTENDED_MSG:
4453 {
4454 p->msg_type = MSG_TYPE_INITIATOR_MSGIN;
4455 p->msg_len = 0;
4456 p->msg_index = 0;
4457
4458 #ifdef AIC7XXX_VERBOSE_DEBUGGING
4459 if (aic7xxx_verbose > 0xffff)
4460 printk(INFO_LEAD "Enabling REQINITs for MSG_IN\n", p->host_no,
4461 channel, target, lun);
4462 #endif
4463
4464 /*
4465 * To actually receive the message, simply turn on
4466 * REQINIT interrupts and let our interrupt handler
4467 * do the rest (REQINIT should already be true).
4468 */
4469 p->flags |= AHC_HANDLING_REQINITS;
4470 aic_outb(p, aic_inb(p, SIMODE1) | ENREQINIT, SIMODE1);
4471
4472 /*
4473 * We don't want the sequencer unpaused yet so we return early
4474 */
4475 return;
4476 }
4477
4478 case REJECT_MSG:
4479 {
4480 /*
4481 * What we care about here is if we had an outstanding SDTR
4482 * or WDTR message for this target. If we did, this is a
4483 * signal that the target is refusing negotiation.
4484 */
4485 unsigned char scb_index;
4486 unsigned char last_msg;
4487
4488 scb_index = aic_inb(p, SCB_TAG);
4489 scb = p->scb_data->scb_array[scb_index];
4490 last_msg = aic_inb(p, LAST_MSG);
4491
4492 if ( (last_msg == MSG_IDENTIFYFLAG) &&
4493 (scb->tag_action) &&
4494 !(scb->flags & SCB_MSGOUT_BITS) )
4495 {
4496 if (scb->tag_action == MSG_ORDERED_Q_TAG)
4497 {
4498 /*
4499 * OK...the device seems able to accept tagged commands, but
4500 * not ordered tag commands, only simple tag commands. So, we
4501 * disable ordered tag commands and go on with life just like
4502 * normal.
4503 */
4504 p->orderedtag &= ~target_mask;
4505 scb->tag_action = MSG_SIMPLE_Q_TAG;
4506 scb->hscb->control &= ~SCB_TAG_TYPE;
4507 scb->hscb->control |= MSG_SIMPLE_Q_TAG;
4508 aic_outb(p, scb->hscb->control, SCB_CONTROL);
4509 /*
4510 * OK..we set the tag type to simple tag command, now we re-assert
4511 * ATNO and hope this will take us into the identify phase again
4512 * so we can resend the tag type and info to the device.
4513 */
4514 aic_outb(p, MSG_IDENTIFYFLAG, MSG_OUT);
4515 aic_outb(p, aic_inb(p, SCSISIGI) | ATNO, SCSISIGO);
4516 }
4517 else if (scb->tag_action == MSG_SIMPLE_Q_TAG)
4518 {
4519 unsigned char i, reset = 0;
4520 struct aic7xxx_scb *scbp;
4521 int old_verbose;
4522 /*
4523 * Hmmmm....the device is flaking out on tagged commands. The
4524 * bad thing is that we already have tagged commands enabled in
4525 * the device struct in the mid level code. We also have a queue
4526 * set according to the tagged queue depth. Gonna have to live
4527 * with it by controlling our queue depth internally and making
4528 * sure we don't set the tagged command flag any more.
4529 */
4530 p->tagenable &= ~target_mask;
4531 p->orderedtag &= ~target_mask;
4532 p->dev_max_queue_depth[tindex] =
4533 p->dev_temp_queue_depth[tindex] = 1;
4534 /*
4535 * We set this command up as a bus device reset. However, we have
4536 * to clear the tag type as it's causing us problems. We shouldnt
4537 * have to worry about any other commands being active, since if
4538 * the device is refusing tagged commands, this should be the
4539 * first tagged command sent to the device, however, we do have
4540 * to worry about any other tagged commands that may already be
4541 * in the qinfifo. The easiest way to do this, is to issue a BDR,
4542 * send all the commands back to the mid level code, then let them
4543 * come back and get rebuilt as untagged commands.
4544 */
4545 scb->tag_action = 0;
4546 scb->hscb->control &= ~(TAG_ENB | SCB_TAG_TYPE);
4547 aic_outb(p, scb->hscb->control, SCB_CONTROL);
4548
4549 old_verbose = aic7xxx_verbose;
4550 aic7xxx_verbose &= ~(VERBOSE_RESET|VERBOSE_ABORT);
4551 for (i=0; i!=p->scb_data->numscbs; i++)
4552 {
4553 scbp = p->scb_data->scb_array[i];
4554 if ((scbp->flags & SCB_ACTIVE) && (scbp != scb))
4555 {
4556 if (aic7xxx_match_scb(p, scbp, target, channel, lun, i))
4557 {
4558 aic7xxx_reset_device(p, target, channel, lun, i);
4559 reset++;
4560 }
4561 aic7xxx_run_done_queue(p, TRUE);
4562 }
4563 }
4564 aic7xxx_verbose = old_verbose;
4565 /*
4566 * Wait until after the for loop to set the busy index since
4567 * aic7xxx_reset_device will clear the busy index during its
4568 * operation.
4569 */
4570 aic7xxx_busy_target(p, scb);
4571 printk(INFO_LEAD "Device is refusing tagged commands, using "
4572 "untagged I/O.\n", p->host_no, channel, target, lun);
4573 aic_outb(p, MSG_IDENTIFYFLAG, MSG_OUT);
4574 aic_outb(p, aic_inb(p, SCSISIGI) | ATNO, SCSISIGO);
4575 }
4576 }
4577 else if (scb->flags & SCB_MSGOUT_PPR)
4578 {
4579 /*
4580 * As per the draft specs, any device capable of supporting any of
4581 * the option values other than 0 are not allowed to reject the
4582 * PPR message. Instead, they must negotiate out what they do
4583 * support instead of rejecting our offering or else they cause
4584 * a parity error during msg_out phase to signal that they don't
4585 * like our settings.
4586 */
4587 p->needppr &= ~target_mask;
4588 p->needppr_copy &= ~target_mask;
4589 aic7xxx_set_width(p, target, channel, lun, MSG_EXT_WDTR_BUS_8_BIT,
4590 (AHC_TRANS_ACTIVE|AHC_TRANS_CUR|AHC_TRANS_QUITE));
4591 aic7xxx_set_syncrate(p, NULL, target, channel, 0, 0, 0,
4592 AHC_TRANS_ACTIVE|AHC_TRANS_CUR|AHC_TRANS_QUITE);
4593 p->transinfo[tindex].goal_options = 0;
4594 p->dtr_pending &= ~target_mask;
4595 scb->flags &= ~SCB_MSGOUT_BITS;
4596 if(aic7xxx_verbose & VERBOSE_NEGOTIATION2)
4597 {
4598 printk(INFO_LEAD "Device is rejecting PPR messages, falling "
4599 "back.\n", p->host_no, channel, target, lun);
4600 }
4601 if ( p->transinfo[tindex].goal_width )
4602 {
4603 p->needwdtr |= target_mask;
4604 p->needwdtr_copy |= target_mask;
4605 p->dtr_pending |= target_mask;
4606 scb->flags |= SCB_MSGOUT_WDTR;
4607 }
4608 if ( p->transinfo[tindex].goal_offset )
4609 {
4610 p->needsdtr |= target_mask;
4611 p->needsdtr_copy |= target_mask;
4612 if( !(p->dtr_pending & target_mask) )
4613 {
4614 p->dtr_pending |= target_mask;
4615 scb->flags |= SCB_MSGOUT_SDTR;
4616 }
4617 }
4618 if ( p->dtr_pending & target_mask )
4619 {
4620 aic_outb(p, HOST_MSG, MSG_OUT);
4621 aic_outb(p, aic_inb(p, SCSISIGI) | ATNO, SCSISIGO);
4622 }
4623 }
4624 else if (scb->flags & SCB_MSGOUT_WDTR)
4625 {
4626 /*
4627 * note 8bit xfers and clear flag
4628 */
4629 p->needwdtr &= ~target_mask;
4630 p->needwdtr_copy &= ~target_mask;
4631 scb->flags &= ~SCB_MSGOUT_BITS;
4632 aic7xxx_set_width(p, target, channel, lun, MSG_EXT_WDTR_BUS_8_BIT,
4633 (AHC_TRANS_ACTIVE|AHC_TRANS_GOAL|AHC_TRANS_CUR));
4634 aic7xxx_set_syncrate(p, NULL, target, channel, 0, 0, 0,
4635 AHC_TRANS_ACTIVE|AHC_TRANS_CUR|AHC_TRANS_QUITE);
4636 if(aic7xxx_verbose & VERBOSE_NEGOTIATION2)
4637 {
4638 printk(INFO_LEAD "Device is rejecting WDTR messages, using "
4639 "narrow transfers.\n", p->host_no, channel, target, lun);
4640 }
4641 p->needsdtr |= (p->needsdtr_copy & target_mask);
4642 }
4643 else if (scb->flags & SCB_MSGOUT_SDTR)
4644 {
4645 /*
4646 * note asynch xfers and clear flag
4647 */
4648 p->needsdtr &= ~target_mask;
4649 p->needsdtr_copy &= ~target_mask;
4650 scb->flags &= ~SCB_MSGOUT_BITS;
4651 aic7xxx_set_syncrate(p, NULL, target, channel, 0, 0, 0,
4652 (AHC_TRANS_CUR|AHC_TRANS_ACTIVE|AHC_TRANS_GOAL));
4653 if(aic7xxx_verbose & VERBOSE_NEGOTIATION2)
4654 {
4655 printk(INFO_LEAD "Device is rejecting SDTR messages, using "
4656 "async transfers.\n", p->host_no, channel, target, lun);
4657 }
4658 }
4659 else if (aic7xxx_verbose & VERBOSE_SEQINT)
4660 {
4661 /*
4662 * Otherwise, we ignore it.
4663 */
4664 printk(INFO_LEAD "Received MESSAGE_REJECT for unknown cause. "
4665 "Ignoring.\n", p->host_no, channel, target, lun);
4666 }
4667 }
4668 break;
4669
4670 case BAD_STATUS:
4671 {
4672 unsigned char scb_index;
4673 struct aic7xxx_hwscb *hscb;
4674 Scsi_Cmnd *cmd;
4675
4676 /* The sequencer will notify us when a command has an error that
4677 * would be of interest to the kernel. This allows us to leave
4678 * the sequencer running in the common case of command completes
4679 * without error. The sequencer will have DMA'd the SCB back
4680 * up to us, so we can reference the drivers SCB array.
4681 *
4682 * Set the default return value to 0 indicating not to send
4683 * sense. The sense code will change this if needed and this
4684 * reduces code duplication.
4685 */
4686 aic_outb(p, 0, RETURN_1);
4687 scb_index = aic_inb(p, SCB_TAG);
4688 if (scb_index > p->scb_data->numscbs)
4689 {
4690 printk(WARN_LEAD "Invalid SCB during SEQINT 0x%02x, SCB_TAG %d.\n",
4691 p->host_no, channel, target, lun, intstat, scb_index);
4692 break;
4693 }
4694 scb = p->scb_data->scb_array[scb_index];
4695 hscb = scb->hscb;
4696
4697 if (!(scb->flags & SCB_ACTIVE) || (scb->cmd == NULL))
4698 {
4699 printk(WARN_LEAD "Invalid SCB during SEQINT 0x%x, scb %d, flags 0x%x,"
4700 " cmd 0x%lx.\n", p->host_no, channel, target, lun, intstat,
4701 scb_index, scb->flags, (unsigned long) scb->cmd);
4702 }
4703 else
4704 {
4705 cmd = scb->cmd;
4706 hscb->target_status = aic_inb(p, SCB_TARGET_STATUS);
4707 aic7xxx_status(cmd) = hscb->target_status;
4708
4709 cmd->result = hscb->target_status;
4710
4711 switch (status_byte(hscb->target_status))
4712 {
4713 case GOOD:
4714 if (aic7xxx_verbose & VERBOSE_SEQINT)
4715 printk(INFO_LEAD "Interrupted for status of GOOD???\n",
4716 p->host_no, CTL_OF_SCB(scb));
4717 break;
4718
4719 case COMMAND_TERMINATED:
4720 case CHECK_CONDITION:
4721 if ( !(scb->flags & SCB_SENSE) )
4722 {
4723 /*
4724 * Send a sense command to the requesting target.
4725 * XXX - revisit this and get rid of the memcopys.
4726 */
4727 memcpy(scb->sense_cmd, &generic_sense[0],
4728 sizeof(generic_sense));
4729
4730 scb->sense_cmd[1] = (cmd->lun << 5);
4731 scb->sense_cmd[4] = sizeof(cmd->sense_buffer);
4732
4733 scb->sg_list[0].length =
4734 cpu_to_le32(sizeof(cmd->sense_buffer));
4735 scb->sg_list[0].address =
4736 cpu_to_le32(pci_map_single(p->pdev, cmd->sense_buffer,
4737 sizeof(cmd->sense_buffer),
4738 PCI_DMA_FROMDEVICE));
4739
4740 /*
4741 * XXX - We should allow disconnection, but can't as it
4742 * might allow overlapped tagged commands.
4743 */
4744 /* hscb->control &= DISCENB; */
4745 hscb->control = 0;
4746 hscb->target_status = 0;
4747 hscb->SG_list_pointer =
4748 cpu_to_le32(SCB_DMA_ADDR(scb, scb->sg_list));
4749 hscb->SCSI_cmd_pointer =
4750 cpu_to_le32(SCB_DMA_ADDR(scb, scb->sense_cmd));
4751 hscb->data_count = scb->sg_list[0].length;
4752 hscb->data_pointer = scb->sg_list[0].address;
4753 hscb->SCSI_cmd_length = COMMAND_SIZE(scb->sense_cmd[0]);
4754 hscb->residual_SG_segment_count = 0;
4755 hscb->residual_data_count[0] = 0;
4756 hscb->residual_data_count[1] = 0;
4757 hscb->residual_data_count[2] = 0;
4758
4759 scb->sg_count = hscb->SG_segment_count = 1;
4760 scb->sg_length = sizeof(cmd->sense_buffer);
4761 scb->tag_action = 0;
4762 scb->flags |= SCB_SENSE;
4763 /*
4764 * Ensure the target is busy since this will be an
4765 * an untagged request.
4766 */
4767 #ifdef AIC7XXX_VERBOSE_DEBUGGING
4768 if (aic7xxx_verbose & VERBOSE_NEGOTIATION2)
4769 {
4770 if (scb->flags & SCB_MSGOUT_BITS)
4771 printk(INFO_LEAD "Requesting SENSE with %s\n", p->host_no,
4772 CTL_OF_SCB(scb), (scb->flags & SCB_MSGOUT_SDTR) ?
4773 "SDTR" : "WDTR");
4774 else
4775 printk(INFO_LEAD "Requesting SENSE, no MSG\n", p->host_no,
4776 CTL_OF_SCB(scb));
4777 }
4778 #endif
4779 aic7xxx_busy_target(p, scb);
4780 aic_outb(p, SEND_SENSE, RETURN_1);
4781 aic7xxx_error(cmd) = DID_OK;
4782 break;
4783 } /* first time sense, no errors */
4784 printk(INFO_LEAD "CHECK_CONDITION on REQUEST_SENSE, returning "
4785 "an error.\n", p->host_no, CTL_OF_SCB(scb));
4786 aic7xxx_error(cmd) = DID_ERROR;
4787 scb->flags &= ~SCB_SENSE;
4788 break;
4789
4790 case QUEUE_FULL:
4791 queue_flag = TRUE; /* Mark that this is a QUEUE_FULL and */
4792 case BUSY: /* drop through to here */
4793 {
4794 struct aic7xxx_scb *next_scbp, *prev_scbp;
4795 unsigned char active_hscb, next_hscb, prev_hscb, scb_index;
4796 /*
4797 * We have to look three places for queued commands:
4798 * 1: QINFIFO
4799 * 2: p->waiting_scbs queue
4800 * 3: WAITING_SCBS list on card (for commands that are started
4801 * but haven't yet made it to the device)
4802 */
4803 aic7xxx_search_qinfifo(p, target, channel, lun,
4804 SCB_LIST_NULL, 0, TRUE,
4805 &p->delayed_scbs[tindex]);
4806 next_scbp = p->waiting_scbs.head;
4807 while ( next_scbp != NULL )
4808 {
4809 prev_scbp = next_scbp;
4810 next_scbp = next_scbp->q_next;
4811 if ( aic7xxx_match_scb(p, prev_scbp, target, channel, lun,
4812 SCB_LIST_NULL) )
4813 {
4814 scbq_remove(&p->waiting_scbs, prev_scbp);
4815 scbq_insert_tail(&p->delayed_scbs[tindex],
4816 prev_scbp);
4817 }
4818 }
4819 next_scbp = NULL;
4820 active_hscb = aic_inb(p, SCBPTR);
4821 prev_hscb = next_hscb = scb_index = SCB_LIST_NULL;
4822 next_hscb = aic_inb(p, WAITING_SCBH);
4823 while (next_hscb != SCB_LIST_NULL)
4824 {
4825 aic_outb(p, next_hscb, SCBPTR);
4826 scb_index = aic_inb(p, SCB_TAG);
4827 if (scb_index < p->scb_data->numscbs)
4828 {
4829 next_scbp = p->scb_data->scb_array[scb_index];
4830 if (aic7xxx_match_scb(p, next_scbp, target, channel, lun,
4831 SCB_LIST_NULL) )
4832 {
4833 if (next_scbp->flags & SCB_WAITINGQ)
4834 {
4835 p->dev_active_cmds[tindex]++;
4836 p->activescbs--;
4837 scbq_remove(&p->delayed_scbs[tindex], next_scbp);
4838 scbq_remove(&p->waiting_scbs, next_scbp);
4839 }
4840 scbq_insert_head(&p->delayed_scbs[tindex],
4841 next_scbp);
4842 next_scbp->flags |= SCB_WAITINGQ;
4843 p->dev_active_cmds[tindex]--;
4844 p->activescbs--;
4845 next_hscb = aic_inb(p, SCB_NEXT);
4846 aic_outb(p, 0, SCB_CONTROL);
4847 aic_outb(p, SCB_LIST_NULL, SCB_TAG);
4848 aic7xxx_add_curscb_to_free_list(p);
4849 if (prev_hscb == SCB_LIST_NULL)
4850 {
4851 /* We were first on the list,
4852 * so we kill the selection
4853 * hardware. Let the sequencer
4854 * re-init the hardware itself
4855 */
4856 aic_outb(p, aic_inb(p, SCSISEQ) & ~ENSELO, SCSISEQ);
4857 aic_outb(p, CLRSELTIMEO, CLRSINT1);
4858 aic_outb(p, next_hscb, WAITING_SCBH);
4859 }
4860 else
4861 {
4862 aic_outb(p, prev_hscb, SCBPTR);
4863 aic_outb(p, next_hscb, SCB_NEXT);
4864 }
4865 }
4866 else
4867 {
4868 prev_hscb = next_hscb;
4869 next_hscb = aic_inb(p, SCB_NEXT);
4870 }
4871 } /* scb_index >= p->scb_data->numscbs */
4872 }
4873 aic_outb(p, active_hscb, SCBPTR);
4874 if (scb->flags & SCB_WAITINGQ)
4875 {
4876 scbq_remove(&p->delayed_scbs[tindex], scb);
4877 scbq_remove(&p->waiting_scbs, scb);
4878 p->dev_active_cmds[tindex]++;
4879 p->activescbs++;
4880 }
4881 scbq_insert_head(&p->delayed_scbs[tindex], scb);
4882 p->dev_active_cmds[tindex]--;
4883 p->activescbs--;
4884 scb->flags |= SCB_WAITINGQ | SCB_WAS_BUSY;
4885
4886 if ( !(p->dev_timer_active & (0x01 << tindex)) )
4887 {
4888 p->dev_timer_active |= (0x01 << tindex);
4889 if ( p->dev_active_cmds[tindex] )
4890 {
4891 p->dev_expires[tindex] = jiffies + HZ;
4892 }
4893 else
4894 {
4895 p->dev_expires[tindex] = jiffies + (HZ / 10);
4896 }
4897 if ( !(p->dev_timer_active & (0x01 << MAX_TARGETS)) )
4898 {
4899 p->dev_timer.expires = p->dev_expires[tindex];
4900 p->dev_timer_active |= (0x01 << MAX_TARGETS);
4901 add_timer(&p->dev_timer);
4902 }
4903 else if ( time_after_eq(p->dev_timer.expires,
4904 p->dev_expires[tindex]) )
4905 mod_timer(&p->dev_timer, p->dev_expires[tindex]);
4906 }
4907 #ifdef AIC7XXX_VERBOSE_DEBUGGING
4908 if( (aic7xxx_verbose & VERBOSE_MINOR_ERROR) ||
4909 (aic7xxx_verbose > 0xffff) )
4910 {
4911 if (queue_flag)
4912 printk(INFO_LEAD "Queue full received; queue depth %d, "
4913 "active %d\n", p->host_no, CTL_OF_SCB(scb),
4914 p->dev_max_queue_depth[tindex],
4915 p->dev_active_cmds[tindex]);
4916 else
4917 printk(INFO_LEAD "Target busy\n", p->host_no, CTL_OF_SCB(scb));
4918
4919 }
4920 #endif
4921 if (queue_flag)
4922 {
4923 if ( p->dev_last_queue_full[tindex] !=
4924 p->dev_active_cmds[tindex] )
4925 {
4926 p->dev_last_queue_full[tindex] =
4927 p->dev_active_cmds[tindex];
4928 p->dev_last_queue_full_count[tindex] = 0;
4929 }
4930 else
4931 {
4932 p->dev_last_queue_full_count[tindex]++;
4933 }
4934 if ( (p->dev_last_queue_full_count[tindex] > 14) &&
4935 (p->dev_active_cmds[tindex] > 4) )
4936 {
4937 if (aic7xxx_verbose & VERBOSE_NEGOTIATION2)
4938 printk(INFO_LEAD "Queue depth reduced to %d\n", p->host_no,
4939 CTL_OF_SCB(scb), p->dev_active_cmds[tindex]);
4940 p->dev_max_queue_depth[tindex] =
4941 p->dev_active_cmds[tindex];
4942 p->dev_last_queue_full[tindex] = 0;
4943 p->dev_last_queue_full_count[tindex] = 0;
4944 p->dev_temp_queue_depth[tindex] =
4945 p->dev_active_cmds[tindex];
4946 }
4947 else if (p->dev_active_cmds[tindex] == 0)
4948 {
4949 if (aic7xxx_verbose & VERBOSE_NEGOTIATION)
4950 {
4951 printk(INFO_LEAD "QUEUE_FULL status received with 0 "
4952 "commands active.\n", p->host_no, CTL_OF_SCB(scb));
4953 printk(INFO_LEAD "Tagged Command Queueing disabled\n",
4954 p->host_no, CTL_OF_SCB(scb));
4955 }
4956 p->dev_max_queue_depth[tindex] = 1;
4957 p->dev_temp_queue_depth[tindex] = 1;
4958 scb->tag_action = 0;
4959 scb->hscb->control &= ~(MSG_ORDERED_Q_TAG|MSG_SIMPLE_Q_TAG);
4960 }
4961 else
4962 {
4963 p->dev_flags[tindex] |= DEVICE_WAS_BUSY;
4964 p->dev_temp_queue_depth[tindex] =
4965 p->dev_active_cmds[tindex];
4966 }
4967 }
4968 break;
4969 }
4970
4971 default:
4972 if (aic7xxx_verbose & VERBOSE_SEQINT)
4973 printk(INFO_LEAD "Unexpected target status 0x%x.\n", p->host_no,
4974 CTL_OF_SCB(scb), scb->hscb->target_status);
4975 if (!aic7xxx_error(cmd))
4976 {
4977 aic7xxx_error(cmd) = DID_RETRY_COMMAND;
4978 }
4979 break;
4980 } /* end switch */
4981 } /* end else of */
4982 }
4983 break;
4984
4985 case AWAITING_MSG:
4986 {
4987 unsigned char scb_index, msg_out;
4988
4989 scb_index = aic_inb(p, SCB_TAG);
4990 msg_out = aic_inb(p, MSG_OUT);
4991 scb = p->scb_data->scb_array[scb_index];
4992 p->msg_index = p->msg_len = 0;
4993 /*
4994 * This SCB had a MK_MESSAGE set in its control byte informing
4995 * the sequencer that we wanted to send a special message to
4996 * this target.
4997 */
4998
4999 if ( !(scb->flags & SCB_DEVICE_RESET) &&
5000 (msg_out == MSG_IDENTIFYFLAG) &&
5001 (scb->hscb->control & TAG_ENB) )
5002 {
5003 p->msg_buf[p->msg_index++] = scb->tag_action;
5004 p->msg_buf[p->msg_index++] = scb->hscb->tag;
5005 p->msg_len += 2;
5006 }
5007
5008 if (scb->flags & SCB_DEVICE_RESET)
5009 {
5010 p->msg_buf[p->msg_index++] = MSG_BUS_DEV_RESET;
5011 p->msg_len++;
5012 if (aic7xxx_verbose & VERBOSE_RESET_PROCESS)
5013 printk(INFO_LEAD "Bus device reset mailed.\n",
5014 p->host_no, CTL_OF_SCB(scb));
5015 }
5016 else if (scb->flags & SCB_ABORT)
5017 {
5018 if (scb->tag_action)
5019 {
5020 p->msg_buf[p->msg_index++] = MSG_ABORT_TAG;
5021 }
5022 else
5023 {
5024 p->msg_buf[p->msg_index++] = MSG_ABORT;
5025 }
5026 p->msg_len++;
5027 if (aic7xxx_verbose & VERBOSE_ABORT_PROCESS)
5028 printk(INFO_LEAD "Abort message mailed.\n", p->host_no,
5029 CTL_OF_SCB(scb));
5030 }
5031 else if (scb->flags & SCB_MSGOUT_PPR)
5032 {
5033 if (aic7xxx_verbose & VERBOSE_NEGOTIATION2)
5034 {
5035 printk(INFO_LEAD "Sending PPR (%d/%d/%d/%d) message.\n",
5036 p->host_no, CTL_OF_SCB(scb),
5037 p->transinfo[tindex].goal_period,
5038 p->transinfo[tindex].goal_offset,
5039 p->transinfo[tindex].goal_width,
5040 p->transinfo[tindex].goal_options);
5041 }
5042 aic7xxx_construct_ppr(p, scb);
5043 }
5044 else if (scb->flags & SCB_MSGOUT_WDTR)
5045 {
5046 if (aic7xxx_verbose & VERBOSE_NEGOTIATION2)
5047 {
5048 printk(INFO_LEAD "Sending WDTR message.\n", p->host_no,
5049 CTL_OF_SCB(scb));
5050 }
5051 aic7xxx_construct_wdtr(p, p->transinfo[tindex].goal_width);
5052 }
5053 else if (scb->flags & SCB_MSGOUT_SDTR)
5054 {
5055 unsigned int max_sync, period;
5056 unsigned char options = 0;
5057 /*
5058 * Now that the device is selected, use the bits in SBLKCTL and
5059 * SSTAT2 to determine the max sync rate for this device.
5060 */
5061 if (p->features & AHC_ULTRA2)
5062 {
5063 if ( (aic_inb(p, SBLKCTL) & ENAB40) &&
5064 !(aic_inb(p, SSTAT2) & EXP_ACTIVE) )
5065 {
5066 max_sync = AHC_SYNCRATE_ULTRA2;
5067 }
5068 else
5069 {
5070 max_sync = AHC_SYNCRATE_ULTRA;
5071 }
5072 }
5073 else if (p->features & AHC_ULTRA)
5074 {
5075 max_sync = AHC_SYNCRATE_ULTRA;
5076 }
5077 else
5078 {
5079 max_sync = AHC_SYNCRATE_FAST;
5080 }
5081 period = p->transinfo[tindex].goal_period;
5082 aic7xxx_find_syncrate(p, &period, max_sync, &options);
5083 if (aic7xxx_verbose & VERBOSE_NEGOTIATION2)
5084 {
5085 printk(INFO_LEAD "Sending SDTR %d/%d message.\n", p->host_no,
5086 CTL_OF_SCB(scb), period,
5087 p->transinfo[tindex].goal_offset);
5088 }
5089 aic7xxx_construct_sdtr(p, period,
5090 p->transinfo[tindex].goal_offset);
5091 }
5092 else
5093 {
5094 sti();
5095 panic("aic7xxx: AWAITING_MSG for an SCB that does "
5096 "not have a waiting message.\n");
5097 }
5098 /*
5099 * We've set everything up to send our message, now to actually do
5100 * so we need to enable reqinit interrupts and let the interrupt
5101 * handler do the rest. We don't want to unpause the sequencer yet
5102 * though so we'll return early. We also have to make sure that
5103 * we clear the SEQINT *BEFORE* we set the REQINIT handler active
5104 * or else it's possible on VLB cards to loose the first REQINIT
5105 * interrupt. Edge triggered EISA cards could also loose this
5106 * interrupt, although PCI and level triggered cards should not
5107 * have this problem since they continually interrupt the kernel
5108 * until we take care of the situation.
5109 */
5110 scb->flags |= SCB_MSGOUT_SENT;
5111 p->msg_index = 0;
5112 p->msg_type = MSG_TYPE_INITIATOR_MSGOUT;
5113 p->flags |= AHC_HANDLING_REQINITS;
5114 aic_outb(p, aic_inb(p, SIMODE1) | ENREQINIT, SIMODE1);
5115 return;
5116 }
5117 break;
5118
5119 case DATA_OVERRUN:
5120 {
5121 unsigned char scb_index = aic_inb(p, SCB_TAG);
5122 unsigned char lastphase = aic_inb(p, LASTPHASE);
5123 unsigned int i;
5124
5125 scb = (p->scb_data->scb_array[scb_index]);
5126 /*
5127 * XXX - What do we really want to do on an overrun? The
5128 * mid-level SCSI code should handle this, but for now,
5129 * we'll just indicate that the command should retried.
5130 * If we retrieved sense info on this target, then the
5131 * base SENSE info should have been saved prior to the
5132 * overrun error. In that case, we return DID_OK and let
5133 * the mid level code pick up on the sense info. Otherwise
5134 * we return DID_ERROR so the command will get retried.
5135 */
5136 if ( !(scb->flags & SCB_SENSE) )
5137 {
5138 printk(WARN_LEAD "Data overrun detected in %s phase, tag %d;\n",
5139 p->host_no, CTL_OF_SCB(scb),
5140 (lastphase == P_DATAIN) ? "Data-In" : "Data-Out", scb->hscb->tag);
5141 printk(KERN_WARNING " %s seen Data Phase. Length=%d, NumSGs=%d.\n",
5142 (aic_inb(p, SEQ_FLAGS) & DPHASE) ? "Have" : "Haven't",
5143 scb->sg_length, scb->sg_count);
5144 printk(KERN_WARNING " Raw SCSI Command: 0x");
5145 for (i = 0; i < scb->hscb->SCSI_cmd_length; i++)
5146 {
5147 printk("%02x ", scb->cmd->cmnd[i]);
5148 }
5149 printk("\n");
5150 if(aic7xxx_verbose > 0xffff)
5151 {
5152 for (i = 0; i < scb->sg_count; i++)
5153 {
5154 printk(KERN_WARNING " sg[%d] - Addr 0x%x : Length %d\n",
5155 i,
5156 le32_to_cpu(scb->sg_list[i].address),
5157 le32_to_cpu(scb->sg_list[i].length) );
5158 }
5159 }
5160 aic7xxx_error(scb->cmd) = DID_ERROR;
5161 }
5162 else
5163 printk(INFO_LEAD "Data Overrun during SEND_SENSE operation.\n",
5164 p->host_no, CTL_OF_SCB(scb));
5165 }
5166 break;
5167
5168 case WIDE_RESIDUE:
5169 {
5170 unsigned char resid_sgcnt, index;
5171 unsigned char scb_index = aic_inb(p, SCB_TAG);
5172 unsigned int cur_addr, resid_dcnt;
5173 unsigned int native_addr, native_length, sg_addr;
5174 int i;
5175
5176 if(scb_index > p->scb_data->numscbs)
5177 {
5178 printk(WARN_LEAD "invalid scb_index during WIDE_RESIDUE.\n",
5179 p->host_no, -1, -1, -1);
5180 /*
5181 * XXX: Add error handling here
5182 */
5183 break;
5184 }
5185 scb = p->scb_data->scb_array[scb_index];
5186 if(!(scb->flags & SCB_ACTIVE) || (scb->cmd == NULL))
5187 {
5188 printk(WARN_LEAD "invalid scb during WIDE_RESIDUE flags:0x%x "
5189 "scb->cmd:0x%lx\n", p->host_no, CTL_OF_SCB(scb),
5190 scb->flags, (unsigned long)scb->cmd);
5191 break;
5192 }
5193 if(aic7xxx_verbose & VERBOSE_MINOR_ERROR)
5194 printk(INFO_LEAD "Got WIDE_RESIDUE message, patching up data "
5195 "pointer.\n", p->host_no, CTL_OF_SCB(scb));
5196
5197 /*
5198 * We have a valid scb to use on this WIDE_RESIDUE message, so
5199 * we need to walk the sg list looking for this particular sg
5200 * segment, then see if we happen to be at the very beginning of
5201 * the segment. If we are, then we have to back things up to
5202 * the previous segment. If not, then we simply need to remove
5203 * one byte from this segments address and add one to the byte
5204 * count.
5205 */
5206 cur_addr = aic_inb(p, SHADDR) | (aic_inb(p, SHADDR + 1) << 8) |
5207 (aic_inb(p, SHADDR + 2) << 16) | (aic_inb(p, SHADDR + 3) << 24);
5208 sg_addr = aic_inb(p, SG_COUNT + 1) | (aic_inb(p, SG_COUNT + 2) << 8) |
5209 (aic_inb(p, SG_COUNT + 3) << 16) | (aic_inb(p, SG_COUNT + 4) << 24);
5210 resid_sgcnt = aic_inb(p, SCB_RESID_SGCNT);
5211 resid_dcnt = aic_inb(p, SCB_RESID_DCNT) |
5212 (aic_inb(p, SCB_RESID_DCNT + 1) << 8) |
5213 (aic_inb(p, SCB_RESID_DCNT + 2) << 16);
5214 index = scb->sg_count - ((resid_sgcnt) ? resid_sgcnt : 1);
5215 native_addr = le32_to_cpu(scb->sg_list[index].address);
5216 native_length = le32_to_cpu(scb->sg_list[index].length);
5217 /*
5218 * If resid_dcnt == native_length, then we just loaded this SG
5219 * segment and we need to back it up one...
5220 */
5221 if(resid_dcnt == native_length)
5222 {
5223 if(index == 0)
5224 {
5225 /*
5226 * Oops, this isn't right, we can't back up to before the
5227 * beginning. This must be a bogus message, ignore it.
5228 */
5229 break;
5230 }
5231 resid_dcnt = 1;
5232 resid_sgcnt += 1;
5233 native_addr = le32_to_cpu(scb->sg_list[index - 1].address);
5234 native_length = le32_to_cpu(scb->sg_list[index - 1].length);
5235 cur_addr = native_addr + (native_length - 1);
5236 sg_addr -= sizeof(struct hw_scatterlist);
5237 }
5238 else
5239 {
5240 /*
5241 * resid_dcnt != native_length, so we are in the middle of a SG
5242 * element. Back it up one byte and leave the rest alone.
5243 */
5244 resid_dcnt += 1;
5245 cur_addr -= 1;
5246 }
5247
5248 /*
5249 * Output the new addresses and counts to the right places on the
5250 * card.
5251 */
5252 aic_outb(p, resid_sgcnt, SG_COUNT);
5253 aic_outb(p, resid_sgcnt, SCB_RESID_SGCNT);
5254 aic_outb(p, sg_addr & 0xff, SG_COUNT + 1);
5255 aic_outb(p, (sg_addr >> 8) & 0xff, SG_COUNT + 2);
5256 aic_outb(p, (sg_addr >> 16) & 0xff, SG_COUNT + 3);
5257 aic_outb(p, (sg_addr >> 24) & 0xff, SG_COUNT + 4);
5258 aic_outb(p, resid_dcnt & 0xff, SCB_RESID_DCNT);
5259 aic_outb(p, (resid_dcnt >> 8) & 0xff, SCB_RESID_DCNT + 1);
5260 aic_outb(p, (resid_dcnt >> 16) & 0xff, SCB_RESID_DCNT + 2);
5261
5262 /*
5263 * The sequencer actually wants to find the new address
5264 * in the SHADDR register set. On the Ultra2 and later controllers
5265 * this register set is readonly. In order to get the right number
5266 * into the register, you actually have to enter it in HADDR and then
5267 * use the PRELOADEN bit of DFCNTRL to drop it through from the
5268 * HADDR register to the SHADDR register. On non-Ultra2 controllers,
5269 * we simply write it direct.
5270 */
5271 if(p->features & AHC_ULTRA2)
5272 {
5273 /*
5274 * We might as well be accurate and drop both the resid_dcnt and
5275 * cur_addr into HCNT and HADDR and have both of them drop
5276 * through to the shadow layer together.
5277 */
5278 aic_outb(p, resid_dcnt & 0xff, HCNT);
5279 aic_outb(p, (resid_dcnt >> 8) & 0xff, HCNT + 1);
5280 aic_outb(p, (resid_dcnt >> 16) & 0xff, HCNT + 2);
5281 aic_outb(p, cur_addr & 0xff, HADDR);
5282 aic_outb(p, (cur_addr >> 8) & 0xff, HADDR + 1);
5283 aic_outb(p, (cur_addr >> 16) & 0xff, HADDR + 2);
5284 aic_outb(p, (cur_addr >> 24) & 0xff, HADDR + 3);
5285 aic_outb(p, aic_inb(p, DMAPARAMS) | PRELOADEN, DFCNTRL);
5286 udelay(1);
5287 aic_outb(p, aic_inb(p, DMAPARAMS) & ~(SCSIEN|HDMAEN), DFCNTRL);
5288 i=0;
5289 while(((aic_inb(p, DFCNTRL) & (SCSIEN|HDMAEN)) != 0) && (i++ < 1000))
5290 {
5291 udelay(1);
5292 }
5293 }
5294 else
5295 {
5296 aic_outb(p, cur_addr & 0xff, SHADDR);
5297 aic_outb(p, (cur_addr >> 8) & 0xff, SHADDR + 1);
5298 aic_outb(p, (cur_addr >> 16) & 0xff, SHADDR + 2);
5299 aic_outb(p, (cur_addr >> 24) & 0xff, SHADDR + 3);
5300 }
5301 }
5302 break;
5303
5304 case SEQ_SG_FIXUP:
5305 {
5306 unsigned char scb_index, tmp;
5307 int sg_addr, sg_length;
5308
5309 scb_index = aic_inb(p, SCB_TAG);
5310
5311 if(scb_index > p->scb_data->numscbs)
5312 {
5313 printk(WARN_LEAD "invalid scb_index during SEQ_SG_FIXUP.\n",
5314 p->host_no, -1, -1, -1);
5315 printk(INFO_LEAD "SCSISIGI 0x%x, SEQADDR 0x%x, SSTAT0 0x%x, SSTAT1 "
5316 "0x%x\n", p->host_no, -1, -1, -1,
5317 aic_inb(p, SCSISIGI),
5318 aic_inb(p, SEQADDR0) | (aic_inb(p, SEQADDR1) << 8),
5319 aic_inb(p, SSTAT0), aic_inb(p, SSTAT1));
5320 printk(INFO_LEAD "SG_CACHEPTR 0x%x, SSTAT2 0x%x, STCNT 0x%x\n",
5321 p->host_no, -1, -1, -1, aic_inb(p, SG_CACHEPTR),
5322 aic_inb(p, SSTAT2), aic_inb(p, STCNT + 2) << 16 |
5323 aic_inb(p, STCNT + 1) << 8 | aic_inb(p, STCNT));
5324 /*
5325 * XXX: Add error handling here
5326 */
5327 break;
5328 }
5329 scb = p->scb_data->scb_array[scb_index];
5330 if(!(scb->flags & SCB_ACTIVE) || (scb->cmd == NULL))
5331 {
5332 printk(WARN_LEAD "invalid scb during SEQ_SG_FIXUP flags:0x%x "
5333 "scb->cmd:0x%p\n", p->host_no, CTL_OF_SCB(scb),
5334 scb->flags, scb->cmd);
5335 printk(INFO_LEAD "SCSISIGI 0x%x, SEQADDR 0x%x, SSTAT0 0x%x, SSTAT1 "
5336 "0x%x\n", p->host_no, CTL_OF_SCB(scb),
5337 aic_inb(p, SCSISIGI),
5338 aic_inb(p, SEQADDR0) | (aic_inb(p, SEQADDR1) << 8),
5339 aic_inb(p, SSTAT0), aic_inb(p, SSTAT1));
5340 printk(INFO_LEAD "SG_CACHEPTR 0x%x, SSTAT2 0x%x, STCNT 0x%x\n",
5341 p->host_no, CTL_OF_SCB(scb), aic_inb(p, SG_CACHEPTR),
5342 aic_inb(p, SSTAT2), aic_inb(p, STCNT + 2) << 16 |
5343 aic_inb(p, STCNT + 1) << 8 | aic_inb(p, STCNT));
5344 break;
5345 }
5346 if(aic7xxx_verbose & VERBOSE_MINOR_ERROR)
5347 printk(INFO_LEAD "Fixing up SG address for sequencer.\n", p->host_no,
5348 CTL_OF_SCB(scb));
5349 /*
5350 * Advance the SG pointer to the next element in the list
5351 */
5352 tmp = aic_inb(p, SG_NEXT);
5353 tmp += SG_SIZEOF;
5354 aic_outb(p, tmp, SG_NEXT);
5355 if( tmp < SG_SIZEOF )
5356 aic_outb(p, aic_inb(p, SG_NEXT + 1) + 1, SG_NEXT + 1);
5357 tmp = aic_inb(p, SG_COUNT) - 1;
5358 aic_outb(p, tmp, SG_COUNT);
5359 sg_addr = le32_to_cpu(scb->sg_list[scb->sg_count - tmp].address);
5360 sg_length = le32_to_cpu(scb->sg_list[scb->sg_count - tmp].length);
5361 /*
5362 * Now stuff the element we just advanced past down onto the
5363 * card so it can be stored in the residual area.
5364 */
5365 aic_outb(p, sg_addr & 0xff, HADDR);
5366 aic_outb(p, (sg_addr >> 8) & 0xff, HADDR + 1);
5367 aic_outb(p, (sg_addr >> 16) & 0xff, HADDR + 2);
5368 aic_outb(p, (sg_addr >> 24) & 0xff, HADDR + 3);
5369 aic_outb(p, sg_length & 0xff, HCNT);
5370 aic_outb(p, (sg_length >> 8) & 0xff, HCNT + 1);
5371 aic_outb(p, (sg_length >> 16) & 0xff, HCNT + 2);
5372 aic_outb(p, (tmp << 2) | ((tmp == 1) ? LAST_SEG : 0), SG_CACHEPTR);
5373 aic_outb(p, aic_inb(p, DMAPARAMS), DFCNTRL);
5374 while(aic_inb(p, SSTAT0) & SDONE) udelay(1);
5375 while(aic_inb(p, DFCNTRL) & (HDMAEN|SCSIEN)) aic_outb(p, 0, DFCNTRL);
5376 }
5377 break;
5378
5379 #if AIC7XXX_NOT_YET
5380 case TRACEPOINT2:
5381 {
5382 printk(INFO_LEAD "Tracepoint #2 reached.\n", p->host_no,
5383 channel, target, lun);
5384 }
5385 break;
5386
5387 /* XXX Fill these in later */
5388 case MSG_BUFFER_BUSY:
5389 printk("aic7xxx: Message buffer busy.\n");
5390 break;
5391 case MSGIN_PHASEMIS:
5392 printk("aic7xxx: Message-in phasemis.\n");
5393 break;
5394 #endif
5395
5396 default: /* unknown */
5397 printk(WARN_LEAD "Unknown SEQINT, INTSTAT 0x%x, SCSISIGI 0x%x.\n",
5398 p->host_no, channel, target, lun, intstat,
5399 aic_inb(p, SCSISIGI));
5400 break;
5401 }
5402
5403 /*
5404 * Clear the sequencer interrupt and unpause the sequencer.
5405 */
5406 unpause_sequencer(p, /* unpause always */ TRUE);
5407 }
5408
5409 /*+F*************************************************************************
5410 * Function:
5411 * aic7xxx_parse_msg
5412 *
5413 * Description:
5414 * Parses incoming messages into actions on behalf of
5415 * aic7xxx_handle_reqinit
5416 *_F*************************************************************************/
5417 static int
aic7xxx_parse_msg(struct aic7xxx_host * p,struct aic7xxx_scb * scb)5418 aic7xxx_parse_msg(struct aic7xxx_host *p, struct aic7xxx_scb *scb)
5419 {
5420 int reject, reply, done;
5421 unsigned char target_scsirate, tindex;
5422 unsigned short target_mask;
5423 unsigned char target, channel, lun;
5424 unsigned char bus_width, new_bus_width;
5425 unsigned char trans_options, new_trans_options;
5426 unsigned int period, new_period, offset, new_offset, maxsync;
5427 struct aic7xxx_syncrate *syncrate;
5428
5429 target = scb->cmd->target;
5430 channel = scb->cmd->channel;
5431 lun = scb->cmd->lun;
5432 reply = reject = done = FALSE;
5433 tindex = TARGET_INDEX(scb->cmd);
5434 target_scsirate = aic_inb(p, TARG_SCSIRATE + tindex);
5435 target_mask = (0x01 << tindex);
5436
5437 /*
5438 * Parse as much of the message as is available,
5439 * rejecting it if we don't support it. When
5440 * the entire message is available and has been
5441 * handled, return TRUE indicating that we have
5442 * parsed an entire message.
5443 */
5444
5445 if (p->msg_buf[0] != MSG_EXTENDED)
5446 {
5447 reject = TRUE;
5448 }
5449
5450 /*
5451 * Even if we are an Ultra3 card, don't allow Ultra3 sync rates when
5452 * using the SDTR messages. We need the PPR messages to enable the
5453 * higher speeds that include things like Dual Edge clocking.
5454 */
5455 if (p->features & AHC_ULTRA2)
5456 {
5457 if ( (aic_inb(p, SBLKCTL) & ENAB40) &&
5458 !(aic_inb(p, SSTAT2) & EXP_ACTIVE) )
5459 {
5460 if (p->features & AHC_ULTRA3)
5461 maxsync = AHC_SYNCRATE_ULTRA3;
5462 else
5463 maxsync = AHC_SYNCRATE_ULTRA2;
5464 }
5465 else
5466 {
5467 maxsync = AHC_SYNCRATE_ULTRA;
5468 }
5469 }
5470 else if (p->features & AHC_ULTRA)
5471 {
5472 maxsync = AHC_SYNCRATE_ULTRA;
5473 }
5474 else
5475 {
5476 maxsync = AHC_SYNCRATE_FAST;
5477 }
5478
5479 /*
5480 * Just accept the length byte outright and perform
5481 * more checking once we know the message type.
5482 */
5483
5484 if ( !reject && (p->msg_len > 2) )
5485 {
5486 switch(p->msg_buf[2])
5487 {
5488 case MSG_EXT_SDTR:
5489 {
5490
5491 if (p->msg_buf[1] != MSG_EXT_SDTR_LEN)
5492 {
5493 reject = TRUE;
5494 break;
5495 }
5496
5497 if (p->msg_len < (MSG_EXT_SDTR_LEN + 2))
5498 {
5499 break;
5500 }
5501
5502 period = new_period = p->msg_buf[3];
5503 offset = new_offset = p->msg_buf[4];
5504 trans_options = new_trans_options = 0;
5505 bus_width = new_bus_width = target_scsirate & WIDEXFER;
5506
5507 /*
5508 * If our current max syncrate is in the Ultra3 range, bump it back
5509 * down to Ultra2 since we can't negotiate DT transfers using SDTR
5510 */
5511 if(maxsync == AHC_SYNCRATE_ULTRA3)
5512 maxsync = AHC_SYNCRATE_ULTRA2;
5513
5514 /*
5515 * We might have a device that is starting negotiation with us
5516 * before we can start up negotiation with it....be prepared to
5517 * have a device ask for a higher speed then we want to give it
5518 * in that case
5519 */
5520 if ( (scb->flags & (SCB_MSGOUT_SENT|SCB_MSGOUT_SDTR)) !=
5521 (SCB_MSGOUT_SENT|SCB_MSGOUT_SDTR) )
5522 {
5523 if (!(p->dev_flags[tindex] & DEVICE_DTR_SCANNED))
5524 {
5525 /*
5526 * We shouldn't get here unless this is a narrow drive, wide
5527 * devices should trigger this same section of code in the WDTR
5528 * handler first instead.
5529 */
5530 p->transinfo[tindex].goal_width = MSG_EXT_WDTR_BUS_8_BIT;
5531 p->transinfo[tindex].goal_options = 0;
5532 if(p->transinfo[tindex].user_offset)
5533 {
5534 p->needsdtr_copy |= target_mask;
5535 p->transinfo[tindex].goal_period =
5536 MAX(10,p->transinfo[tindex].user_period);
5537 if(p->features & AHC_ULTRA2)
5538 {
5539 p->transinfo[tindex].goal_offset = MAX_OFFSET_ULTRA2;
5540 }
5541 else
5542 {
5543 p->transinfo[tindex].goal_offset = MAX_OFFSET_8BIT;
5544 }
5545 }
5546 else
5547 {
5548 p->needsdtr_copy &= ~target_mask;
5549 p->transinfo[tindex].goal_period = 255;
5550 p->transinfo[tindex].goal_offset = 0;
5551 }
5552 p->dev_flags[tindex] |= DEVICE_DTR_SCANNED | DEVICE_PRINT_DTR;
5553 }
5554 else if ((p->needsdtr_copy & target_mask) == 0)
5555 {
5556 /*
5557 * This is a preemptive message from the target, we've already
5558 * scanned this target and set our options for it, and we
5559 * don't need a WDTR with this target (for whatever reason),
5560 * so reject this incoming WDTR
5561 */
5562 reject = TRUE;
5563 break;
5564 }
5565
5566 /* The device is sending this message first and we have to reply */
5567 reply = TRUE;
5568
5569 if (aic7xxx_verbose & VERBOSE_NEGOTIATION2)
5570 {
5571 printk(INFO_LEAD "Received pre-emptive SDTR message from "
5572 "target.\n", p->host_no, CTL_OF_SCB(scb));
5573 }
5574 /*
5575 * Validate the values the device passed to us against our SEEPROM
5576 * settings. We don't have to do this if we aren't replying since
5577 * the device isn't allowed to send values greater than the ones
5578 * we first sent to it.
5579 */
5580 new_period = MAX(period, p->transinfo[tindex].goal_period);
5581 new_offset = MIN(offset, p->transinfo[tindex].goal_offset);
5582 }
5583
5584 /*
5585 * Use our new_period, new_offset, bus_width, and card options
5586 * to determine the actual syncrate settings
5587 */
5588 syncrate = aic7xxx_find_syncrate(p, &new_period, maxsync,
5589 &trans_options);
5590 aic7xxx_validate_offset(p, syncrate, &new_offset, bus_width);
5591
5592 /*
5593 * Did we drop to async? If so, send a reply regardless of whether
5594 * or not we initiated this negotiation.
5595 */
5596 if ((new_offset == 0) && (new_offset != offset))
5597 {
5598 p->needsdtr_copy &= ~target_mask;
5599 reply = TRUE;
5600 }
5601
5602 /*
5603 * Did we start this, if not, or if we went too low and had to
5604 * go async, then send an SDTR back to the target
5605 */
5606 if(reply)
5607 {
5608 /* when sending a reply, make sure that the goal settings are
5609 * updated along with current and active since the code that
5610 * will actually build the message for the sequencer uses the
5611 * goal settings as its guidelines.
5612 */
5613 aic7xxx_set_syncrate(p, syncrate, target, channel, new_period,
5614 new_offset, trans_options,
5615 AHC_TRANS_GOAL|AHC_TRANS_ACTIVE|AHC_TRANS_CUR);
5616 scb->flags &= ~SCB_MSGOUT_BITS;
5617 scb->flags |= SCB_MSGOUT_SDTR;
5618 aic_outb(p, HOST_MSG, MSG_OUT);
5619 aic_outb(p, aic_inb(p, SCSISIGO) | ATNO, SCSISIGO);
5620 }
5621 else
5622 {
5623 aic7xxx_set_syncrate(p, syncrate, target, channel, new_period,
5624 new_offset, trans_options,
5625 AHC_TRANS_ACTIVE|AHC_TRANS_CUR);
5626 p->needsdtr &= ~target_mask;
5627 }
5628 done = TRUE;
5629 break;
5630 }
5631 case MSG_EXT_WDTR:
5632 {
5633
5634 if (p->msg_buf[1] != MSG_EXT_WDTR_LEN)
5635 {
5636 reject = TRUE;
5637 break;
5638 }
5639
5640 if (p->msg_len < (MSG_EXT_WDTR_LEN + 2))
5641 {
5642 break;
5643 }
5644
5645 bus_width = new_bus_width = p->msg_buf[3];
5646
5647 if ( (scb->flags & (SCB_MSGOUT_SENT|SCB_MSGOUT_WDTR)) ==
5648 (SCB_MSGOUT_SENT|SCB_MSGOUT_WDTR) )
5649 {
5650 switch(bus_width)
5651 {
5652 default:
5653 {
5654 reject = TRUE;
5655 if ( (aic7xxx_verbose & VERBOSE_NEGOTIATION2) &&
5656 ((p->dev_flags[tindex] & DEVICE_PRINT_DTR) ||
5657 (aic7xxx_verbose > 0xffff)) )
5658 {
5659 printk(INFO_LEAD "Requesting %d bit transfers, rejecting.\n",
5660 p->host_no, CTL_OF_SCB(scb), 8 * (0x01 << bus_width));
5661 }
5662 } /* We fall through on purpose */
5663 case MSG_EXT_WDTR_BUS_8_BIT:
5664 {
5665 p->transinfo[tindex].goal_width = MSG_EXT_WDTR_BUS_8_BIT;
5666 p->needwdtr_copy &= ~target_mask;
5667 break;
5668 }
5669 case MSG_EXT_WDTR_BUS_16_BIT:
5670 {
5671 break;
5672 }
5673 }
5674 p->needwdtr &= ~target_mask;
5675 aic7xxx_set_width(p, target, channel, lun, new_bus_width,
5676 AHC_TRANS_ACTIVE|AHC_TRANS_CUR);
5677 }
5678 else
5679 {
5680 if ( !(p->dev_flags[tindex] & DEVICE_DTR_SCANNED) )
5681 {
5682 /*
5683 * Well, we now know the WDTR and SYNC caps of this device since
5684 * it contacted us first, mark it as such and copy the user stuff
5685 * over to the goal stuff.
5686 */
5687 if( (p->features & AHC_WIDE) && p->transinfo[tindex].user_width )
5688 {
5689 p->transinfo[tindex].goal_width = MSG_EXT_WDTR_BUS_16_BIT;
5690 p->needwdtr_copy |= target_mask;
5691 }
5692
5693 /*
5694 * Devices that support DT transfers don't start WDTR requests
5695 */
5696 p->transinfo[tindex].goal_options = 0;
5697
5698 if(p->transinfo[tindex].user_offset)
5699 {
5700 p->needsdtr_copy |= target_mask;
5701 p->transinfo[tindex].goal_period =
5702 MAX(10,p->transinfo[tindex].user_period);
5703 if(p->features & AHC_ULTRA2)
5704 {
5705 p->transinfo[tindex].goal_offset = MAX_OFFSET_ULTRA2;
5706 }
5707 else if( p->transinfo[tindex].goal_width )
5708 {
5709 p->transinfo[tindex].goal_offset = MAX_OFFSET_16BIT;
5710 }
5711 else
5712 {
5713 p->transinfo[tindex].goal_offset = MAX_OFFSET_8BIT;
5714 }
5715 } else {
5716 p->needsdtr_copy &= ~target_mask;
5717 p->transinfo[tindex].goal_period = 255;
5718 p->transinfo[tindex].goal_offset = 0;
5719 }
5720
5721 p->dev_flags[tindex] |= DEVICE_DTR_SCANNED | DEVICE_PRINT_DTR;
5722 }
5723 else if ((p->needwdtr_copy & target_mask) == 0)
5724 {
5725 /*
5726 * This is a preemptive message from the target, we've already
5727 * scanned this target and set our options for it, and we
5728 * don't need a WDTR with this target (for whatever reason),
5729 * so reject this incoming WDTR
5730 */
5731 reject = TRUE;
5732 break;
5733 }
5734
5735 /* The device is sending this message first and we have to reply */
5736 reply = TRUE;
5737
5738 if (aic7xxx_verbose & VERBOSE_NEGOTIATION2)
5739 {
5740 printk(INFO_LEAD "Received pre-emptive WDTR message from "
5741 "target.\n", p->host_no, CTL_OF_SCB(scb));
5742 }
5743 switch(bus_width)
5744 {
5745 case MSG_EXT_WDTR_BUS_16_BIT:
5746 {
5747 if ( (p->features & AHC_WIDE) &&
5748 (p->transinfo[tindex].goal_width ==
5749 MSG_EXT_WDTR_BUS_16_BIT) )
5750 {
5751 new_bus_width = MSG_EXT_WDTR_BUS_16_BIT;
5752 break;
5753 }
5754 } /* Fall through if we aren't a wide card */
5755 default:
5756 case MSG_EXT_WDTR_BUS_8_BIT:
5757 {
5758 p->needwdtr_copy &= ~target_mask;
5759 new_bus_width = MSG_EXT_WDTR_BUS_8_BIT;
5760 break;
5761 }
5762 }
5763 scb->flags &= ~SCB_MSGOUT_BITS;
5764 scb->flags |= SCB_MSGOUT_WDTR;
5765 p->needwdtr &= ~target_mask;
5766 if((p->dtr_pending & target_mask) == 0)
5767 {
5768 /* there is no other command with SCB_DTR_SCB already set that will
5769 * trigger the release of the dtr_pending bit. Both set the bit
5770 * and set scb->flags |= SCB_DTR_SCB
5771 */
5772 p->dtr_pending |= target_mask;
5773 scb->flags |= SCB_DTR_SCB;
5774 }
5775 aic_outb(p, HOST_MSG, MSG_OUT);
5776 aic_outb(p, aic_inb(p, SCSISIGO) | ATNO, SCSISIGO);
5777 /* when sending a reply, make sure that the goal settings are
5778 * updated along with current and active since the code that
5779 * will actually build the message for the sequencer uses the
5780 * goal settings as its guidelines.
5781 */
5782 aic7xxx_set_width(p, target, channel, lun, new_bus_width,
5783 AHC_TRANS_GOAL|AHC_TRANS_ACTIVE|AHC_TRANS_CUR);
5784 }
5785
5786 /*
5787 * By virtue of the SCSI spec, a WDTR message negates any existing
5788 * SDTR negotiations. So, even if needsdtr isn't marked for this
5789 * device, we still have to do a new SDTR message if the device
5790 * supports SDTR at all. Therefore, we check needsdtr_copy instead
5791 * of needstr.
5792 */
5793 aic7xxx_set_syncrate(p, NULL, target, channel, 0, 0, 0,
5794 AHC_TRANS_ACTIVE|AHC_TRANS_CUR|AHC_TRANS_QUITE);
5795 p->needsdtr |= (p->needsdtr_copy & target_mask);
5796 done = TRUE;
5797 break;
5798 }
5799 case MSG_EXT_PPR:
5800 {
5801
5802 if (p->msg_buf[1] != MSG_EXT_PPR_LEN)
5803 {
5804 reject = TRUE;
5805 break;
5806 }
5807
5808 if (p->msg_len < (MSG_EXT_PPR_LEN + 2))
5809 {
5810 break;
5811 }
5812
5813 period = new_period = p->msg_buf[3];
5814 offset = new_offset = p->msg_buf[5];
5815 bus_width = new_bus_width = p->msg_buf[6];
5816 trans_options = new_trans_options = p->msg_buf[7] & 0xf;
5817
5818 if(aic7xxx_verbose & VERBOSE_NEGOTIATION2)
5819 {
5820 printk(INFO_LEAD "Parsing PPR message (%d/%d/%d/%d)\n",
5821 p->host_no, CTL_OF_SCB(scb), period, offset, bus_width,
5822 trans_options);
5823 }
5824
5825 /*
5826 * We might have a device that is starting negotiation with us
5827 * before we can start up negotiation with it....be prepared to
5828 * have a device ask for a higher speed then we want to give it
5829 * in that case
5830 */
5831 if ( (scb->flags & (SCB_MSGOUT_SENT|SCB_MSGOUT_PPR)) !=
5832 (SCB_MSGOUT_SENT|SCB_MSGOUT_PPR) )
5833 {
5834 /* Have we scanned the device yet? */
5835 if (!(p->dev_flags[tindex] & DEVICE_DTR_SCANNED))
5836 {
5837 /* The device is electing to use PPR messages, so we will too until
5838 * we know better */
5839 p->needppr |= target_mask;
5840 p->needppr_copy |= target_mask;
5841 p->needsdtr &= ~target_mask;
5842 p->needsdtr_copy &= ~target_mask;
5843 p->needwdtr &= ~target_mask;
5844 p->needwdtr_copy &= ~target_mask;
5845
5846 /* We know the device is SCSI-3 compliant due to PPR */
5847 p->dev_flags[tindex] |= DEVICE_SCSI_3;
5848
5849 /*
5850 * Not only is the device starting this up, but it also hasn't
5851 * been scanned yet, so this would likely be our TUR or our
5852 * INQUIRY command at scan time, so we need to use the
5853 * settings from the SEEPROM if they existed. Of course, even
5854 * if we didn't find a SEEPROM, we stuffed default values into
5855 * the user settings anyway, so use those in all cases.
5856 */
5857 p->transinfo[tindex].goal_width =
5858 p->transinfo[tindex].user_width;
5859 if(p->transinfo[tindex].user_offset)
5860 {
5861 p->transinfo[tindex].goal_period =
5862 p->transinfo[tindex].user_period;
5863 p->transinfo[tindex].goal_options =
5864 p->transinfo[tindex].user_options;
5865 if(p->features & AHC_ULTRA2)
5866 {
5867 p->transinfo[tindex].goal_offset = MAX_OFFSET_ULTRA2;
5868 }
5869 else if( p->transinfo[tindex].goal_width &&
5870 (bus_width == MSG_EXT_WDTR_BUS_16_BIT) &&
5871 p->features & AHC_WIDE )
5872 {
5873 p->transinfo[tindex].goal_offset = MAX_OFFSET_16BIT;
5874 }
5875 else
5876 {
5877 p->transinfo[tindex].goal_offset = MAX_OFFSET_8BIT;
5878 }
5879 }
5880 else
5881 {
5882 p->transinfo[tindex].goal_period = 255;
5883 p->transinfo[tindex].goal_offset = 0;
5884 p->transinfo[tindex].goal_options = 0;
5885 }
5886 p->dev_flags[tindex] |= DEVICE_DTR_SCANNED | DEVICE_PRINT_DTR;
5887 }
5888 else if ((p->needppr_copy & target_mask) == 0)
5889 {
5890 /*
5891 * This is a preemptive message from the target, we've already
5892 * scanned this target and set our options for it, and we
5893 * don't need a PPR with this target (for whatever reason),
5894 * so reject this incoming PPR
5895 */
5896 reject = TRUE;
5897 break;
5898 }
5899
5900 /* The device is sending this message first and we have to reply */
5901 reply = TRUE;
5902
5903 if (aic7xxx_verbose & VERBOSE_NEGOTIATION2)
5904 {
5905 printk(INFO_LEAD "Received pre-emptive PPR message from "
5906 "target.\n", p->host_no, CTL_OF_SCB(scb));
5907 }
5908
5909 }
5910
5911 switch(bus_width)
5912 {
5913 case MSG_EXT_WDTR_BUS_16_BIT:
5914 {
5915 if ( (p->transinfo[tindex].goal_width ==
5916 MSG_EXT_WDTR_BUS_16_BIT) && p->features & AHC_WIDE)
5917 {
5918 break;
5919 }
5920 }
5921 default:
5922 {
5923 if ( (aic7xxx_verbose & VERBOSE_NEGOTIATION2) &&
5924 ((p->dev_flags[tindex] & DEVICE_PRINT_DTR) ||
5925 (aic7xxx_verbose > 0xffff)) )
5926 {
5927 reply = TRUE;
5928 printk(INFO_LEAD "Requesting %d bit transfers, rejecting.\n",
5929 p->host_no, CTL_OF_SCB(scb), 8 * (0x01 << bus_width));
5930 }
5931 } /* We fall through on purpose */
5932 case MSG_EXT_WDTR_BUS_8_BIT:
5933 {
5934 /*
5935 * According to the spec, if we aren't wide, we also can't be
5936 * Dual Edge so clear the options byte
5937 */
5938 new_trans_options = 0;
5939 new_bus_width = MSG_EXT_WDTR_BUS_8_BIT;
5940 break;
5941 }
5942 }
5943
5944 if(reply)
5945 {
5946 /* when sending a reply, make sure that the goal settings are
5947 * updated along with current and active since the code that
5948 * will actually build the message for the sequencer uses the
5949 * goal settings as its guidelines.
5950 */
5951 aic7xxx_set_width(p, target, channel, lun, new_bus_width,
5952 AHC_TRANS_GOAL|AHC_TRANS_ACTIVE|AHC_TRANS_CUR);
5953 syncrate = aic7xxx_find_syncrate(p, &new_period, maxsync,
5954 &new_trans_options);
5955 aic7xxx_validate_offset(p, syncrate, &new_offset, new_bus_width);
5956 aic7xxx_set_syncrate(p, syncrate, target, channel, new_period,
5957 new_offset, new_trans_options,
5958 AHC_TRANS_GOAL|AHC_TRANS_ACTIVE|AHC_TRANS_CUR);
5959 }
5960 else
5961 {
5962 aic7xxx_set_width(p, target, channel, lun, new_bus_width,
5963 AHC_TRANS_ACTIVE|AHC_TRANS_CUR);
5964 syncrate = aic7xxx_find_syncrate(p, &new_period, maxsync,
5965 &new_trans_options);
5966 aic7xxx_validate_offset(p, syncrate, &new_offset, new_bus_width);
5967 aic7xxx_set_syncrate(p, syncrate, target, channel, new_period,
5968 new_offset, new_trans_options,
5969 AHC_TRANS_ACTIVE|AHC_TRANS_CUR);
5970 }
5971
5972 /*
5973 * As it turns out, if we don't *have* to have PPR messages, then
5974 * configure ourselves not to use them since that makes some
5975 * external drive chassis work (those chassis can't parse PPR
5976 * messages and they mangle the SCSI bus until you send a WDTR
5977 * and SDTR that they can understand).
5978 */
5979 if(new_trans_options == 0)
5980 {
5981 p->needppr &= ~target_mask;
5982 p->needppr_copy &= ~target_mask;
5983 if(new_offset)
5984 {
5985 p->needsdtr |= target_mask;
5986 p->needsdtr_copy |= target_mask;
5987 }
5988 if (new_bus_width)
5989 {
5990 p->needwdtr |= target_mask;
5991 p->needwdtr_copy |= target_mask;
5992 }
5993 }
5994
5995 if((new_offset == 0) && (offset != 0))
5996 {
5997 /*
5998 * Oops, the syncrate went to low for this card and we fell off
5999 * to async (should never happen with a device that uses PPR
6000 * messages, but have to be complete)
6001 */
6002 reply = TRUE;
6003 }
6004
6005 if(reply)
6006 {
6007 scb->flags &= ~SCB_MSGOUT_BITS;
6008 scb->flags |= SCB_MSGOUT_PPR;
6009 aic_outb(p, HOST_MSG, MSG_OUT);
6010 aic_outb(p, aic_inb(p, SCSISIGO) | ATNO, SCSISIGO);
6011 }
6012 else
6013 {
6014 p->needppr &= ~target_mask;
6015 }
6016 done = TRUE;
6017 break;
6018 }
6019 default:
6020 {
6021 reject = TRUE;
6022 break;
6023 }
6024 } /* end of switch(p->msg_type) */
6025 } /* end of if (!reject && (p->msg_len > 2)) */
6026
6027 if (!reply && reject)
6028 {
6029 aic_outb(p, MSG_MESSAGE_REJECT, MSG_OUT);
6030 aic_outb(p, aic_inb(p, SCSISIGO) | ATNO, SCSISIGO);
6031 done = TRUE;
6032 }
6033 return(done);
6034 }
6035
6036
6037 /*+F*************************************************************************
6038 * Function:
6039 * aic7xxx_handle_reqinit
6040 *
6041 * Description:
6042 * Interrupt handler for REQINIT interrupts (used to transfer messages to
6043 * and from devices).
6044 *_F*************************************************************************/
6045 static void
aic7xxx_handle_reqinit(struct aic7xxx_host * p,struct aic7xxx_scb * scb)6046 aic7xxx_handle_reqinit(struct aic7xxx_host *p, struct aic7xxx_scb *scb)
6047 {
6048 unsigned char lastbyte;
6049 unsigned char phasemis;
6050 int done = FALSE;
6051
6052 switch(p->msg_type)
6053 {
6054 case MSG_TYPE_INITIATOR_MSGOUT:
6055 {
6056 if (p->msg_len == 0)
6057 panic("aic7xxx: REQINIT with no active message!\n");
6058
6059 lastbyte = (p->msg_index == (p->msg_len - 1));
6060 phasemis = ( aic_inb(p, SCSISIGI) & PHASE_MASK) != P_MESGOUT;
6061
6062 if (lastbyte || phasemis)
6063 {
6064 /* Time to end the message */
6065 p->msg_len = 0;
6066 p->msg_type = MSG_TYPE_NONE;
6067 /*
6068 * NOTE-TO-MYSELF: If you clear the REQINIT after you
6069 * disable REQINITs, then cases of REJECT_MSG stop working
6070 * and hang the bus
6071 */
6072 aic_outb(p, aic_inb(p, SIMODE1) & ~ENREQINIT, SIMODE1);
6073 aic_outb(p, CLRSCSIINT, CLRINT);
6074 p->flags &= ~AHC_HANDLING_REQINITS;
6075
6076 if (phasemis == 0)
6077 {
6078 aic_outb(p, p->msg_buf[p->msg_index], SINDEX);
6079 aic_outb(p, 0, RETURN_1);
6080 #ifdef AIC7XXX_VERBOSE_DEBUGGING
6081 if (aic7xxx_verbose > 0xffff)
6082 printk(INFO_LEAD "Completed sending of REQINIT message.\n",
6083 p->host_no, CTL_OF_SCB(scb));
6084 #endif
6085 }
6086 else
6087 {
6088 aic_outb(p, MSGOUT_PHASEMIS, RETURN_1);
6089 #ifdef AIC7XXX_VERBOSE_DEBUGGING
6090 if (aic7xxx_verbose > 0xffff)
6091 printk(INFO_LEAD "PHASEMIS while sending REQINIT message.\n",
6092 p->host_no, CTL_OF_SCB(scb));
6093 #endif
6094 }
6095 unpause_sequencer(p, TRUE);
6096 }
6097 else
6098 {
6099 /*
6100 * Present the byte on the bus (clearing REQINIT) but don't
6101 * unpause the sequencer.
6102 */
6103 aic_outb(p, CLRREQINIT, CLRSINT1);
6104 aic_outb(p, CLRSCSIINT, CLRINT);
6105 aic_outb(p, p->msg_buf[p->msg_index++], SCSIDATL);
6106 }
6107 break;
6108 }
6109 case MSG_TYPE_INITIATOR_MSGIN:
6110 {
6111 phasemis = ( aic_inb(p, SCSISIGI) & PHASE_MASK ) != P_MESGIN;
6112
6113 if (phasemis == 0)
6114 {
6115 p->msg_len++;
6116 /* Pull the byte in without acking it */
6117 p->msg_buf[p->msg_index] = aic_inb(p, SCSIBUSL);
6118 done = aic7xxx_parse_msg(p, scb);
6119 /* Ack the byte */
6120 aic_outb(p, CLRREQINIT, CLRSINT1);
6121 aic_outb(p, CLRSCSIINT, CLRINT);
6122 aic_inb(p, SCSIDATL);
6123 p->msg_index++;
6124 }
6125 if (phasemis || done)
6126 {
6127 #ifdef AIC7XXX_VERBOSE_DEBUGGING
6128 if (aic7xxx_verbose > 0xffff)
6129 {
6130 if (phasemis)
6131 printk(INFO_LEAD "PHASEMIS while receiving REQINIT message.\n",
6132 p->host_no, CTL_OF_SCB(scb));
6133 else
6134 printk(INFO_LEAD "Completed receipt of REQINIT message.\n",
6135 p->host_no, CTL_OF_SCB(scb));
6136 }
6137 #endif
6138 /* Time to end our message session */
6139 p->msg_len = 0;
6140 p->msg_type = MSG_TYPE_NONE;
6141 aic_outb(p, aic_inb(p, SIMODE1) & ~ENREQINIT, SIMODE1);
6142 aic_outb(p, CLRSCSIINT, CLRINT);
6143 p->flags &= ~AHC_HANDLING_REQINITS;
6144 unpause_sequencer(p, TRUE);
6145 }
6146 break;
6147 }
6148 default:
6149 {
6150 panic("aic7xxx: Unknown REQINIT message type.\n");
6151 break;
6152 }
6153 } /* End of switch(p->msg_type) */
6154 }
6155
6156 /*+F*************************************************************************
6157 * Function:
6158 * aic7xxx_handle_scsiint
6159 *
6160 * Description:
6161 * Interrupt handler for SCSI interrupts (SCSIINT).
6162 *-F*************************************************************************/
6163 static void
aic7xxx_handle_scsiint(struct aic7xxx_host * p,unsigned char intstat)6164 aic7xxx_handle_scsiint(struct aic7xxx_host *p, unsigned char intstat)
6165 {
6166 unsigned char scb_index;
6167 unsigned char status;
6168 struct aic7xxx_scb *scb;
6169
6170 scb_index = aic_inb(p, SCB_TAG);
6171 status = aic_inb(p, SSTAT1);
6172
6173 if (scb_index < p->scb_data->numscbs)
6174 {
6175 scb = p->scb_data->scb_array[scb_index];
6176 if ((scb->flags & SCB_ACTIVE) == 0)
6177 {
6178 scb = NULL;
6179 }
6180 }
6181 else
6182 {
6183 scb = NULL;
6184 }
6185
6186
6187 if ((status & SCSIRSTI) != 0)
6188 {
6189 int channel;
6190
6191 if ( (p->chip & AHC_CHIPID_MASK) == AHC_AIC7770 )
6192 channel = (aic_inb(p, SBLKCTL) & SELBUSB) >> 3;
6193 else
6194 channel = 0;
6195
6196 if (aic7xxx_verbose & VERBOSE_RESET)
6197 printk(WARN_LEAD "Someone else reset the channel!!\n",
6198 p->host_no, channel, -1, -1);
6199 if (aic7xxx_panic_on_abort)
6200 aic7xxx_panic_abort(p, NULL);
6201 /*
6202 * Go through and abort all commands for the channel, but do not
6203 * reset the channel again.
6204 */
6205 aic7xxx_reset_channel(p, channel, /* Initiate Reset */ FALSE);
6206 aic7xxx_run_done_queue(p, TRUE);
6207 scb = NULL;
6208 }
6209 else if ( ((status & BUSFREE) != 0) && ((status & SELTO) == 0) )
6210 {
6211 /*
6212 * First look at what phase we were last in. If it's message-out,
6213 * chances are pretty good that the bus free was in response to
6214 * one of our abort requests.
6215 */
6216 unsigned char lastphase = aic_inb(p, LASTPHASE);
6217 unsigned char saved_tcl = aic_inb(p, SAVED_TCL);
6218 unsigned char target = (saved_tcl >> 4) & 0x0F;
6219 int channel;
6220 int printerror = TRUE;
6221
6222 if ( (p->chip & AHC_CHIPID_MASK) == AHC_AIC7770 )
6223 channel = (aic_inb(p, SBLKCTL) & SELBUSB) >> 3;
6224 else
6225 channel = 0;
6226
6227 aic_outb(p, aic_inb(p, SCSISEQ) & (ENSELI|ENRSELI|ENAUTOATNP),
6228 SCSISEQ);
6229 if (lastphase == P_MESGOUT)
6230 {
6231 unsigned char message;
6232
6233 message = aic_inb(p, SINDEX);
6234
6235 if ((message == MSG_ABORT) || (message == MSG_ABORT_TAG))
6236 {
6237 if (aic7xxx_verbose & VERBOSE_ABORT_PROCESS)
6238 printk(INFO_LEAD "SCB %d abort delivered.\n", p->host_no,
6239 CTL_OF_SCB(scb), scb->hscb->tag);
6240 aic7xxx_reset_device(p, target, channel, ALL_LUNS,
6241 (message == MSG_ABORT) ? SCB_LIST_NULL : scb->hscb->tag );
6242 aic7xxx_run_done_queue(p, TRUE);
6243 scb = NULL;
6244 printerror = 0;
6245 }
6246 else if (message == MSG_BUS_DEV_RESET)
6247 {
6248 aic7xxx_handle_device_reset(p, target, channel);
6249 scb = NULL;
6250 printerror = 0;
6251 }
6252 }
6253 if ( (scb != NULL) && (scb->flags & SCB_DTR_SCB) )
6254 {
6255 /*
6256 * Hmmm...error during a negotiation command. Either we have a
6257 * borken bus, or the device doesn't like our negotiation message.
6258 * Since we check the INQUIRY data of a device before sending it
6259 * negotiation messages, assume the bus is borken for whatever
6260 * reason. Complete the command.
6261 */
6262 printerror = 0;
6263 aic7xxx_reset_device(p, target, channel, ALL_LUNS, scb->hscb->tag);
6264 aic7xxx_run_done_queue(p, TRUE);
6265 scb = NULL;
6266 }
6267 if (printerror != 0)
6268 {
6269 if (scb != NULL)
6270 {
6271 unsigned char tag;
6272
6273 if ((scb->hscb->control & TAG_ENB) != 0)
6274 {
6275 tag = scb->hscb->tag;
6276 }
6277 else
6278 {
6279 tag = SCB_LIST_NULL;
6280 }
6281 aic7xxx_reset_device(p, target, channel, ALL_LUNS, tag);
6282 aic7xxx_run_done_queue(p, TRUE);
6283 }
6284 else
6285 {
6286 aic7xxx_reset_device(p, target, channel, ALL_LUNS, SCB_LIST_NULL);
6287 aic7xxx_run_done_queue(p, TRUE);
6288 }
6289 printk(INFO_LEAD "Unexpected busfree, LASTPHASE = 0x%x, "
6290 "SEQADDR = 0x%x\n", p->host_no, channel, target, -1, lastphase,
6291 (aic_inb(p, SEQADDR1) << 8) | aic_inb(p, SEQADDR0));
6292 scb = NULL;
6293 }
6294 aic_outb(p, MSG_NOOP, MSG_OUT);
6295 aic_outb(p, aic_inb(p, SIMODE1) & ~(ENBUSFREE|ENREQINIT),
6296 SIMODE1);
6297 p->flags &= ~AHC_HANDLING_REQINITS;
6298 aic_outb(p, CLRBUSFREE, CLRSINT1);
6299 aic_outb(p, CLRSCSIINT, CLRINT);
6300 restart_sequencer(p);
6301 unpause_sequencer(p, TRUE);
6302 }
6303 else if ((status & SELTO) != 0)
6304 {
6305 unsigned char scbptr;
6306 unsigned char nextscb;
6307 Scsi_Cmnd *cmd;
6308
6309 scbptr = aic_inb(p, WAITING_SCBH);
6310 if (scbptr > p->scb_data->maxhscbs)
6311 {
6312 /*
6313 * I'm still trying to track down exactly how this happens, but until
6314 * I find it, this code will make sure we aren't passing bogus values
6315 * into the SCBPTR register, even if that register will just wrap
6316 * things around, we still don't like having out of range variables.
6317 *
6318 * NOTE: Don't check the aic7xxx_verbose variable, I want this message
6319 * to always be displayed.
6320 */
6321 printk(INFO_LEAD "Invalid WAITING_SCBH value %d, improvising.\n",
6322 p->host_no, -1, -1, -1, scbptr);
6323 if (p->scb_data->maxhscbs > 4)
6324 scbptr &= (p->scb_data->maxhscbs - 1);
6325 else
6326 scbptr &= 0x03;
6327 }
6328 aic_outb(p, scbptr, SCBPTR);
6329 scb_index = aic_inb(p, SCB_TAG);
6330
6331 scb = NULL;
6332 if (scb_index < p->scb_data->numscbs)
6333 {
6334 scb = p->scb_data->scb_array[scb_index];
6335 if ((scb->flags & SCB_ACTIVE) == 0)
6336 {
6337 scb = NULL;
6338 }
6339 }
6340 if (scb == NULL)
6341 {
6342 printk(WARN_LEAD "Referenced SCB %d not valid during SELTO.\n",
6343 p->host_no, -1, -1, -1, scb_index);
6344 printk(KERN_WARNING " SCSISEQ = 0x%x SEQADDR = 0x%x SSTAT0 = 0x%x "
6345 "SSTAT1 = 0x%x\n", aic_inb(p, SCSISEQ),
6346 aic_inb(p, SEQADDR0) | (aic_inb(p, SEQADDR1) << 8),
6347 aic_inb(p, SSTAT0), aic_inb(p, SSTAT1));
6348 if (aic7xxx_panic_on_abort)
6349 aic7xxx_panic_abort(p, NULL);
6350 }
6351 else
6352 {
6353 cmd = scb->cmd;
6354 cmd->result = (DID_TIME_OUT << 16);
6355
6356 /*
6357 * Clear out this hardware SCB
6358 */
6359 aic_outb(p, 0, SCB_CONTROL);
6360
6361 /*
6362 * Clear out a few values in the card that are in an undetermined
6363 * state.
6364 */
6365 aic_outb(p, MSG_NOOP, MSG_OUT);
6366
6367 /*
6368 * Shift the waiting for selection queue forward
6369 */
6370 nextscb = aic_inb(p, SCB_NEXT);
6371 aic_outb(p, nextscb, WAITING_SCBH);
6372
6373 /*
6374 * Put this SCB back on the free list.
6375 */
6376 aic7xxx_add_curscb_to_free_list(p);
6377 #ifdef AIC7XXX_VERBOSE_DEBUGGING
6378 if (aic7xxx_verbose > 0xffff)
6379 printk(INFO_LEAD "Selection Timeout.\n", p->host_no, CTL_OF_SCB(scb));
6380 #endif
6381 if (scb->flags & SCB_QUEUED_ABORT)
6382 {
6383 /*
6384 * We know that this particular SCB had to be the queued abort since
6385 * the disconnected SCB would have gotten a reconnect instead.
6386 * What we need to do then is to let the command timeout again so
6387 * we get a reset since this abort just failed.
6388 */
6389 cmd->result = 0;
6390 scb = NULL;
6391 }
6392 }
6393 /*
6394 * Keep the sequencer from trying to restart any selections
6395 */
6396 aic_outb(p, aic_inb(p, SCSISEQ) & ~ENSELO, SCSISEQ);
6397 /*
6398 * Make sure the data bits on the bus are released
6399 * Don't do this on 7770 chipsets, it makes them give us
6400 * a BRKADDRINT and kills the card.
6401 */
6402 if( (p->chip & ~AHC_CHIPID_MASK) == AHC_PCI )
6403 aic_outb(p, 0, SCSIBUSL);
6404
6405 /*
6406 * Delay for the selection timeout delay period then stop the selection
6407 */
6408 udelay(301);
6409 aic_outb(p, CLRSELINGO, CLRSINT0);
6410 /*
6411 * Clear out all the interrupt status bits
6412 */
6413 aic_outb(p, aic_inb(p, SIMODE1) & ~(ENREQINIT|ENBUSFREE), SIMODE1);
6414 p->flags &= ~AHC_HANDLING_REQINITS;
6415 aic_outb(p, CLRSELTIMEO | CLRBUSFREE, CLRSINT1);
6416 aic_outb(p, CLRSCSIINT, CLRINT);
6417 /*
6418 * Restarting the sequencer will stop the selection and make sure devices
6419 * are allowed to reselect in.
6420 */
6421 restart_sequencer(p);
6422 unpause_sequencer(p, TRUE);
6423 }
6424 else if (scb == NULL)
6425 {
6426 printk(WARN_LEAD "aic7xxx_isr - referenced scb not valid "
6427 "during scsiint 0x%x scb(%d)\n"
6428 " SIMODE0 0x%x, SIMODE1 0x%x, SSTAT0 0x%x, SEQADDR 0x%x\n",
6429 p->host_no, -1, -1, -1, status, scb_index, aic_inb(p, SIMODE0),
6430 aic_inb(p, SIMODE1), aic_inb(p, SSTAT0),
6431 (aic_inb(p, SEQADDR1) << 8) | aic_inb(p, SEQADDR0));
6432 /*
6433 * Turn off the interrupt and set status to zero, so that it
6434 * falls through the rest of the SCSIINT code.
6435 */
6436 aic_outb(p, status, CLRSINT1);
6437 aic_outb(p, CLRSCSIINT, CLRINT);
6438 unpause_sequencer(p, /* unpause always */ TRUE);
6439 scb = NULL;
6440 }
6441 else if (status & SCSIPERR)
6442 {
6443 /*
6444 * Determine the bus phase and queue an appropriate message.
6445 */
6446 char *phase;
6447 Scsi_Cmnd *cmd;
6448 unsigned char mesg_out = MSG_NOOP;
6449 unsigned char lastphase = aic_inb(p, LASTPHASE);
6450 unsigned char sstat2 = aic_inb(p, SSTAT2);
6451 unsigned char tindex = TARGET_INDEX(scb->cmd);
6452
6453 cmd = scb->cmd;
6454 switch (lastphase)
6455 {
6456 case P_DATAOUT:
6457 phase = "Data-Out";
6458 break;
6459 case P_DATAIN:
6460 phase = "Data-In";
6461 mesg_out = MSG_INITIATOR_DET_ERR;
6462 break;
6463 case P_COMMAND:
6464 phase = "Command";
6465 break;
6466 case P_MESGOUT:
6467 phase = "Message-Out";
6468 break;
6469 case P_STATUS:
6470 phase = "Status";
6471 mesg_out = MSG_INITIATOR_DET_ERR;
6472 break;
6473 case P_MESGIN:
6474 phase = "Message-In";
6475 mesg_out = MSG_PARITY_ERROR;
6476 break;
6477 default:
6478 phase = "unknown";
6479 break;
6480 }
6481
6482 /*
6483 * A parity error has occurred during a data
6484 * transfer phase. Flag it and continue.
6485 */
6486 if( (p->features & AHC_ULTRA3) &&
6487 (aic_inb(p, SCSIRATE) & AHC_SYNCRATE_CRC) &&
6488 (lastphase == P_DATAIN) )
6489 {
6490 printk(WARN_LEAD "CRC error during %s phase.\n",
6491 p->host_no, CTL_OF_SCB(scb), phase);
6492 if(sstat2 & CRCVALERR)
6493 {
6494 printk(WARN_LEAD " CRC error in intermediate CRC packet.\n",
6495 p->host_no, CTL_OF_SCB(scb));
6496 }
6497 if(sstat2 & CRCENDERR)
6498 {
6499 printk(WARN_LEAD " CRC error in ending CRC packet.\n",
6500 p->host_no, CTL_OF_SCB(scb));
6501 }
6502 if(sstat2 & CRCREQERR)
6503 {
6504 printk(WARN_LEAD " Target incorrectly requested a CRC packet.\n",
6505 p->host_no, CTL_OF_SCB(scb));
6506 }
6507 if(sstat2 & DUAL_EDGE_ERROR)
6508 {
6509 printk(WARN_LEAD " Dual Edge transmission error.\n",
6510 p->host_no, CTL_OF_SCB(scb));
6511 }
6512 }
6513 else if( (lastphase == P_MESGOUT) &&
6514 (scb->flags & SCB_MSGOUT_PPR) )
6515 {
6516 /*
6517 * As per the draft specs, any device capable of supporting any of
6518 * the option values other than 0 are not allowed to reject the
6519 * PPR message. Instead, they must negotiate out what they do
6520 * support instead of rejecting our offering or else they cause
6521 * a parity error during msg_out phase to signal that they don't
6522 * like our settings.
6523 */
6524 p->needppr &= ~(1 << tindex);
6525 p->needppr_copy &= ~(1 << tindex);
6526 aic7xxx_set_width(p, scb->cmd->target, scb->cmd->channel, scb->cmd->lun,
6527 MSG_EXT_WDTR_BUS_8_BIT,
6528 (AHC_TRANS_ACTIVE|AHC_TRANS_CUR|AHC_TRANS_QUITE));
6529 aic7xxx_set_syncrate(p, NULL, scb->cmd->target, scb->cmd->channel, 0, 0,
6530 0, AHC_TRANS_ACTIVE|AHC_TRANS_CUR|AHC_TRANS_QUITE);
6531 p->transinfo[tindex].goal_options = 0;
6532 scb->flags &= ~SCB_MSGOUT_BITS;
6533 if(aic7xxx_verbose & VERBOSE_NEGOTIATION2)
6534 {
6535 printk(INFO_LEAD "parity error during PPR message, reverting "
6536 "to WDTR/SDTR\n", p->host_no, CTL_OF_SCB(scb));
6537 }
6538 if ( p->transinfo[tindex].goal_width )
6539 {
6540 p->needwdtr |= (1 << tindex);
6541 p->needwdtr_copy |= (1 << tindex);
6542 }
6543 if ( p->transinfo[tindex].goal_offset )
6544 {
6545 if( p->transinfo[tindex].goal_period <= 9 )
6546 {
6547 p->transinfo[tindex].goal_period = 10;
6548 }
6549 p->needsdtr |= (1 << tindex);
6550 p->needsdtr_copy |= (1 << tindex);
6551 }
6552 scb = NULL;
6553 }
6554
6555 /*
6556 * We've set the hardware to assert ATN if we get a parity
6557 * error on "in" phases, so all we need to do is stuff the
6558 * message buffer with the appropriate message. "In" phases
6559 * have set mesg_out to something other than MSG_NOP.
6560 */
6561 if (mesg_out != MSG_NOOP)
6562 {
6563 aic_outb(p, mesg_out, MSG_OUT);
6564 aic_outb(p, aic_inb(p, SCSISIGI) | ATNO, SCSISIGO);
6565 scb = NULL;
6566 }
6567 aic_outb(p, CLRSCSIPERR, CLRSINT1);
6568 aic_outb(p, CLRSCSIINT, CLRINT);
6569 unpause_sequencer(p, /* unpause_always */ TRUE);
6570 }
6571 else if ( (status & REQINIT) &&
6572 (p->flags & AHC_HANDLING_REQINITS) )
6573 {
6574 #ifdef AIC7XXX_VERBOSE_DEBUGGING
6575 if (aic7xxx_verbose > 0xffff)
6576 printk(INFO_LEAD "Handling REQINIT, SSTAT1=0x%x.\n", p->host_no,
6577 CTL_OF_SCB(scb), aic_inb(p, SSTAT1));
6578 #endif
6579 aic7xxx_handle_reqinit(p, scb);
6580 return;
6581 }
6582 else
6583 {
6584 /*
6585 * We don't know what's going on. Turn off the
6586 * interrupt source and try to continue.
6587 */
6588 if (aic7xxx_verbose & VERBOSE_SCSIINT)
6589 printk(INFO_LEAD "Unknown SCSIINT status, SSTAT1(0x%x).\n",
6590 p->host_no, -1, -1, -1, status);
6591 aic_outb(p, status, CLRSINT1);
6592 aic_outb(p, CLRSCSIINT, CLRINT);
6593 unpause_sequencer(p, /* unpause always */ TRUE);
6594 scb = NULL;
6595 }
6596 if (scb != NULL)
6597 {
6598 aic7xxx_done(p, scb);
6599 }
6600 }
6601
6602 #ifdef AIC7XXX_VERBOSE_DEBUGGING
6603 static void
aic7xxx_check_scbs(struct aic7xxx_host * p,char * buffer)6604 aic7xxx_check_scbs(struct aic7xxx_host *p, char *buffer)
6605 {
6606 unsigned char saved_scbptr, free_scbh, dis_scbh, wait_scbh, temp;
6607 int i, bogus, lost;
6608 static unsigned char scb_status[AIC7XXX_MAXSCB];
6609
6610 #define SCB_NO_LIST 0
6611 #define SCB_FREE_LIST 1
6612 #define SCB_WAITING_LIST 2
6613 #define SCB_DISCONNECTED_LIST 4
6614 #define SCB_CURRENTLY_ACTIVE 8
6615
6616 /*
6617 * Note, these checks will fail on a regular basis once the machine moves
6618 * beyond the bus scan phase. The problem is race conditions concerning
6619 * the scbs and where they are linked in. When you have 30 or so commands
6620 * outstanding on the bus, and run this twice with every interrupt, the
6621 * chances get pretty good that you'll catch the sequencer with an SCB
6622 * only partially linked in. Therefore, once we pass the scan phase
6623 * of the bus, we really should disable this function.
6624 */
6625 bogus = FALSE;
6626 memset(&scb_status[0], 0, sizeof(scb_status));
6627 pause_sequencer(p);
6628 saved_scbptr = aic_inb(p, SCBPTR);
6629 if (saved_scbptr >= p->scb_data->maxhscbs)
6630 {
6631 printk("Bogus SCBPTR %d\n", saved_scbptr);
6632 bogus = TRUE;
6633 }
6634 scb_status[saved_scbptr] = SCB_CURRENTLY_ACTIVE;
6635 free_scbh = aic_inb(p, FREE_SCBH);
6636 if ( (free_scbh != SCB_LIST_NULL) &&
6637 (free_scbh >= p->scb_data->maxhscbs) )
6638 {
6639 printk("Bogus FREE_SCBH %d\n", free_scbh);
6640 bogus = TRUE;
6641 }
6642 else
6643 {
6644 temp = free_scbh;
6645 while( (temp != SCB_LIST_NULL) && (temp < p->scb_data->maxhscbs) )
6646 {
6647 if(scb_status[temp] & 0x07)
6648 {
6649 printk("HSCB %d on multiple lists, status 0x%02x", temp,
6650 scb_status[temp] | SCB_FREE_LIST);
6651 bogus = TRUE;
6652 }
6653 scb_status[temp] |= SCB_FREE_LIST;
6654 aic_outb(p, temp, SCBPTR);
6655 temp = aic_inb(p, SCB_NEXT);
6656 }
6657 }
6658
6659 dis_scbh = aic_inb(p, DISCONNECTED_SCBH);
6660 if ( (dis_scbh != SCB_LIST_NULL) &&
6661 (dis_scbh >= p->scb_data->maxhscbs) )
6662 {
6663 printk("Bogus DISCONNECTED_SCBH %d\n", dis_scbh);
6664 bogus = TRUE;
6665 }
6666 else
6667 {
6668 temp = dis_scbh;
6669 while( (temp != SCB_LIST_NULL) && (temp < p->scb_data->maxhscbs) )
6670 {
6671 if(scb_status[temp] & 0x07)
6672 {
6673 printk("HSCB %d on multiple lists, status 0x%02x", temp,
6674 scb_status[temp] | SCB_DISCONNECTED_LIST);
6675 bogus = TRUE;
6676 }
6677 scb_status[temp] |= SCB_DISCONNECTED_LIST;
6678 aic_outb(p, temp, SCBPTR);
6679 temp = aic_inb(p, SCB_NEXT);
6680 }
6681 }
6682
6683 wait_scbh = aic_inb(p, WAITING_SCBH);
6684 if ( (wait_scbh != SCB_LIST_NULL) &&
6685 (wait_scbh >= p->scb_data->maxhscbs) )
6686 {
6687 printk("Bogus WAITING_SCBH %d\n", wait_scbh);
6688 bogus = TRUE;
6689 }
6690 else
6691 {
6692 temp = wait_scbh;
6693 while( (temp != SCB_LIST_NULL) && (temp < p->scb_data->maxhscbs) )
6694 {
6695 if(scb_status[temp] & 0x07)
6696 {
6697 printk("HSCB %d on multiple lists, status 0x%02x", temp,
6698 scb_status[temp] | SCB_WAITING_LIST);
6699 bogus = TRUE;
6700 }
6701 scb_status[temp] |= SCB_WAITING_LIST;
6702 aic_outb(p, temp, SCBPTR);
6703 temp = aic_inb(p, SCB_NEXT);
6704 }
6705 }
6706
6707 lost=0;
6708 for(i=0; i < p->scb_data->maxhscbs; i++)
6709 {
6710 aic_outb(p, i, SCBPTR);
6711 temp = aic_inb(p, SCB_NEXT);
6712 if ( ((temp != SCB_LIST_NULL) &&
6713 (temp >= p->scb_data->maxhscbs)) )
6714 {
6715 printk("HSCB %d bad, SCB_NEXT invalid(%d).\n", i, temp);
6716 bogus = TRUE;
6717 }
6718 if ( temp == i )
6719 {
6720 printk("HSCB %d bad, SCB_NEXT points to self.\n", i);
6721 bogus = TRUE;
6722 }
6723 if (scb_status[i] == 0)
6724 lost++;
6725 if (lost > 1)
6726 {
6727 printk("Too many lost scbs.\n");
6728 bogus=TRUE;
6729 }
6730 }
6731 aic_outb(p, saved_scbptr, SCBPTR);
6732 unpause_sequencer(p, FALSE);
6733 if (bogus)
6734 {
6735 printk("Bogus parameters found in card SCB array structures.\n");
6736 printk("%s\n", buffer);
6737 aic7xxx_panic_abort(p, NULL);
6738 }
6739 return;
6740 }
6741 #endif
6742
6743
6744 /*+F*************************************************************************
6745 * Function:
6746 * aic7xxx_handle_command_completion_intr
6747 *
6748 * Description:
6749 * SCSI command completion interrupt handler.
6750 *-F*************************************************************************/
6751 static void
aic7xxx_handle_command_completion_intr(struct aic7xxx_host * p)6752 aic7xxx_handle_command_completion_intr(struct aic7xxx_host *p)
6753 {
6754 struct aic7xxx_scb *scb = NULL;
6755 Scsi_Cmnd *cmd;
6756 unsigned char scb_index, tindex;
6757
6758 #ifdef AIC7XXX_VERBOSE_DEBUGGING
6759 if( (p->isr_count < 16) && (aic7xxx_verbose > 0xffff) )
6760 printk(INFO_LEAD "Command Complete Int.\n", p->host_no, -1, -1, -1);
6761 #endif
6762
6763 /*
6764 * Read the INTSTAT location after clearing the CMDINT bit. This forces
6765 * any posted PCI writes to flush to memory. Gerard Roudier suggested
6766 * this fix to the possible race of clearing the CMDINT bit but not
6767 * having all command bytes flushed onto the qoutfifo.
6768 */
6769 aic_outb(p, CLRCMDINT, CLRINT);
6770 aic_inb(p, INTSTAT);
6771 /*
6772 * The sequencer will continue running when it
6773 * issues this interrupt. There may be >1 commands
6774 * finished, so loop until we've processed them all.
6775 */
6776
6777 while (p->qoutfifo[p->qoutfifonext] != SCB_LIST_NULL)
6778 {
6779 scb_index = p->qoutfifo[p->qoutfifonext];
6780 p->qoutfifo[p->qoutfifonext++] = SCB_LIST_NULL;
6781 if ( scb_index >= p->scb_data->numscbs )
6782 {
6783 printk(WARN_LEAD "CMDCMPLT with invalid SCB index %d\n", p->host_no,
6784 -1, -1, -1, scb_index);
6785 continue;
6786 }
6787 scb = p->scb_data->scb_array[scb_index];
6788 if (!(scb->flags & SCB_ACTIVE) || (scb->cmd == NULL))
6789 {
6790 printk(WARN_LEAD "CMDCMPLT without command for SCB %d, SCB flags "
6791 "0x%x, cmd 0x%lx\n", p->host_no, -1, -1, -1, scb_index, scb->flags,
6792 (unsigned long) scb->cmd);
6793 continue;
6794 }
6795 tindex = TARGET_INDEX(scb->cmd);
6796 if (scb->flags & SCB_QUEUED_ABORT)
6797 {
6798 pause_sequencer(p);
6799 if ( ((aic_inb(p, LASTPHASE) & PHASE_MASK) != P_BUSFREE) &&
6800 (aic_inb(p, SCB_TAG) == scb->hscb->tag) )
6801 {
6802 unpause_sequencer(p, FALSE);
6803 continue;
6804 }
6805 aic7xxx_reset_device(p, scb->cmd->target, scb->cmd->channel,
6806 scb->cmd->lun, scb->hscb->tag);
6807 scb->flags &= ~(SCB_QUEUED_FOR_DONE | SCB_RESET | SCB_ABORT |
6808 SCB_QUEUED_ABORT);
6809 unpause_sequencer(p, FALSE);
6810 }
6811 else if (scb->flags & SCB_ABORT)
6812 {
6813 /*
6814 * We started to abort this, but it completed on us, let it
6815 * through as successful
6816 */
6817 scb->flags &= ~(SCB_ABORT|SCB_RESET);
6818 }
6819 else if (scb->flags & SCB_SENSE)
6820 {
6821 char *buffer = &scb->cmd->sense_buffer[0];
6822
6823 if (buffer[12] == 0x47 || buffer[12] == 0x54)
6824 {
6825 /*
6826 * Signal that we need to re-negotiate things.
6827 */
6828 p->needppr |= (p->needppr_copy & (1<<tindex));
6829 p->needsdtr |= (p->needsdtr_copy & (1<<tindex));
6830 p->needwdtr |= (p->needwdtr_copy & (1<<tindex));
6831 }
6832 }
6833 switch (status_byte(scb->hscb->target_status))
6834 {
6835 case QUEUE_FULL:
6836 case BUSY:
6837 scb->hscb->target_status = 0;
6838 scb->cmd->result = 0;
6839 scb->hscb->residual_SG_segment_count = 0;
6840 scb->hscb->residual_data_count[0] = 0;
6841 scb->hscb->residual_data_count[1] = 0;
6842 scb->hscb->residual_data_count[2] = 0;
6843 aic7xxx_error(scb->cmd) = DID_OK;
6844 aic7xxx_status(scb->cmd) = 0;
6845 /*
6846 * The QUEUE_FULL/BUSY handler in aic7xxx_seqint takes care of putting
6847 * this command on a timer and allowing us to retry it. Here, we
6848 * just 0 out a few values so that they don't carry through to when
6849 * the command finally does complete.
6850 */
6851 break;
6852 default:
6853 cmd = scb->cmd;
6854 if (scb->hscb->residual_SG_segment_count != 0)
6855 {
6856 aic7xxx_calculate_residual(p, scb);
6857 }
6858 cmd->result |= (aic7xxx_error(cmd) << 16);
6859 aic7xxx_done(p, scb);
6860 break;
6861 }
6862 }
6863 }
6864
6865 /*+F*************************************************************************
6866 * Function:
6867 * aic7xxx_isr
6868 *
6869 * Description:
6870 * SCSI controller interrupt handler.
6871 *-F*************************************************************************/
6872 static void
aic7xxx_isr(int irq,void * dev_id,struct pt_regs * regs)6873 aic7xxx_isr(int irq, void *dev_id, struct pt_regs *regs)
6874 {
6875 struct aic7xxx_host *p;
6876 unsigned char intstat;
6877
6878 p = (struct aic7xxx_host *)dev_id;
6879
6880 /*
6881 * Just a few sanity checks. Make sure that we have an int pending.
6882 * Also, if PCI, then we are going to check for a PCI bus error status
6883 * should we get too many spurious interrupts.
6884 */
6885 if (!((intstat = aic_inb(p, INTSTAT)) & INT_PEND))
6886 {
6887 #ifdef CONFIG_PCI
6888 if ( (p->chip & AHC_PCI) && (p->spurious_int > 500) &&
6889 !(p->flags & AHC_HANDLING_REQINITS) )
6890 {
6891 if ( aic_inb(p, ERROR) & PCIERRSTAT )
6892 {
6893 aic7xxx_pci_intr(p);
6894 }
6895 p->spurious_int = 0;
6896 }
6897 else if ( !(p->flags & AHC_HANDLING_REQINITS) )
6898 {
6899 p->spurious_int++;
6900 }
6901 #endif
6902 return;
6903 }
6904
6905 p->spurious_int = 0;
6906
6907 /*
6908 * Keep track of interrupts for /proc/scsi
6909 */
6910 p->isr_count++;
6911
6912 #ifdef AIC7XXX_VERBOSE_DEBUGGING
6913 if ( (p->isr_count < 16) && (aic7xxx_verbose > 0xffff) &&
6914 (aic7xxx_panic_on_abort) && (p->flags & AHC_PAGESCBS) )
6915 aic7xxx_check_scbs(p, "Bogus settings at start of interrupt.");
6916 #endif
6917
6918 /*
6919 * Handle all the interrupt sources - especially for SCSI
6920 * interrupts, we won't get a second chance at them.
6921 */
6922 if (intstat & CMDCMPLT)
6923 {
6924 aic7xxx_handle_command_completion_intr(p);
6925 }
6926
6927 if (intstat & BRKADRINT)
6928 {
6929 int i;
6930 unsigned char errno = aic_inb(p, ERROR);
6931
6932 printk(KERN_ERR "(scsi%d) BRKADRINT error(0x%x):\n", p->host_no, errno);
6933 for (i = 0; i < NUMBER(hard_error); i++)
6934 {
6935 if (errno & hard_error[i].errno)
6936 {
6937 printk(KERN_ERR " %s\n", hard_error[i].errmesg);
6938 }
6939 }
6940 printk(KERN_ERR "(scsi%d) SEQADDR=0x%x\n", p->host_no,
6941 (((aic_inb(p, SEQADDR1) << 8) & 0x100) | aic_inb(p, SEQADDR0)));
6942 if (aic7xxx_panic_on_abort)
6943 aic7xxx_panic_abort(p, NULL);
6944 #ifdef CONFIG_PCI
6945 if (errno & PCIERRSTAT)
6946 aic7xxx_pci_intr(p);
6947 #endif
6948 if (errno & (SQPARERR | ILLOPCODE | ILLSADDR))
6949 {
6950 sti();
6951 panic("aic7xxx: unrecoverable BRKADRINT.\n");
6952 }
6953 if (errno & ILLHADDR)
6954 {
6955 printk(KERN_ERR "(scsi%d) BUG! Driver accessed chip without first "
6956 "pausing controller!\n", p->host_no);
6957 }
6958 #ifdef AIC7XXX_VERBOSE_DEBUGGING
6959 if (errno & DPARERR)
6960 {
6961 if (aic_inb(p, DMAPARAMS) & DIRECTION)
6962 printk("(scsi%d) while DMAing SCB from host to card.\n", p->host_no);
6963 else
6964 printk("(scsi%d) while DMAing SCB from card to host.\n", p->host_no);
6965 }
6966 #endif
6967 aic_outb(p, CLRPARERR | CLRBRKADRINT, CLRINT);
6968 unpause_sequencer(p, FALSE);
6969 }
6970
6971 if (intstat & SEQINT)
6972 {
6973 /*
6974 * Read the CCSCBCTL register to work around a bug in the Ultra2 cards
6975 */
6976 if(p->features & AHC_ULTRA2)
6977 {
6978 aic_inb(p, CCSCBCTL);
6979 }
6980 aic7xxx_handle_seqint(p, intstat);
6981 }
6982
6983 if (intstat & SCSIINT)
6984 {
6985 aic7xxx_handle_scsiint(p, intstat);
6986 }
6987
6988 #ifdef AIC7XXX_VERBOSE_DEBUGGING
6989 if ( (p->isr_count < 16) && (aic7xxx_verbose > 0xffff) &&
6990 (aic7xxx_panic_on_abort) && (p->flags & AHC_PAGESCBS) )
6991 aic7xxx_check_scbs(p, "Bogus settings at end of interrupt.");
6992 #endif
6993
6994 }
6995
6996 /*+F*************************************************************************
6997 * Function:
6998 * do_aic7xxx_isr
6999 *
7000 * Description:
7001 * This is a gross hack to solve a problem in linux kernels 2.1.85 and
7002 * above. Please, children, do not try this at home, and if you ever see
7003 * anything like it, please inform the Gross Hack Police immediately
7004 *-F*************************************************************************/
7005 static void
do_aic7xxx_isr(int irq,void * dev_id,struct pt_regs * regs)7006 do_aic7xxx_isr(int irq, void *dev_id, struct pt_regs *regs)
7007 {
7008 unsigned long cpu_flags;
7009 struct aic7xxx_host *p;
7010
7011 p = (struct aic7xxx_host *)dev_id;
7012 if(!p)
7013 return;
7014 spin_lock_irqsave(&io_request_lock, cpu_flags);
7015 p->flags |= AHC_IN_ISR;
7016 do
7017 {
7018 aic7xxx_isr(irq, dev_id, regs);
7019 } while ( (aic_inb(p, INTSTAT) & INT_PEND) );
7020 aic7xxx_done_cmds_complete(p);
7021 aic7xxx_run_waiting_queues(p);
7022 p->flags &= ~AHC_IN_ISR;
7023 spin_unlock_irqrestore(&io_request_lock, cpu_flags);
7024 }
7025
7026 /*+F*************************************************************************
7027 * Function:
7028 * aic7xxx_device_queue_depth
7029 *
7030 * Description:
7031 * Determines the queue depth for a given device. There are two ways
7032 * a queue depth can be obtained for a tagged queueing device. One
7033 * way is the default queue depth which is determined by whether
7034 * AIC7XXX_CMDS_PER_DEVICE is defined. If it is defined, then it is used
7035 * as the default queue depth. Otherwise, we use either 4 or 8 as the
7036 * default queue depth (dependent on the number of hardware SCBs).
7037 * The other way we determine queue depth is through the use of the
7038 * aic7xxx_tag_info array which is enabled by defining
7039 * AIC7XXX_TAGGED_QUEUEING_BY_DEVICE. This array can be initialized
7040 * with queue depths for individual devices. It also allows tagged
7041 * queueing to be [en|dis]abled for a specific adapter.
7042 *-F*************************************************************************/
7043 static int
aic7xxx_device_queue_depth(struct aic7xxx_host * p,Scsi_Device * device)7044 aic7xxx_device_queue_depth(struct aic7xxx_host *p, Scsi_Device *device)
7045 {
7046 int default_depth = 3;
7047 unsigned char tindex;
7048 unsigned short target_mask;
7049
7050 tindex = device->id | (device->channel << 3);
7051 target_mask = (1 << tindex);
7052
7053 if (p->dev_max_queue_depth[tindex] > 1)
7054 {
7055 /*
7056 * We've already scanned this device, leave it alone
7057 */
7058 return(p->dev_max_queue_depth[tindex]);
7059 }
7060
7061 device->queue_depth = default_depth;
7062 p->dev_temp_queue_depth[tindex] = 1;
7063 p->dev_max_queue_depth[tindex] = 1;
7064 p->tagenable &= ~target_mask;
7065
7066 if (device->tagged_supported)
7067 {
7068 int tag_enabled = TRUE;
7069
7070 default_depth = AIC7XXX_CMDS_PER_DEVICE;
7071
7072 if (!(p->discenable & target_mask))
7073 {
7074 if (aic7xxx_verbose & VERBOSE_NEGOTIATION2)
7075 printk(INFO_LEAD "Disconnection disabled, unable to "
7076 "enable tagged queueing.\n",
7077 p->host_no, device->channel, device->id, device->lun);
7078 }
7079 else
7080 {
7081 if (p->instance >= NUMBER(aic7xxx_tag_info))
7082 {
7083 static int print_warning = TRUE;
7084 if(print_warning)
7085 {
7086 printk(KERN_INFO "aic7xxx: WARNING, insufficient tag_info instances for"
7087 " installed controllers.\n");
7088 printk(KERN_INFO "aic7xxx: Please update the aic7xxx_tag_info array in"
7089 " the aic7xxx.c source file.\n");
7090 print_warning = FALSE;
7091 }
7092 device->queue_depth = default_depth;
7093 }
7094 else
7095 {
7096
7097 if (aic7xxx_tag_info[p->instance].tag_commands[tindex] == 255)
7098 {
7099 tag_enabled = FALSE;
7100 device->queue_depth = 3; /* Tagged queueing is disabled. */
7101 }
7102 else if (aic7xxx_tag_info[p->instance].tag_commands[tindex] == 0)
7103 {
7104 device->queue_depth = default_depth;
7105 }
7106 else
7107 {
7108 device->queue_depth =
7109 aic7xxx_tag_info[p->instance].tag_commands[tindex];
7110 }
7111 }
7112 if ((device->tagged_queue == 0) && tag_enabled)
7113 {
7114 if (aic7xxx_verbose & VERBOSE_NEGOTIATION2)
7115 {
7116 printk(INFO_LEAD "Enabled tagged queuing, queue depth %d.\n",
7117 p->host_no, device->channel, device->id,
7118 device->lun, device->queue_depth);
7119 }
7120 p->dev_max_queue_depth[tindex] = device->queue_depth;
7121 p->dev_temp_queue_depth[tindex] = device->queue_depth;
7122 p->tagenable |= target_mask;
7123 p->orderedtag |= target_mask;
7124 device->tagged_queue = 1;
7125 device->current_tag = SCB_LIST_NULL;
7126 }
7127 }
7128 }
7129 return(p->dev_max_queue_depth[tindex]);
7130 }
7131
7132 /*+F*************************************************************************
7133 * Function:
7134 * aic7xxx_select_queue_depth
7135 *
7136 * Description:
7137 * Sets the queue depth for each SCSI device hanging off the input
7138 * host adapter. We use a queue depth of 2 for devices that do not
7139 * support tagged queueing. If AIC7XXX_CMDS_PER_LUN is defined, we
7140 * use that for tagged queueing devices; otherwise we use our own
7141 * algorithm for determining the queue depth based on the maximum
7142 * SCBs for the controller.
7143 *-F*************************************************************************/
7144 static void
aic7xxx_select_queue_depth(struct Scsi_Host * host,Scsi_Device * scsi_devs)7145 aic7xxx_select_queue_depth(struct Scsi_Host *host,
7146 Scsi_Device *scsi_devs)
7147 {
7148 Scsi_Device *device;
7149 struct aic7xxx_host *p = (struct aic7xxx_host *) host->hostdata;
7150 int scbnum;
7151
7152 scbnum = 0;
7153 for (device = scsi_devs; device != NULL; device = device->next)
7154 {
7155 if (device->host == host)
7156 {
7157 scbnum += aic7xxx_device_queue_depth(p, device);
7158 }
7159 }
7160 while (scbnum > p->scb_data->numscbs)
7161 {
7162 /*
7163 * Pre-allocate the needed SCBs to get around the possibility of having
7164 * to allocate some when memory is more or less exhausted and we need
7165 * the SCB in order to perform a swap operation (possible deadlock)
7166 */
7167 if ( aic7xxx_allocate_scb(p) == 0 )
7168 return;
7169 }
7170 }
7171
7172 /*+F*************************************************************************
7173 * Function:
7174 * aic7xxx_probe
7175 *
7176 * Description:
7177 * Probing for EISA boards: it looks like the first two bytes
7178 * are a manufacturer code - three characters, five bits each:
7179 *
7180 * BYTE 0 BYTE 1 BYTE 2 BYTE 3
7181 * ?1111122 22233333 PPPPPPPP RRRRRRRR
7182 *
7183 * The characters are baselined off ASCII '@', so add that value
7184 * to each to get the real ASCII code for it. The next two bytes
7185 * appear to be a product and revision number, probably vendor-
7186 * specific. This is what is being searched for at each port,
7187 * and what should probably correspond to the ID= field in the
7188 * ECU's .cfg file for the card - if your card is not detected,
7189 * make sure your signature is listed in the array.
7190 *
7191 * The fourth byte's lowest bit seems to be an enabled/disabled
7192 * flag (rest of the bits are reserved?).
7193 *
7194 * NOTE: This function is only needed on Intel and Alpha platforms,
7195 * the other platforms we support don't have EISA/VLB busses. So,
7196 * we #ifdef this entire function to avoid compiler warnings about
7197 * an unused function.
7198 *-F*************************************************************************/
7199 #if defined(__i386__) || defined(__alpha__)
7200 static int
aic7xxx_probe(int slot,int base,ahc_flag_type * flags)7201 aic7xxx_probe(int slot, int base, ahc_flag_type *flags)
7202 {
7203 int i;
7204 unsigned char buf[4];
7205
7206 static struct {
7207 int n;
7208 unsigned char signature[sizeof(buf)];
7209 ahc_chip type;
7210 int bios_disabled;
7211 } AIC7xxx[] = {
7212 { 4, { 0x04, 0x90, 0x77, 0x70 },
7213 AHC_AIC7770|AHC_EISA, FALSE }, /* mb 7770 */
7214 { 4, { 0x04, 0x90, 0x77, 0x71 },
7215 AHC_AIC7770|AHC_EISA, FALSE }, /* host adapter 274x */
7216 { 4, { 0x04, 0x90, 0x77, 0x56 },
7217 AHC_AIC7770|AHC_VL, FALSE }, /* 284x BIOS enabled */
7218 { 4, { 0x04, 0x90, 0x77, 0x57 },
7219 AHC_AIC7770|AHC_VL, TRUE } /* 284x BIOS disabled */
7220 };
7221
7222 /*
7223 * The VL-bus cards need to be primed by
7224 * writing before a signature check.
7225 */
7226 for (i = 0; i < sizeof(buf); i++)
7227 {
7228 outb(0x80 + i, base);
7229 buf[i] = inb(base + i);
7230 }
7231
7232 for (i = 0; i < NUMBER(AIC7xxx); i++)
7233 {
7234 /*
7235 * Signature match on enabled card?
7236 */
7237 if (!memcmp(buf, AIC7xxx[i].signature, AIC7xxx[i].n))
7238 {
7239 if (inb(base + 4) & 1)
7240 {
7241 if (AIC7xxx[i].bios_disabled)
7242 {
7243 *flags |= AHC_USEDEFAULTS;
7244 }
7245 else
7246 {
7247 *flags |= AHC_BIOS_ENABLED;
7248 }
7249 return (i);
7250 }
7251
7252 printk("aic7xxx: <Adaptec 7770 SCSI Host Adapter> "
7253 "disabled at slot %d, ignored.\n", slot);
7254 }
7255 }
7256
7257 return (-1);
7258 }
7259 #endif /* (__i386__) || (__alpha__) */
7260
7261
7262 /*+F*************************************************************************
7263 * Function:
7264 * read_2840_seeprom
7265 *
7266 * Description:
7267 * Reads the 2840 serial EEPROM and returns 1 if successful and 0 if
7268 * not successful.
7269 *
7270 * See read_seeprom (for the 2940) for the instruction set of the 93C46
7271 * chip.
7272 *
7273 * The 2840 interface to the 93C46 serial EEPROM is through the
7274 * STATUS_2840 and SEECTL_2840 registers. The CS_2840, CK_2840, and
7275 * DO_2840 bits of the SEECTL_2840 register are connected to the chip
7276 * select, clock, and data out lines respectively of the serial EEPROM.
7277 * The DI_2840 bit of the STATUS_2840 is connected to the data in line
7278 * of the serial EEPROM. The EEPROM_TF bit of STATUS_2840 register is
7279 * useful in that it gives us an 800 nsec timer. After a read from the
7280 * SEECTL_2840 register the timing flag is cleared and goes high 800 nsec
7281 * later.
7282 *-F*************************************************************************/
7283 static int
read_284x_seeprom(struct aic7xxx_host * p,struct seeprom_config * sc)7284 read_284x_seeprom(struct aic7xxx_host *p, struct seeprom_config *sc)
7285 {
7286 int i = 0, k = 0;
7287 unsigned char temp;
7288 unsigned short checksum = 0;
7289 unsigned short *seeprom = (unsigned short *) sc;
7290 struct seeprom_cmd {
7291 unsigned char len;
7292 unsigned char bits[3];
7293 };
7294 struct seeprom_cmd seeprom_read = {3, {1, 1, 0}};
7295
7296 #define CLOCK_PULSE(p) \
7297 while ((aic_inb(p, STATUS_2840) & EEPROM_TF) == 0) \
7298 { \
7299 ; /* Do nothing */ \
7300 } \
7301 (void) aic_inb(p, SEECTL_2840);
7302
7303 /*
7304 * Read the first 32 registers of the seeprom. For the 2840,
7305 * the 93C46 SEEPROM is a 1024-bit device with 64 16-bit registers
7306 * but only the first 32 are used by Adaptec BIOS. The loop
7307 * will range from 0 to 31.
7308 */
7309 for (k = 0; k < (sizeof(*sc) / 2); k++)
7310 {
7311 /*
7312 * Send chip select for one clock cycle.
7313 */
7314 aic_outb(p, CK_2840 | CS_2840, SEECTL_2840);
7315 CLOCK_PULSE(p);
7316
7317 /*
7318 * Now we're ready to send the read command followed by the
7319 * address of the 16-bit register we want to read.
7320 */
7321 for (i = 0; i < seeprom_read.len; i++)
7322 {
7323 temp = CS_2840 | seeprom_read.bits[i];
7324 aic_outb(p, temp, SEECTL_2840);
7325 CLOCK_PULSE(p);
7326 temp = temp ^ CK_2840;
7327 aic_outb(p, temp, SEECTL_2840);
7328 CLOCK_PULSE(p);
7329 }
7330 /*
7331 * Send the 6 bit address (MSB first, LSB last).
7332 */
7333 for (i = 5; i >= 0; i--)
7334 {
7335 temp = k;
7336 temp = (temp >> i) & 1; /* Mask out all but lower bit. */
7337 temp = CS_2840 | temp;
7338 aic_outb(p, temp, SEECTL_2840);
7339 CLOCK_PULSE(p);
7340 temp = temp ^ CK_2840;
7341 aic_outb(p, temp, SEECTL_2840);
7342 CLOCK_PULSE(p);
7343 }
7344
7345 /*
7346 * Now read the 16 bit register. An initial 0 precedes the
7347 * register contents which begins with bit 15 (MSB) and ends
7348 * with bit 0 (LSB). The initial 0 will be shifted off the
7349 * top of our word as we let the loop run from 0 to 16.
7350 */
7351 for (i = 0; i <= 16; i++)
7352 {
7353 temp = CS_2840;
7354 aic_outb(p, temp, SEECTL_2840);
7355 CLOCK_PULSE(p);
7356 temp = temp ^ CK_2840;
7357 seeprom[k] = (seeprom[k] << 1) | (aic_inb(p, STATUS_2840) & DI_2840);
7358 aic_outb(p, temp, SEECTL_2840);
7359 CLOCK_PULSE(p);
7360 }
7361 /*
7362 * The serial EEPROM has a checksum in the last word. Keep a
7363 * running checksum for all words read except for the last
7364 * word. We'll verify the checksum after all words have been
7365 * read.
7366 */
7367 if (k < (sizeof(*sc) / 2) - 1)
7368 {
7369 checksum = checksum + seeprom[k];
7370 }
7371
7372 /*
7373 * Reset the chip select for the next command cycle.
7374 */
7375 aic_outb(p, 0, SEECTL_2840);
7376 CLOCK_PULSE(p);
7377 aic_outb(p, CK_2840, SEECTL_2840);
7378 CLOCK_PULSE(p);
7379 aic_outb(p, 0, SEECTL_2840);
7380 CLOCK_PULSE(p);
7381 }
7382
7383 #if 0
7384 printk("Computed checksum 0x%x, checksum read 0x%x\n", checksum, sc->checksum);
7385 printk("Serial EEPROM:");
7386 for (k = 0; k < (sizeof(*sc) / 2); k++)
7387 {
7388 if (((k % 8) == 0) && (k != 0))
7389 {
7390 printk("\n ");
7391 }
7392 printk(" 0x%x", seeprom[k]);
7393 }
7394 printk("\n");
7395 #endif
7396
7397 if (checksum != sc->checksum)
7398 {
7399 printk("aic7xxx: SEEPROM checksum error, ignoring SEEPROM settings.\n");
7400 return (0);
7401 }
7402
7403 return (1);
7404 #undef CLOCK_PULSE
7405 }
7406
7407 #define CLOCK_PULSE(p) \
7408 do { \
7409 int limit = 0; \
7410 do { \
7411 mb(); \
7412 pause_sequencer(p); /* This is just to generate some PCI */ \
7413 /* traffic so the PCI read is flushed */ \
7414 /* it shouldn't be needed, but some */ \
7415 /* chipsets do indeed appear to need */ \
7416 /* something to force PCI reads to get */ \
7417 /* flushed */ \
7418 udelay(1); /* Do nothing */ \
7419 } while (((aic_inb(p, SEECTL) & SEERDY) == 0) && (++limit < 1000)); \
7420 } while(0)
7421
7422 /*+F*************************************************************************
7423 * Function:
7424 * acquire_seeprom
7425 *
7426 * Description:
7427 * Acquires access to the memory port on PCI controllers.
7428 *-F*************************************************************************/
7429 static int
acquire_seeprom(struct aic7xxx_host * p)7430 acquire_seeprom(struct aic7xxx_host *p)
7431 {
7432
7433 /*
7434 * Request access of the memory port. When access is
7435 * granted, SEERDY will go high. We use a 1 second
7436 * timeout which should be near 1 second more than
7437 * is needed. Reason: after the 7870 chip reset, there
7438 * should be no contention.
7439 */
7440 aic_outb(p, SEEMS, SEECTL);
7441 CLOCK_PULSE(p);
7442 if ((aic_inb(p, SEECTL) & SEERDY) == 0)
7443 {
7444 aic_outb(p, 0, SEECTL);
7445 return (0);
7446 }
7447 return (1);
7448 }
7449
7450 /*+F*************************************************************************
7451 * Function:
7452 * release_seeprom
7453 *
7454 * Description:
7455 * Releases access to the memory port on PCI controllers.
7456 *-F*************************************************************************/
7457 static void
release_seeprom(struct aic7xxx_host * p)7458 release_seeprom(struct aic7xxx_host *p)
7459 {
7460 /*
7461 * Make sure the SEEPROM is ready before we release it.
7462 */
7463 CLOCK_PULSE(p);
7464 aic_outb(p, 0, SEECTL);
7465 }
7466
7467 /*+F*************************************************************************
7468 * Function:
7469 * read_seeprom
7470 *
7471 * Description:
7472 * Reads the serial EEPROM and returns 1 if successful and 0 if
7473 * not successful.
7474 *
7475 * The instruction set of the 93C46/56/66 chips is as follows:
7476 *
7477 * Start OP
7478 * Function Bit Code Address Data Description
7479 * -------------------------------------------------------------------
7480 * READ 1 10 A5 - A0 Reads data stored in memory,
7481 * starting at specified address
7482 * EWEN 1 00 11XXXX Write enable must precede
7483 * all programming modes
7484 * ERASE 1 11 A5 - A0 Erase register A5A4A3A2A1A0
7485 * WRITE 1 01 A5 - A0 D15 - D0 Writes register
7486 * ERAL 1 00 10XXXX Erase all registers
7487 * WRAL 1 00 01XXXX D15 - D0 Writes to all registers
7488 * EWDS 1 00 00XXXX Disables all programming
7489 * instructions
7490 * *Note: A value of X for address is a don't care condition.
7491 * *Note: The 93C56 and 93C66 have 8 address bits.
7492 *
7493 *
7494 * The 93C46 has a four wire interface: clock, chip select, data in, and
7495 * data out. In order to perform one of the above functions, you need
7496 * to enable the chip select for a clock period (typically a minimum of
7497 * 1 usec, with the clock high and low a minimum of 750 and 250 nsec
7498 * respectively. While the chip select remains high, you can clock in
7499 * the instructions (above) starting with the start bit, followed by the
7500 * OP code, Address, and Data (if needed). For the READ instruction, the
7501 * requested 16-bit register contents is read from the data out line but
7502 * is preceded by an initial zero (leading 0, followed by 16-bits, MSB
7503 * first). The clock cycling from low to high initiates the next data
7504 * bit to be sent from the chip.
7505 *
7506 * The 78xx interface to the 93C46 serial EEPROM is through the SEECTL
7507 * register. After successful arbitration for the memory port, the
7508 * SEECS bit of the SEECTL register is connected to the chip select.
7509 * The SEECK, SEEDO, and SEEDI are connected to the clock, data out,
7510 * and data in lines respectively. The SEERDY bit of SEECTL is useful
7511 * in that it gives us an 800 nsec timer. After a write to the SEECTL
7512 * register, the SEERDY goes high 800 nsec later. The one exception
7513 * to this is when we first request access to the memory port. The
7514 * SEERDY goes high to signify that access has been granted and, for
7515 * this case, has no implied timing.
7516 *-F*************************************************************************/
7517 static int
read_seeprom(struct aic7xxx_host * p,int offset,unsigned short * scarray,unsigned int len,seeprom_chip_type chip)7518 read_seeprom(struct aic7xxx_host *p, int offset,
7519 unsigned short *scarray, unsigned int len, seeprom_chip_type chip)
7520 {
7521 int i = 0, k;
7522 unsigned char temp;
7523 unsigned short checksum = 0;
7524 struct seeprom_cmd {
7525 unsigned char len;
7526 unsigned char bits[3];
7527 };
7528 struct seeprom_cmd seeprom_read = {3, {1, 1, 0}};
7529
7530 /*
7531 * Request access of the memory port.
7532 */
7533 if (acquire_seeprom(p) == 0)
7534 {
7535 return (0);
7536 }
7537
7538 /*
7539 * Read 'len' registers of the seeprom. For the 7870, the 93C46
7540 * SEEPROM is a 1024-bit device with 64 16-bit registers but only
7541 * the first 32 are used by Adaptec BIOS. Some adapters use the
7542 * 93C56 SEEPROM which is a 2048-bit device. The loop will range
7543 * from 0 to 'len' - 1.
7544 */
7545 for (k = 0; k < len; k++)
7546 {
7547 /*
7548 * Send chip select for one clock cycle.
7549 */
7550 aic_outb(p, SEEMS | SEECK | SEECS, SEECTL);
7551 CLOCK_PULSE(p);
7552
7553 /*
7554 * Now we're ready to send the read command followed by the
7555 * address of the 16-bit register we want to read.
7556 */
7557 for (i = 0; i < seeprom_read.len; i++)
7558 {
7559 temp = SEEMS | SEECS | (seeprom_read.bits[i] << 1);
7560 aic_outb(p, temp, SEECTL);
7561 CLOCK_PULSE(p);
7562 temp = temp ^ SEECK;
7563 aic_outb(p, temp, SEECTL);
7564 CLOCK_PULSE(p);
7565 }
7566 /*
7567 * Send the 6 or 8 bit address (MSB first, LSB last).
7568 */
7569 for (i = ((int) chip - 1); i >= 0; i--)
7570 {
7571 temp = k + offset;
7572 temp = (temp >> i) & 1; /* Mask out all but lower bit. */
7573 temp = SEEMS | SEECS | (temp << 1);
7574 aic_outb(p, temp, SEECTL);
7575 CLOCK_PULSE(p);
7576 temp = temp ^ SEECK;
7577 aic_outb(p, temp, SEECTL);
7578 CLOCK_PULSE(p);
7579 }
7580
7581 /*
7582 * Now read the 16 bit register. An initial 0 precedes the
7583 * register contents which begins with bit 15 (MSB) and ends
7584 * with bit 0 (LSB). The initial 0 will be shifted off the
7585 * top of our word as we let the loop run from 0 to 16.
7586 */
7587 for (i = 0; i <= 16; i++)
7588 {
7589 temp = SEEMS | SEECS;
7590 aic_outb(p, temp, SEECTL);
7591 CLOCK_PULSE(p);
7592 temp = temp ^ SEECK;
7593 scarray[k] = (scarray[k] << 1) | (aic_inb(p, SEECTL) & SEEDI);
7594 aic_outb(p, temp, SEECTL);
7595 CLOCK_PULSE(p);
7596 }
7597
7598 /*
7599 * The serial EEPROM should have a checksum in the last word.
7600 * Keep a running checksum for all words read except for the
7601 * last word. We'll verify the checksum after all words have
7602 * been read.
7603 */
7604 if (k < (len - 1))
7605 {
7606 checksum = checksum + scarray[k];
7607 }
7608
7609 /*
7610 * Reset the chip select for the next command cycle.
7611 */
7612 aic_outb(p, SEEMS, SEECTL);
7613 CLOCK_PULSE(p);
7614 aic_outb(p, SEEMS | SEECK, SEECTL);
7615 CLOCK_PULSE(p);
7616 aic_outb(p, SEEMS, SEECTL);
7617 CLOCK_PULSE(p);
7618 }
7619
7620 /*
7621 * Release access to the memory port and the serial EEPROM.
7622 */
7623 release_seeprom(p);
7624
7625 #if 0
7626 printk("Computed checksum 0x%x, checksum read 0x%x\n",
7627 checksum, scarray[len - 1]);
7628 printk("Serial EEPROM:");
7629 for (k = 0; k < len; k++)
7630 {
7631 if (((k % 8) == 0) && (k != 0))
7632 {
7633 printk("\n ");
7634 }
7635 printk(" 0x%x", scarray[k]);
7636 }
7637 printk("\n");
7638 #endif
7639 if ( (checksum != scarray[len - 1]) || (checksum == 0) )
7640 {
7641 return (0);
7642 }
7643
7644 return (1);
7645 }
7646
7647 /*+F*************************************************************************
7648 * Function:
7649 * read_brdctl
7650 *
7651 * Description:
7652 * Reads the BRDCTL register.
7653 *-F*************************************************************************/
7654 static unsigned char
read_brdctl(struct aic7xxx_host * p)7655 read_brdctl(struct aic7xxx_host *p)
7656 {
7657 unsigned char brdctl, value;
7658
7659 /*
7660 * Make sure the SEEPROM is ready before we access it
7661 */
7662 CLOCK_PULSE(p);
7663 if (p->features & AHC_ULTRA2)
7664 {
7665 brdctl = BRDRW_ULTRA2;
7666 aic_outb(p, brdctl, BRDCTL);
7667 CLOCK_PULSE(p);
7668 value = aic_inb(p, BRDCTL);
7669 CLOCK_PULSE(p);
7670 return(value);
7671 }
7672 brdctl = BRDRW;
7673 if ( !((p->chip & AHC_CHIPID_MASK) == AHC_AIC7895) ||
7674 (p->flags & AHC_CHNLB) )
7675 {
7676 brdctl |= BRDCS;
7677 }
7678 aic_outb(p, brdctl, BRDCTL);
7679 CLOCK_PULSE(p);
7680 value = aic_inb(p, BRDCTL);
7681 CLOCK_PULSE(p);
7682 aic_outb(p, 0, BRDCTL);
7683 CLOCK_PULSE(p);
7684 return (value);
7685 }
7686
7687 /*+F*************************************************************************
7688 * Function:
7689 * write_brdctl
7690 *
7691 * Description:
7692 * Writes a value to the BRDCTL register.
7693 *-F*************************************************************************/
7694 static void
write_brdctl(struct aic7xxx_host * p,unsigned char value)7695 write_brdctl(struct aic7xxx_host *p, unsigned char value)
7696 {
7697 unsigned char brdctl;
7698
7699 /*
7700 * Make sure the SEEPROM is ready before we access it
7701 */
7702 CLOCK_PULSE(p);
7703 if (p->features & AHC_ULTRA2)
7704 {
7705 brdctl = value;
7706 aic_outb(p, brdctl, BRDCTL);
7707 CLOCK_PULSE(p);
7708 brdctl |= BRDSTB_ULTRA2;
7709 aic_outb(p, brdctl, BRDCTL);
7710 CLOCK_PULSE(p);
7711 brdctl &= ~BRDSTB_ULTRA2;
7712 aic_outb(p, brdctl, BRDCTL);
7713 CLOCK_PULSE(p);
7714 read_brdctl(p);
7715 CLOCK_PULSE(p);
7716 }
7717 else
7718 {
7719 brdctl = BRDSTB;
7720 if ( !((p->chip & AHC_CHIPID_MASK) == AHC_AIC7895) ||
7721 (p->flags & AHC_CHNLB) )
7722 {
7723 brdctl |= BRDCS;
7724 }
7725 brdctl = BRDSTB | BRDCS;
7726 aic_outb(p, brdctl, BRDCTL);
7727 CLOCK_PULSE(p);
7728 brdctl |= value;
7729 aic_outb(p, brdctl, BRDCTL);
7730 CLOCK_PULSE(p);
7731 brdctl &= ~BRDSTB;
7732 aic_outb(p, brdctl, BRDCTL);
7733 CLOCK_PULSE(p);
7734 brdctl &= ~BRDCS;
7735 aic_outb(p, brdctl, BRDCTL);
7736 CLOCK_PULSE(p);
7737 }
7738 }
7739
7740 /*+F*************************************************************************
7741 * Function:
7742 * aic785x_cable_detect
7743 *
7744 * Description:
7745 * Detect the cables that are present on aic785x class controller chips
7746 *-F*************************************************************************/
7747 static void
aic785x_cable_detect(struct aic7xxx_host * p,int * int_50,int * ext_present,int * eeprom)7748 aic785x_cable_detect(struct aic7xxx_host *p, int *int_50,
7749 int *ext_present, int *eeprom)
7750 {
7751 unsigned char brdctl;
7752
7753 aic_outb(p, BRDRW | BRDCS, BRDCTL);
7754 CLOCK_PULSE(p);
7755 aic_outb(p, 0, BRDCTL);
7756 CLOCK_PULSE(p);
7757 brdctl = aic_inb(p, BRDCTL);
7758 CLOCK_PULSE(p);
7759 *int_50 = !(brdctl & BRDDAT5);
7760 *ext_present = !(brdctl & BRDDAT6);
7761 *eeprom = (aic_inb(p, SPIOCAP) & EEPROM);
7762 }
7763
7764 #undef CLOCK_PULSE
7765
7766 /*+F*************************************************************************
7767 * Function:
7768 * aic2940_uwpro_cable_detect
7769 *
7770 * Description:
7771 * Detect the cables that are present on the 2940-UWPro cards
7772 *
7773 * NOTE: This function assumes the SEEPROM will have already been acquired
7774 * prior to invocation of this function.
7775 *-F*************************************************************************/
7776 static void
aic2940_uwpro_wide_cable_detect(struct aic7xxx_host * p,int * int_68,int * ext_68,int * eeprom)7777 aic2940_uwpro_wide_cable_detect(struct aic7xxx_host *p, int *int_68,
7778 int *ext_68, int *eeprom)
7779 {
7780 unsigned char brdctl;
7781
7782 /*
7783 * First read the status of our cables. Set the rom bank to
7784 * 0 since the bank setting serves as a multiplexor for the
7785 * cable detection logic. BRDDAT5 controls the bank switch.
7786 */
7787 write_brdctl(p, 0);
7788
7789 /*
7790 * Now we read the state of the internal 68 connector. BRDDAT6
7791 * is don't care, BRDDAT7 is internal 68. The cable is
7792 * present if the bit is 0
7793 */
7794 brdctl = read_brdctl(p);
7795 *int_68 = !(brdctl & BRDDAT7);
7796
7797 /*
7798 * Set the bank bit in brdctl and then read the external cable state
7799 * and the EEPROM status
7800 */
7801 write_brdctl(p, BRDDAT5);
7802 brdctl = read_brdctl(p);
7803
7804 *ext_68 = !(brdctl & BRDDAT6);
7805 *eeprom = !(brdctl & BRDDAT7);
7806
7807 /*
7808 * We're done, the calling function will release the SEEPROM for us
7809 */
7810 }
7811
7812 /*+F*************************************************************************
7813 * Function:
7814 * aic787x_cable_detect
7815 *
7816 * Description:
7817 * Detect the cables that are present on aic787x class controller chips
7818 *
7819 * NOTE: This function assumes the SEEPROM will have already been acquired
7820 * prior to invocation of this function.
7821 *-F*************************************************************************/
7822 static void
aic787x_cable_detect(struct aic7xxx_host * p,int * int_50,int * int_68,int * ext_present,int * eeprom)7823 aic787x_cable_detect(struct aic7xxx_host *p, int *int_50, int *int_68,
7824 int *ext_present, int *eeprom)
7825 {
7826 unsigned char brdctl;
7827
7828 /*
7829 * First read the status of our cables. Set the rom bank to
7830 * 0 since the bank setting serves as a multiplexor for the
7831 * cable detection logic. BRDDAT5 controls the bank switch.
7832 */
7833 write_brdctl(p, 0);
7834
7835 /*
7836 * Now we read the state of the two internal connectors. BRDDAT6
7837 * is internal 50, BRDDAT7 is internal 68. For each, the cable is
7838 * present if the bit is 0
7839 */
7840 brdctl = read_brdctl(p);
7841 *int_50 = !(brdctl & BRDDAT6);
7842 *int_68 = !(brdctl & BRDDAT7);
7843
7844 /*
7845 * Set the bank bit in brdctl and then read the external cable state
7846 * and the EEPROM status
7847 */
7848 write_brdctl(p, BRDDAT5);
7849 brdctl = read_brdctl(p);
7850
7851 *ext_present = !(brdctl & BRDDAT6);
7852 *eeprom = !(brdctl & BRDDAT7);
7853
7854 /*
7855 * We're done, the calling function will release the SEEPROM for us
7856 */
7857 }
7858
7859 /*+F*************************************************************************
7860 * Function:
7861 * aic787x_ultra2_term_detect
7862 *
7863 * Description:
7864 * Detect the termination settings present on ultra2 class controllers
7865 *
7866 * NOTE: This function assumes the SEEPROM will have already been acquired
7867 * prior to invocation of this function.
7868 *-F*************************************************************************/
7869 static void
aic7xxx_ultra2_term_detect(struct aic7xxx_host * p,int * enableSE_low,int * enableSE_high,int * enableLVD_low,int * enableLVD_high,int * eprom_present)7870 aic7xxx_ultra2_term_detect(struct aic7xxx_host *p, int *enableSE_low,
7871 int *enableSE_high, int *enableLVD_low,
7872 int *enableLVD_high, int *eprom_present)
7873 {
7874 unsigned char brdctl;
7875
7876 brdctl = read_brdctl(p);
7877
7878 *eprom_present = (brdctl & BRDDAT7);
7879 *enableSE_high = (brdctl & BRDDAT6);
7880 *enableSE_low = (brdctl & BRDDAT5);
7881 *enableLVD_high = (brdctl & BRDDAT4);
7882 *enableLVD_low = (brdctl & BRDDAT3);
7883 }
7884
7885 /*+F*************************************************************************
7886 * Function:
7887 * configure_termination
7888 *
7889 * Description:
7890 * Configures the termination settings on PCI adapters that have
7891 * SEEPROMs available.
7892 *-F*************************************************************************/
7893 static void
configure_termination(struct aic7xxx_host * p)7894 configure_termination(struct aic7xxx_host *p)
7895 {
7896 int internal50_present = 0;
7897 int internal68_present = 0;
7898 int external_present = 0;
7899 int eprom_present = 0;
7900 int enableSE_low = 0;
7901 int enableSE_high = 0;
7902 int enableLVD_low = 0;
7903 int enableLVD_high = 0;
7904 unsigned char brddat = 0;
7905 unsigned char max_target = 0;
7906 unsigned char sxfrctl1 = aic_inb(p, SXFRCTL1);
7907
7908 if (acquire_seeprom(p))
7909 {
7910 if (p->features & (AHC_WIDE|AHC_TWIN))
7911 max_target = 16;
7912 else
7913 max_target = 8;
7914 aic_outb(p, SEEMS | SEECS, SEECTL);
7915 sxfrctl1 &= ~STPWEN;
7916 /*
7917 * The termination/cable detection logic is split into three distinct
7918 * groups. Ultra2 and later controllers, 2940UW-Pro controllers, and
7919 * older 7850, 7860, 7870, 7880, and 7895 controllers. Each has its
7920 * own unique way of detecting their cables and writing the results
7921 * back to the card.
7922 */
7923 if (p->features & AHC_ULTRA2)
7924 {
7925 /*
7926 * As long as user hasn't overridden term settings, always check the
7927 * cable detection logic
7928 */
7929 if (aic7xxx_override_term == -1)
7930 {
7931 aic7xxx_ultra2_term_detect(p, &enableSE_low, &enableSE_high,
7932 &enableLVD_low, &enableLVD_high,
7933 &eprom_present);
7934 }
7935
7936 /*
7937 * If the user is overriding settings, then they have been preserved
7938 * to here as fake adapter_control entries. Parse them and allow
7939 * them to override the detected settings (if we even did detection).
7940 */
7941 if (!(p->adapter_control & CFSEAUTOTERM))
7942 {
7943 enableSE_low = (p->adapter_control & CFSTERM);
7944 enableSE_high = (p->adapter_control & CFWSTERM);
7945 }
7946 if (!(p->adapter_control & CFAUTOTERM))
7947 {
7948 enableLVD_low = enableLVD_high = (p->adapter_control & CFLVDSTERM);
7949 }
7950
7951 /*
7952 * Now take those settings that we have and translate them into the
7953 * values that must be written into the registers.
7954 *
7955 * Flash Enable = BRDDAT7
7956 * Secondary High Term Enable = BRDDAT6
7957 * Secondary Low Term Enable = BRDDAT5
7958 * LVD/Primary High Term Enable = BRDDAT4
7959 * LVD/Primary Low Term Enable = STPWEN bit in SXFRCTL1
7960 */
7961 if (enableLVD_low != 0)
7962 {
7963 sxfrctl1 |= STPWEN;
7964 p->flags |= AHC_TERM_ENB_LVD;
7965 if (aic7xxx_verbose & VERBOSE_PROBE2)
7966 printk(KERN_INFO "(scsi%d) LVD/Primary Low byte termination "
7967 "Enabled\n", p->host_no);
7968 }
7969
7970 if (enableLVD_high != 0)
7971 {
7972 brddat |= BRDDAT4;
7973 if (aic7xxx_verbose & VERBOSE_PROBE2)
7974 printk(KERN_INFO "(scsi%d) LVD/Primary High byte termination "
7975 "Enabled\n", p->host_no);
7976 }
7977
7978 if (enableSE_low != 0)
7979 {
7980 brddat |= BRDDAT5;
7981 if (aic7xxx_verbose & VERBOSE_PROBE2)
7982 printk(KERN_INFO "(scsi%d) Secondary Low byte termination "
7983 "Enabled\n", p->host_no);
7984 }
7985
7986 if (enableSE_high != 0)
7987 {
7988 brddat |= BRDDAT6;
7989 if (aic7xxx_verbose & VERBOSE_PROBE2)
7990 printk(KERN_INFO "(scsi%d) Secondary High byte termination "
7991 "Enabled\n", p->host_no);
7992 }
7993 }
7994 else if (p->features & AHC_NEW_AUTOTERM)
7995 {
7996 /*
7997 * The 50 pin connector termination is controlled by STPWEN in the
7998 * SXFRCTL1 register. Since the Adaptec docs typically say the
7999 * controller is not allowed to be in the middle of a cable and
8000 * this is the only connection on that stub of the bus, there is
8001 * no need to even check for narrow termination, it's simply
8002 * always on.
8003 */
8004 sxfrctl1 |= STPWEN;
8005 if (aic7xxx_verbose & VERBOSE_PROBE2)
8006 printk(KERN_INFO "(scsi%d) Narrow channel termination Enabled\n",
8007 p->host_no);
8008
8009 if (p->adapter_control & CFAUTOTERM)
8010 {
8011 aic2940_uwpro_wide_cable_detect(p, &internal68_present,
8012 &external_present,
8013 &eprom_present);
8014 printk(KERN_INFO "(scsi%d) Cables present (Int-50 %s, Int-68 %s, "
8015 "Ext-68 %s)\n", p->host_no,
8016 "Don't Care",
8017 internal68_present ? "YES" : "NO",
8018 external_present ? "YES" : "NO");
8019 if (aic7xxx_verbose & VERBOSE_PROBE2)
8020 printk(KERN_INFO "(scsi%d) EEPROM %s present.\n", p->host_no,
8021 eprom_present ? "is" : "is not");
8022 if (internal68_present && external_present)
8023 {
8024 brddat = 0;
8025 p->flags &= ~AHC_TERM_ENB_SE_HIGH;
8026 if (aic7xxx_verbose & VERBOSE_PROBE2)
8027 printk(KERN_INFO "(scsi%d) Wide channel termination Disabled\n",
8028 p->host_no);
8029 }
8030 else
8031 {
8032 brddat = BRDDAT6;
8033 p->flags |= AHC_TERM_ENB_SE_HIGH;
8034 if (aic7xxx_verbose & VERBOSE_PROBE2)
8035 printk(KERN_INFO "(scsi%d) Wide channel termination Enabled\n",
8036 p->host_no);
8037 }
8038 }
8039 else
8040 {
8041 /*
8042 * The termination of the Wide channel is done more like normal
8043 * though, and the setting of this termination is done by writing
8044 * either a 0 or 1 to BRDDAT6 of the BRDDAT register
8045 */
8046 if (p->adapter_control & CFWSTERM)
8047 {
8048 brddat = BRDDAT6;
8049 p->flags |= AHC_TERM_ENB_SE_HIGH;
8050 if (aic7xxx_verbose & VERBOSE_PROBE2)
8051 printk(KERN_INFO "(scsi%d) Wide channel termination Enabled\n",
8052 p->host_no);
8053 }
8054 else
8055 {
8056 brddat = 0;
8057 }
8058 }
8059 }
8060 else
8061 {
8062 if (p->adapter_control & CFAUTOTERM)
8063 {
8064 if (p->flags & AHC_MOTHERBOARD)
8065 {
8066 printk(KERN_INFO "(scsi%d) Warning - detected auto-termination\n",
8067 p->host_no);
8068 printk(KERN_INFO "(scsi%d) Please verify driver detected settings "
8069 "are correct.\n", p->host_no);
8070 printk(KERN_INFO "(scsi%d) If not, then please properly set the "
8071 "device termination\n", p->host_no);
8072 printk(KERN_INFO "(scsi%d) in the Adaptec SCSI BIOS by hitting "
8073 "CTRL-A when prompted\n", p->host_no);
8074 printk(KERN_INFO "(scsi%d) during machine bootup.\n", p->host_no);
8075 }
8076 /* Configure auto termination. */
8077
8078 if ( (p->chip & AHC_CHIPID_MASK) >= AHC_AIC7870 )
8079 {
8080 aic787x_cable_detect(p, &internal50_present, &internal68_present,
8081 &external_present, &eprom_present);
8082 }
8083 else
8084 {
8085 aic785x_cable_detect(p, &internal50_present, &external_present,
8086 &eprom_present);
8087 }
8088
8089 if (max_target <= 8)
8090 internal68_present = 0;
8091
8092 if (max_target > 8)
8093 {
8094 printk(KERN_INFO "(scsi%d) Cables present (Int-50 %s, Int-68 %s, "
8095 "Ext-68 %s)\n", p->host_no,
8096 internal50_present ? "YES" : "NO",
8097 internal68_present ? "YES" : "NO",
8098 external_present ? "YES" : "NO");
8099 }
8100 else
8101 {
8102 printk(KERN_INFO "(scsi%d) Cables present (Int-50 %s, Ext-50 %s)\n",
8103 p->host_no,
8104 internal50_present ? "YES" : "NO",
8105 external_present ? "YES" : "NO");
8106 }
8107 if (aic7xxx_verbose & VERBOSE_PROBE2)
8108 printk(KERN_INFO "(scsi%d) EEPROM %s present.\n", p->host_no,
8109 eprom_present ? "is" : "is not");
8110
8111 /*
8112 * Now set the termination based on what we found. BRDDAT6
8113 * controls wide termination enable.
8114 * Flash Enable = BRDDAT7
8115 * SE High Term Enable = BRDDAT6
8116 */
8117 if (internal50_present && internal68_present && external_present)
8118 {
8119 printk(KERN_INFO "(scsi%d) Illegal cable configuration!! Only two\n",
8120 p->host_no);
8121 printk(KERN_INFO "(scsi%d) connectors on the SCSI controller may be "
8122 "in use at a time!\n", p->host_no);
8123 /*
8124 * Force termination (low and high byte) on. This is safer than
8125 * leaving it completely off, especially since this message comes
8126 * most often from motherboard controllers that don't even have 3
8127 * connectors, but instead are failing the cable detection.
8128 */
8129 internal50_present = external_present = 0;
8130 enableSE_high = enableSE_low = 1;
8131 }
8132
8133 if ((max_target > 8) &&
8134 ((external_present == 0) || (internal68_present == 0)) )
8135 {
8136 brddat |= BRDDAT6;
8137 p->flags |= AHC_TERM_ENB_SE_HIGH;
8138 if (aic7xxx_verbose & VERBOSE_PROBE2)
8139 printk(KERN_INFO "(scsi%d) SE High byte termination Enabled\n",
8140 p->host_no);
8141 }
8142
8143 if ( ((internal50_present ? 1 : 0) +
8144 (internal68_present ? 1 : 0) +
8145 (external_present ? 1 : 0)) <= 1 )
8146 {
8147 sxfrctl1 |= STPWEN;
8148 p->flags |= AHC_TERM_ENB_SE_LOW;
8149 if (aic7xxx_verbose & VERBOSE_PROBE2)
8150 printk(KERN_INFO "(scsi%d) SE Low byte termination Enabled\n",
8151 p->host_no);
8152 }
8153 }
8154 else /* p->adapter_control & CFAUTOTERM */
8155 {
8156 if (p->adapter_control & CFSTERM)
8157 {
8158 sxfrctl1 |= STPWEN;
8159 if (aic7xxx_verbose & VERBOSE_PROBE2)
8160 printk(KERN_INFO "(scsi%d) SE Low byte termination Enabled\n",
8161 p->host_no);
8162 }
8163
8164 if (p->adapter_control & CFWSTERM)
8165 {
8166 brddat |= BRDDAT6;
8167 if (aic7xxx_verbose & VERBOSE_PROBE2)
8168 printk(KERN_INFO "(scsi%d) SE High byte termination Enabled\n",
8169 p->host_no);
8170 }
8171 }
8172 }
8173
8174 aic_outb(p, sxfrctl1, SXFRCTL1);
8175 write_brdctl(p, brddat);
8176 release_seeprom(p);
8177 }
8178 }
8179
8180 /*+F*************************************************************************
8181 * Function:
8182 * detect_maxscb
8183 *
8184 * Description:
8185 * Detects the maximum number of SCBs for the controller and returns
8186 * the count and a mask in p (p->maxscbs, p->qcntmask).
8187 *-F*************************************************************************/
8188 static void
detect_maxscb(struct aic7xxx_host * p)8189 detect_maxscb(struct aic7xxx_host *p)
8190 {
8191 int i;
8192
8193 /*
8194 * It's possible that we've already done this for multichannel
8195 * adapters.
8196 */
8197 if (p->scb_data->maxhscbs == 0)
8198 {
8199 /*
8200 * We haven't initialized the SCB settings yet. Walk the SCBs to
8201 * determince how many there are.
8202 */
8203 aic_outb(p, 0, FREE_SCBH);
8204
8205 for (i = 0; i < AIC7XXX_MAXSCB; i++)
8206 {
8207 aic_outb(p, i, SCBPTR);
8208 aic_outb(p, i, SCB_CONTROL);
8209 if (aic_inb(p, SCB_CONTROL) != i)
8210 break;
8211 aic_outb(p, 0, SCBPTR);
8212 if (aic_inb(p, SCB_CONTROL) != 0)
8213 break;
8214
8215 aic_outb(p, i, SCBPTR);
8216 aic_outb(p, 0, SCB_CONTROL); /* Clear the control byte. */
8217 aic_outb(p, i + 1, SCB_NEXT); /* Set the next pointer. */
8218 aic_outb(p, SCB_LIST_NULL, SCB_TAG); /* Make the tag invalid. */
8219 aic_outb(p, SCB_LIST_NULL, SCB_BUSYTARGETS); /* no busy untagged */
8220 aic_outb(p, SCB_LIST_NULL, SCB_BUSYTARGETS+1);/* targets active yet */
8221 aic_outb(p, SCB_LIST_NULL, SCB_BUSYTARGETS+2);
8222 aic_outb(p, SCB_LIST_NULL, SCB_BUSYTARGETS+3);
8223 }
8224
8225 /* Make sure the last SCB terminates the free list. */
8226 aic_outb(p, i - 1, SCBPTR);
8227 aic_outb(p, SCB_LIST_NULL, SCB_NEXT);
8228
8229 /* Ensure we clear the first (0) SCBs control byte. */
8230 aic_outb(p, 0, SCBPTR);
8231 aic_outb(p, 0, SCB_CONTROL);
8232
8233 p->scb_data->maxhscbs = i;
8234 /*
8235 * Use direct indexing instead for speed
8236 */
8237 if ( i == AIC7XXX_MAXSCB )
8238 p->flags &= ~AHC_PAGESCBS;
8239 }
8240
8241 }
8242
8243 /*+F*************************************************************************
8244 * Function:
8245 * aic7xxx_register
8246 *
8247 * Description:
8248 * Register a Adaptec aic7xxx chip SCSI controller with the kernel.
8249 *-F*************************************************************************/
8250 static int
aic7xxx_register(Scsi_Host_Template * template,struct aic7xxx_host * p,int reset_delay)8251 aic7xxx_register(Scsi_Host_Template *template, struct aic7xxx_host *p,
8252 int reset_delay)
8253 {
8254 int i, result;
8255 int max_targets;
8256 int found = 1;
8257 unsigned char term, scsi_conf;
8258 struct Scsi_Host *host;
8259
8260 host = p->host;
8261
8262 p->scb_data->maxscbs = AIC7XXX_MAXSCB;
8263 host->can_queue = AIC7XXX_MAXSCB;
8264 host->cmd_per_lun = 3;
8265 host->sg_tablesize = AIC7XXX_MAX_SG;
8266 host->select_queue_depths = aic7xxx_select_queue_depth;
8267 host->this_id = p->scsi_id;
8268 host->io_port = p->base;
8269 host->n_io_port = 0xFF;
8270 host->base = p->mbase;
8271 host->irq = p->irq;
8272 if (p->features & AHC_WIDE)
8273 {
8274 host->max_id = 16;
8275 }
8276 if (p->features & AHC_TWIN)
8277 {
8278 host->max_channel = 1;
8279 }
8280
8281 p->host = host;
8282 p->host_no = host->host_no;
8283 host->unique_id = p->instance;
8284 p->isr_count = 0;
8285 p->next = NULL;
8286 p->completeq.head = NULL;
8287 p->completeq.tail = NULL;
8288 scbq_init(&p->scb_data->free_scbs);
8289 scbq_init(&p->waiting_scbs);
8290 init_timer(&p->dev_timer);
8291 p->dev_timer.data = (unsigned long)p;
8292 p->dev_timer.function = (void *)aic7xxx_timer;
8293 p->dev_timer_active = 0;
8294
8295 /*
8296 * We currently have no commands of any type
8297 */
8298 p->qinfifonext = 0;
8299 p->qoutfifonext = 0;
8300
8301 for (i = 0; i < MAX_TARGETS; i++)
8302 {
8303 p->dev_commands_sent[i] = 0;
8304 p->dev_flags[i] = 0;
8305 p->dev_active_cmds[i] = 0;
8306 p->dev_last_queue_full[i] = 0;
8307 p->dev_last_queue_full_count[i] = 0;
8308 p->dev_max_queue_depth[i] = 1;
8309 p->dev_temp_queue_depth[i] = 1;
8310 p->dev_expires[i] = 0;
8311 scbq_init(&p->delayed_scbs[i]);
8312 }
8313
8314 printk(KERN_INFO "(scsi%d) <%s> found at ", p->host_no,
8315 board_names[p->board_name_index]);
8316 switch(p->chip)
8317 {
8318 case (AHC_AIC7770|AHC_EISA):
8319 printk("EISA slot %d\n", p->pci_device_fn);
8320 break;
8321 case (AHC_AIC7770|AHC_VL):
8322 printk("VLB slot %d\n", p->pci_device_fn);
8323 break;
8324 default:
8325 printk("PCI %d/%d/%d\n", p->pci_bus, PCI_SLOT(p->pci_device_fn),
8326 PCI_FUNC(p->pci_device_fn));
8327 break;
8328 }
8329 if (p->features & AHC_TWIN)
8330 {
8331 printk(KERN_INFO "(scsi%d) Twin Channel, A SCSI ID %d, B SCSI ID %d, ",
8332 p->host_no, p->scsi_id, p->scsi_id_b);
8333 }
8334 else
8335 {
8336 char *channel;
8337
8338 channel = "";
8339
8340 if ((p->flags & AHC_MULTI_CHANNEL) != 0)
8341 {
8342 channel = " A";
8343
8344 if ( (p->flags & (AHC_CHNLB|AHC_CHNLC)) != 0 )
8345 {
8346 channel = (p->flags & AHC_CHNLB) ? " B" : " C";
8347 }
8348 }
8349 if (p->features & AHC_WIDE)
8350 {
8351 printk(KERN_INFO "(scsi%d) Wide ", p->host_no);
8352 }
8353 else
8354 {
8355 printk(KERN_INFO "(scsi%d) Narrow ", p->host_no);
8356 }
8357 printk("Channel%s, SCSI ID=%d, ", channel, p->scsi_id);
8358 }
8359 aic_outb(p, 0, SEQ_FLAGS);
8360
8361 detect_maxscb(p);
8362
8363 printk("%d/%d SCBs\n", p->scb_data->maxhscbs, p->scb_data->maxscbs);
8364 if (aic7xxx_verbose & VERBOSE_PROBE2)
8365 {
8366 printk(KERN_INFO "(scsi%d) BIOS %sabled, IO Port 0x%lx, IRQ %d\n",
8367 p->host_no, (p->flags & AHC_BIOS_ENABLED) ? "en" : "dis",
8368 p->base, p->irq);
8369 printk(KERN_INFO "(scsi%d) IO Memory at 0x%lx, MMAP Memory at 0x%lx\n",
8370 p->host_no, p->mbase, (unsigned long)p->maddr);
8371 }
8372
8373 #ifdef CONFIG_PCI
8374 /*
8375 * Now that we know our instance number, we can set the flags we need to
8376 * force termination if need be.
8377 */
8378 if (aic7xxx_stpwlev != -1)
8379 {
8380 /*
8381 * This option only applies to PCI controllers.
8382 */
8383 if ( (p->chip & ~AHC_CHIPID_MASK) == AHC_PCI)
8384 {
8385 unsigned char devconfig;
8386
8387 pci_read_config_byte(p->pdev, DEVCONFIG, &devconfig);
8388 if ( (aic7xxx_stpwlev >> p->instance) & 0x01 )
8389 {
8390 devconfig |= STPWLEVEL;
8391 if (aic7xxx_verbose & VERBOSE_PROBE2)
8392 printk("(scsi%d) Force setting STPWLEVEL bit\n", p->host_no);
8393 }
8394 else
8395 {
8396 devconfig &= ~STPWLEVEL;
8397 if (aic7xxx_verbose & VERBOSE_PROBE2)
8398 printk("(scsi%d) Force clearing STPWLEVEL bit\n", p->host_no);
8399 }
8400 pci_write_config_byte(p->pdev, DEVCONFIG, devconfig);
8401 }
8402 }
8403 #endif
8404
8405 /*
8406 * That took care of devconfig and stpwlev, now for the actual termination
8407 * settings.
8408 */
8409 if (aic7xxx_override_term != -1)
8410 {
8411 /*
8412 * Again, this only applies to PCI controllers. We don't have problems
8413 * with the termination on 274x controllers to the best of my knowledge.
8414 */
8415 if ( (p->chip & ~AHC_CHIPID_MASK) == AHC_PCI)
8416 {
8417 unsigned char term_override;
8418
8419 term_override = ( (aic7xxx_override_term >> (p->instance * 4)) & 0x0f);
8420 p->adapter_control &=
8421 ~(CFSTERM|CFWSTERM|CFLVDSTERM|CFAUTOTERM|CFSEAUTOTERM);
8422 if ( (p->features & AHC_ULTRA2) && (term_override & 0x0c) )
8423 {
8424 p->adapter_control |= CFLVDSTERM;
8425 }
8426 if (term_override & 0x02)
8427 {
8428 p->adapter_control |= CFWSTERM;
8429 }
8430 if (term_override & 0x01)
8431 {
8432 p->adapter_control |= CFSTERM;
8433 }
8434 }
8435 }
8436
8437 if ( (p->flags & AHC_SEEPROM_FOUND) || (aic7xxx_override_term != -1) )
8438 {
8439 if (p->features & AHC_SPIOCAP)
8440 {
8441 if ( aic_inb(p, SPIOCAP) & SSPIOCPS )
8442 /*
8443 * Update the settings in sxfrctl1 to match the termination
8444 * settings.
8445 */
8446 configure_termination(p);
8447 }
8448 else if ((p->chip & AHC_CHIPID_MASK) >= AHC_AIC7870)
8449 {
8450 configure_termination(p);
8451 }
8452 }
8453
8454 /*
8455 * Set the SCSI Id, SXFRCTL0, SXFRCTL1, and SIMODE1, for both channels
8456 */
8457 if (p->features & AHC_TWIN)
8458 {
8459 /* Select channel B */
8460 aic_outb(p, aic_inb(p, SBLKCTL) | SELBUSB, SBLKCTL);
8461
8462 if ((p->flags & AHC_SEEPROM_FOUND) || (aic7xxx_override_term != -1))
8463 term = (aic_inb(p, SXFRCTL1) & STPWEN);
8464 else
8465 term = ((p->flags & AHC_TERM_ENB_B) ? STPWEN : 0);
8466
8467 aic_outb(p, p->scsi_id_b, SCSIID);
8468 scsi_conf = aic_inb(p, SCSICONF + 1);
8469 aic_outb(p, DFON | SPIOEN, SXFRCTL0);
8470 aic_outb(p, (scsi_conf & ENSPCHK) | aic7xxx_seltime | term |
8471 ENSTIMER | ACTNEGEN, SXFRCTL1);
8472 aic_outb(p, 0, SIMODE0);
8473 aic_outb(p, ENSELTIMO | ENSCSIRST | ENSCSIPERR, SIMODE1);
8474 aic_outb(p, 0, SCSIRATE);
8475
8476 /* Select channel A */
8477 aic_outb(p, aic_inb(p, SBLKCTL) & ~SELBUSB, SBLKCTL);
8478 }
8479
8480 if (p->features & AHC_ULTRA2)
8481 {
8482 aic_outb(p, p->scsi_id, SCSIID_ULTRA2);
8483 }
8484 else
8485 {
8486 aic_outb(p, p->scsi_id, SCSIID);
8487 }
8488 if ((p->flags & AHC_SEEPROM_FOUND) || (aic7xxx_override_term != -1))
8489 term = (aic_inb(p, SXFRCTL1) & STPWEN);
8490 else
8491 term = ((p->flags & (AHC_TERM_ENB_A|AHC_TERM_ENB_LVD)) ? STPWEN : 0);
8492 scsi_conf = aic_inb(p, SCSICONF);
8493 aic_outb(p, DFON | SPIOEN, SXFRCTL0);
8494 aic_outb(p, (scsi_conf & ENSPCHK) | aic7xxx_seltime | term |
8495 ENSTIMER | ACTNEGEN, SXFRCTL1);
8496 aic_outb(p, 0, SIMODE0);
8497 /*
8498 * If we are a cardbus adapter then don't enable SCSI reset detection.
8499 * We shouldn't likely be sharing SCSI busses with someone else, and
8500 * if we don't have a cable currently plugged into the controller then
8501 * we won't have a power source for the SCSI termination, which means
8502 * we'll see infinite incoming bus resets.
8503 */
8504 if(p->flags & AHC_NO_STPWEN)
8505 aic_outb(p, ENSELTIMO | ENSCSIPERR, SIMODE1);
8506 else
8507 aic_outb(p, ENSELTIMO | ENSCSIRST | ENSCSIPERR, SIMODE1);
8508 aic_outb(p, 0, SCSIRATE);
8509 if ( p->features & AHC_ULTRA2)
8510 aic_outb(p, 0, SCSIOFFSET);
8511
8512 /*
8513 * Look at the information that board initialization or the board
8514 * BIOS has left us. In the lower four bits of each target's
8515 * scratch space any value other than 0 indicates that we should
8516 * initiate synchronous transfers. If it's zero, the user or the
8517 * BIOS has decided to disable synchronous negotiation to that
8518 * target so we don't activate the needsdtr flag.
8519 */
8520 if ((p->features & (AHC_TWIN|AHC_WIDE)) == 0)
8521 {
8522 max_targets = 8;
8523 }
8524 else
8525 {
8526 max_targets = 16;
8527 }
8528
8529 if (!(aic7xxx_no_reset))
8530 {
8531 /*
8532 * If we reset the bus, then clear the transfer settings, else leave
8533 * them be
8534 */
8535 for (i = 0; i < max_targets; i++)
8536 {
8537 aic_outb(p, 0, TARG_SCSIRATE + i);
8538 if (p->features & AHC_ULTRA2)
8539 {
8540 aic_outb(p, 0, TARG_OFFSET + i);
8541 }
8542 p->transinfo[i].cur_offset = 0;
8543 p->transinfo[i].cur_period = 0;
8544 p->transinfo[i].cur_width = MSG_EXT_WDTR_BUS_8_BIT;
8545 }
8546
8547 /*
8548 * If we reset the bus, then clear the transfer settings, else leave
8549 * them be.
8550 */
8551 aic_outb(p, 0, ULTRA_ENB);
8552 aic_outb(p, 0, ULTRA_ENB + 1);
8553 p->ultraenb = 0;
8554 }
8555
8556 /*
8557 * Allocate enough hardware scbs to handle the maximum number of
8558 * concurrent transactions we can have. We have to make sure that
8559 * the allocated memory is contiguous memory. The Linux kmalloc
8560 * routine should only allocate contiguous memory, but note that
8561 * this could be a problem if kmalloc() is changed.
8562 */
8563 {
8564 size_t array_size;
8565 unsigned int hscb_physaddr;
8566
8567 array_size = p->scb_data->maxscbs * sizeof(struct aic7xxx_hwscb);
8568 if (p->scb_data->hscbs == NULL)
8569 {
8570 /* pci_alloc_consistent enforces the alignment already and
8571 * clears the area as well.
8572 */
8573 p->scb_data->hscbs = pci_alloc_consistent(p->pdev, array_size,
8574 &p->scb_data->hscbs_dma);
8575 /* We have to use pci_free_consistent, not kfree */
8576 p->scb_data->hscb_kmalloc_ptr = NULL;
8577 p->scb_data->hscbs_dma_len = array_size;
8578 }
8579 if (p->scb_data->hscbs == NULL)
8580 {
8581 printk("(scsi%d) Unable to allocate hardware SCB array; "
8582 "failing detection.\n", p->host_no);
8583 aic_outb(p, 0, SIMODE1);
8584 p->irq = 0;
8585 return(0);
8586 }
8587
8588 hscb_physaddr = p->scb_data->hscbs_dma;
8589 aic_outb(p, hscb_physaddr & 0xFF, HSCB_ADDR);
8590 aic_outb(p, (hscb_physaddr >> 8) & 0xFF, HSCB_ADDR + 1);
8591 aic_outb(p, (hscb_physaddr >> 16) & 0xFF, HSCB_ADDR + 2);
8592 aic_outb(p, (hscb_physaddr >> 24) & 0xFF, HSCB_ADDR + 3);
8593
8594 /* Set up the fifo areas at the same time */
8595 p->untagged_scbs = pci_alloc_consistent(p->pdev, 3*256, &p->fifo_dma);
8596 if (p->untagged_scbs == NULL)
8597 {
8598 printk("(scsi%d) Unable to allocate hardware FIFO arrays; "
8599 "failing detection.\n", p->host_no);
8600 p->irq = 0;
8601 return(0);
8602 }
8603
8604 p->qoutfifo = p->untagged_scbs + 256;
8605 p->qinfifo = p->qoutfifo + 256;
8606 for (i = 0; i < 256; i++)
8607 {
8608 p->untagged_scbs[i] = SCB_LIST_NULL;
8609 p->qinfifo[i] = SCB_LIST_NULL;
8610 p->qoutfifo[i] = SCB_LIST_NULL;
8611 }
8612
8613 hscb_physaddr = p->fifo_dma;
8614 aic_outb(p, hscb_physaddr & 0xFF, SCBID_ADDR);
8615 aic_outb(p, (hscb_physaddr >> 8) & 0xFF, SCBID_ADDR + 1);
8616 aic_outb(p, (hscb_physaddr >> 16) & 0xFF, SCBID_ADDR + 2);
8617 aic_outb(p, (hscb_physaddr >> 24) & 0xFF, SCBID_ADDR + 3);
8618 }
8619
8620 /* The Q-FIFOs we just set up are all empty */
8621 aic_outb(p, 0, QINPOS);
8622 aic_outb(p, 0, KERNEL_QINPOS);
8623 aic_outb(p, 0, QOUTPOS);
8624
8625 if(p->features & AHC_QUEUE_REGS)
8626 {
8627 aic_outb(p, SCB_QSIZE_256, QOFF_CTLSTA);
8628 aic_outb(p, 0, SDSCB_QOFF);
8629 aic_outb(p, 0, SNSCB_QOFF);
8630 aic_outb(p, 0, HNSCB_QOFF);
8631 }
8632
8633 /*
8634 * We don't have any waiting selections or disconnected SCBs.
8635 */
8636 aic_outb(p, SCB_LIST_NULL, WAITING_SCBH);
8637 aic_outb(p, SCB_LIST_NULL, DISCONNECTED_SCBH);
8638
8639 /*
8640 * Message out buffer starts empty
8641 */
8642 aic_outb(p, MSG_NOOP, MSG_OUT);
8643 aic_outb(p, MSG_NOOP, LAST_MSG);
8644
8645 /*
8646 * Set all the other asundry items that haven't been set yet.
8647 * This includes just dumping init values to a lot of registers simply
8648 * to make sure they've been touched and are ready for use parity wise
8649 * speaking.
8650 */
8651 aic_outb(p, 0, TMODE_CMDADDR);
8652 aic_outb(p, 0, TMODE_CMDADDR + 1);
8653 aic_outb(p, 0, TMODE_CMDADDR + 2);
8654 aic_outb(p, 0, TMODE_CMDADDR + 3);
8655 aic_outb(p, 0, TMODE_CMDADDR_NEXT);
8656
8657 /*
8658 * Link us into the list of valid hosts
8659 */
8660 p->next = first_aic7xxx;
8661 first_aic7xxx = p;
8662
8663 /*
8664 * Allocate the first set of scbs for this controller. This is to stream-
8665 * line code elsewhere in the driver. If we have to check for the existence
8666 * of scbs in certain code sections, it slows things down. However, as
8667 * soon as we register the IRQ for this card, we could get an interrupt that
8668 * includes possibly the SCSI_RSTI interrupt. If we catch that interrupt
8669 * then we are likely to segfault if we don't have at least one chunk of
8670 * SCBs allocated or add checks all through the reset code to make sure
8671 * that the SCBs have been allocated which is an invalid running condition
8672 * and therefore I think it's preferable to simply pre-allocate the first
8673 * chunk of SCBs.
8674 */
8675 aic7xxx_allocate_scb(p);
8676
8677 /*
8678 * Load the sequencer program, then re-enable the board -
8679 * resetting the AIC-7770 disables it, leaving the lights
8680 * on with nobody home.
8681 */
8682 aic7xxx_loadseq(p);
8683
8684 /*
8685 * Make sure the AUTOFLUSHDIS bit is *not* set in the SBLKCTL register
8686 */
8687 aic_outb(p, aic_inb(p, SBLKCTL) & ~AUTOFLUSHDIS, SBLKCTL);
8688
8689 if ( (p->chip & AHC_CHIPID_MASK) == AHC_AIC7770 )
8690 {
8691 aic_outb(p, ENABLE, BCTL); /* Enable the boards BUS drivers. */
8692 }
8693
8694 if ( !(aic7xxx_no_reset) )
8695 {
8696 if (p->features & AHC_TWIN)
8697 {
8698 if (aic7xxx_verbose & VERBOSE_PROBE2)
8699 printk(KERN_INFO "(scsi%d) Resetting channel B\n", p->host_no);
8700 aic_outb(p, aic_inb(p, SBLKCTL) | SELBUSB, SBLKCTL);
8701 aic7xxx_reset_current_bus(p);
8702 aic_outb(p, aic_inb(p, SBLKCTL) & ~SELBUSB, SBLKCTL);
8703 }
8704 /* Reset SCSI bus A. */
8705 if (aic7xxx_verbose & VERBOSE_PROBE2)
8706 { /* In case we are a 3940, 3985, or 7895, print the right channel */
8707 char *channel = "";
8708 if (p->flags & AHC_MULTI_CHANNEL)
8709 {
8710 channel = " A";
8711 if (p->flags & (AHC_CHNLB|AHC_CHNLC))
8712 channel = (p->flags & AHC_CHNLB) ? " B" : " C";
8713 }
8714 printk(KERN_INFO "(scsi%d) Resetting channel%s\n", p->host_no, channel);
8715 }
8716
8717 aic7xxx_reset_current_bus(p);
8718
8719 /*
8720 * Delay for the reset delay by setting the timer, this will delay
8721 * future commands sent to any devices.
8722 */
8723 p->flags |= AHC_RESET_DELAY;
8724 for(i=0; i<MAX_TARGETS; i++)
8725 {
8726 p->dev_expires[i] = jiffies + (4 * HZ);
8727 p->dev_timer_active |= (0x01 << i);
8728 }
8729 p->dev_timer.expires = p->dev_expires[p->scsi_id];
8730 add_timer(&p->dev_timer);
8731 p->dev_timer_active |= (0x01 << MAX_TARGETS);
8732 }
8733 else
8734 {
8735 if (!reset_delay)
8736 {
8737 printk(KERN_INFO "(scsi%d) Not resetting SCSI bus. Note: Don't use "
8738 "the no_reset\n", p->host_no);
8739 printk(KERN_INFO "(scsi%d) option unless you have a verifiable need "
8740 "for it.\n", p->host_no);
8741 }
8742 }
8743
8744 /*
8745 * Register IRQ with the kernel. Only allow sharing IRQs with
8746 * PCI devices.
8747 */
8748 if (!(p->chip & AHC_PCI))
8749 {
8750 result = (request_irq(p->irq, do_aic7xxx_isr, 0, "aic7xxx", p));
8751 }
8752 else
8753 {
8754 result = (request_irq(p->irq, do_aic7xxx_isr, SA_SHIRQ,
8755 "aic7xxx", p));
8756 if (result < 0)
8757 {
8758 result = (request_irq(p->irq, do_aic7xxx_isr, SA_INTERRUPT | SA_SHIRQ,
8759 "aic7xxx", p));
8760 }
8761 }
8762 if (result < 0)
8763 {
8764 printk(KERN_WARNING "(scsi%d) Couldn't register IRQ %d, ignoring "
8765 "controller.\n", p->host_no, p->irq);
8766 aic_outb(p, 0, SIMODE1);
8767 p->irq = 0;
8768 return (0);
8769 }
8770
8771 if(aic_inb(p, INTSTAT) & INT_PEND)
8772 printk(INFO_LEAD "spurious interrupt during configuration, cleared.\n",
8773 p->host_no, -1, -1 , -1);
8774 aic7xxx_clear_intstat(p);
8775
8776 unpause_sequencer(p, /* unpause_always */ TRUE);
8777
8778 return (found);
8779 }
8780
8781 /*+F*************************************************************************
8782 * Function:
8783 * aic7xxx_chip_reset
8784 *
8785 * Description:
8786 * Perform a chip reset on the aic7xxx SCSI controller. The controller
8787 * is paused upon return.
8788 *-F*************************************************************************/
8789 int
aic7xxx_chip_reset(struct aic7xxx_host * p)8790 aic7xxx_chip_reset(struct aic7xxx_host *p)
8791 {
8792 unsigned char sblkctl;
8793 int wait;
8794
8795 /*
8796 * For some 274x boards, we must clear the CHIPRST bit and pause
8797 * the sequencer. For some reason, this makes the driver work.
8798 */
8799 aic_outb(p, PAUSE | CHIPRST, HCNTRL);
8800
8801 /*
8802 * In the future, we may call this function as a last resort for
8803 * error handling. Let's be nice and not do any unnecessary delays.
8804 */
8805 wait = 1000; /* 1 msec (1000 * 1 msec) */
8806 while (--wait && !(aic_inb(p, HCNTRL) & CHIPRSTACK))
8807 {
8808 udelay(1); /* 1 usec */
8809 }
8810
8811 pause_sequencer(p);
8812
8813 sblkctl = aic_inb(p, SBLKCTL) & (SELBUSB|SELWIDE);
8814 if (p->chip & AHC_PCI)
8815 sblkctl &= ~SELBUSB;
8816 switch( sblkctl )
8817 {
8818 case 0: /* normal narrow card */
8819 break;
8820 case 2: /* Wide card */
8821 p->features |= AHC_WIDE;
8822 break;
8823 case 8: /* Twin card */
8824 p->features |= AHC_TWIN;
8825 p->flags |= AHC_MULTI_CHANNEL;
8826 break;
8827 default: /* hmmm...we don't know what this is */
8828 printk(KERN_WARNING "aic7xxx: Unsupported adapter type %d, ignoring.\n",
8829 aic_inb(p, SBLKCTL) & 0x0a);
8830 return(-1);
8831 }
8832 return(0);
8833 }
8834
8835 /*+F*************************************************************************
8836 * Function:
8837 * aic7xxx_alloc
8838 *
8839 * Description:
8840 * Allocate and initialize a host structure. Returns NULL upon error
8841 * and a pointer to a aic7xxx_host struct upon success.
8842 *-F*************************************************************************/
8843 static struct aic7xxx_host *
aic7xxx_alloc(Scsi_Host_Template * sht,struct aic7xxx_host * temp)8844 aic7xxx_alloc(Scsi_Host_Template *sht, struct aic7xxx_host *temp)
8845 {
8846 struct aic7xxx_host *p = NULL;
8847 struct Scsi_Host *host;
8848 int i;
8849
8850 /*
8851 * Allocate a storage area by registering us with the mid-level
8852 * SCSI layer.
8853 */
8854 host = scsi_register(sht, sizeof(struct aic7xxx_host));
8855
8856 if (host != NULL)
8857 {
8858 p = (struct aic7xxx_host *) host->hostdata;
8859 memset(p, 0, sizeof(struct aic7xxx_host));
8860 *p = *temp;
8861 p->host = host;
8862 host->max_sectors = 512;
8863
8864 p->scb_data = kmalloc(sizeof(scb_data_type), GFP_ATOMIC);
8865 if (p->scb_data != NULL)
8866 {
8867 memset(p->scb_data, 0, sizeof(scb_data_type));
8868 scbq_init (&p->scb_data->free_scbs);
8869 }
8870 else
8871 {
8872 /*
8873 * For some reason we don't have enough memory. Free the
8874 * allocated memory for the aic7xxx_host struct, and return NULL.
8875 */
8876 release_region(p->base, MAXREG - MINREG);
8877 scsi_unregister(host);
8878 return(NULL);
8879 }
8880 p->host_no = host->host_no;
8881 p->tagenable = 0;
8882 p->orderedtag = 0;
8883 for (i=0; i<MAX_TARGETS; i++)
8884 {
8885 p->transinfo[i].goal_period = 255;
8886 p->transinfo[i].goal_offset = 0;
8887 p->transinfo[i].goal_options = 0;
8888 p->transinfo[i].goal_width = MSG_EXT_WDTR_BUS_8_BIT;
8889 }
8890 DRIVER_LOCK_INIT
8891 }
8892 scsi_set_pci_device(host, p->pdev);
8893 return (p);
8894 }
8895
8896 /*+F*************************************************************************
8897 * Function:
8898 * aic7xxx_free
8899 *
8900 * Description:
8901 * Frees and releases all resources associated with an instance of
8902 * the driver (struct aic7xxx_host *).
8903 *-F*************************************************************************/
8904 static void
aic7xxx_free(struct aic7xxx_host * p)8905 aic7xxx_free(struct aic7xxx_host *p)
8906 {
8907 int i;
8908
8909 /*
8910 * Free the allocated hardware SCB space.
8911 */
8912 if (p->scb_data != NULL)
8913 {
8914 struct aic7xxx_scb_dma *scb_dma = NULL;
8915 if (p->scb_data->hscbs != NULL)
8916 {
8917 pci_free_consistent(p->pdev, p->scb_data->hscbs_dma_len,
8918 p->scb_data->hscbs, p->scb_data->hscbs_dma);
8919 p->scb_data->hscbs = p->scb_data->hscb_kmalloc_ptr = NULL;
8920 }
8921 /*
8922 * Free the driver SCBs. These were allocated on an as-need
8923 * basis. We allocated these in groups depending on how many
8924 * we could fit into a given amount of RAM. The tail SCB for
8925 * these allocations has a pointer to the alloced area.
8926 */
8927 for (i = 0; i < p->scb_data->numscbs; i++)
8928 {
8929 if (p->scb_data->scb_array[i]->scb_dma != scb_dma)
8930 {
8931 scb_dma = p->scb_data->scb_array[i]->scb_dma;
8932 pci_free_consistent(p->pdev, scb_dma->dma_len,
8933 (void *)((unsigned long)scb_dma->dma_address
8934 - scb_dma->dma_offset),
8935 scb_dma->dma_address);
8936 }
8937 if (p->scb_data->scb_array[i]->kmalloc_ptr != NULL)
8938 kfree(p->scb_data->scb_array[i]->kmalloc_ptr);
8939 p->scb_data->scb_array[i] = NULL;
8940 }
8941
8942 /*
8943 * Free the SCB data area.
8944 */
8945 kfree(p->scb_data);
8946 }
8947
8948 pci_free_consistent(p->pdev, 3*256, (void *)p->untagged_scbs, p->fifo_dma);
8949 }
8950
8951 /*+F*************************************************************************
8952 * Function:
8953 * aic7xxx_load_seeprom
8954 *
8955 * Description:
8956 * Load the seeprom and configure adapter and target settings.
8957 * Returns 1 if the load was successful and 0 otherwise.
8958 *-F*************************************************************************/
8959 static void
aic7xxx_load_seeprom(struct aic7xxx_host * p,unsigned char * sxfrctl1)8960 aic7xxx_load_seeprom(struct aic7xxx_host *p, unsigned char *sxfrctl1)
8961 {
8962 int have_seeprom = 0;
8963 int i, max_targets, mask;
8964 unsigned char scsirate, scsi_conf;
8965 unsigned short scarray[128];
8966 struct seeprom_config *sc = (struct seeprom_config *) scarray;
8967
8968 if (aic7xxx_verbose & VERBOSE_PROBE2)
8969 {
8970 printk(KERN_INFO "aic7xxx: Loading serial EEPROM...");
8971 }
8972 switch (p->chip)
8973 {
8974 case (AHC_AIC7770|AHC_EISA): /* None of these adapters have seeproms. */
8975 if (aic_inb(p, SCSICONF) & TERM_ENB)
8976 p->flags |= AHC_TERM_ENB_A;
8977 if ( (p->features & AHC_TWIN) && (aic_inb(p, SCSICONF + 1) & TERM_ENB) )
8978 p->flags |= AHC_TERM_ENB_B;
8979 break;
8980
8981 case (AHC_AIC7770|AHC_VL):
8982 have_seeprom = read_284x_seeprom(p, (struct seeprom_config *) scarray);
8983 break;
8984
8985 default:
8986 have_seeprom = read_seeprom(p, (p->flags & (AHC_CHNLB|AHC_CHNLC)),
8987 scarray, p->sc_size, p->sc_type);
8988 if (!have_seeprom)
8989 {
8990 if(p->sc_type == C46)
8991 have_seeprom = read_seeprom(p, (p->flags & (AHC_CHNLB|AHC_CHNLC)),
8992 scarray, p->sc_size, C56_66);
8993 else
8994 have_seeprom = read_seeprom(p, (p->flags & (AHC_CHNLB|AHC_CHNLC)),
8995 scarray, p->sc_size, C46);
8996 }
8997 if (!have_seeprom)
8998 {
8999 p->sc_size = 128;
9000 have_seeprom = read_seeprom(p, 4*(p->flags & (AHC_CHNLB|AHC_CHNLC)),
9001 scarray, p->sc_size, p->sc_type);
9002 if (!have_seeprom)
9003 {
9004 if(p->sc_type == C46)
9005 have_seeprom = read_seeprom(p, 4*(p->flags & (AHC_CHNLB|AHC_CHNLC)),
9006 scarray, p->sc_size, C56_66);
9007 else
9008 have_seeprom = read_seeprom(p, 4*(p->flags & (AHC_CHNLB|AHC_CHNLC)),
9009 scarray, p->sc_size, C46);
9010 }
9011 }
9012 break;
9013 }
9014
9015 if (!have_seeprom)
9016 {
9017 if (aic7xxx_verbose & VERBOSE_PROBE2)
9018 {
9019 printk("\naic7xxx: No SEEPROM available.\n");
9020 }
9021 p->flags |= AHC_NEWEEPROM_FMT;
9022 if (aic_inb(p, SCSISEQ) == 0)
9023 {
9024 p->flags |= AHC_USEDEFAULTS;
9025 p->flags &= ~AHC_BIOS_ENABLED;
9026 p->scsi_id = p->scsi_id_b = 7;
9027 *sxfrctl1 |= STPWEN;
9028 if (aic7xxx_verbose & VERBOSE_PROBE2)
9029 {
9030 printk("aic7xxx: Using default values.\n");
9031 }
9032 }
9033 else if (aic7xxx_verbose & VERBOSE_PROBE2)
9034 {
9035 printk("aic7xxx: Using leftover BIOS values.\n");
9036 }
9037 if ( ((p->chip & ~AHC_CHIPID_MASK) == AHC_PCI) && (*sxfrctl1 & STPWEN) )
9038 {
9039 p->flags |= AHC_TERM_ENB_SE_LOW | AHC_TERM_ENB_SE_HIGH;
9040 sc->adapter_control &= ~CFAUTOTERM;
9041 sc->adapter_control |= CFSTERM | CFWSTERM | CFLVDSTERM;
9042 }
9043 if (aic7xxx_extended)
9044 p->flags |= (AHC_EXTEND_TRANS_A | AHC_EXTEND_TRANS_B);
9045 else
9046 p->flags &= ~(AHC_EXTEND_TRANS_A | AHC_EXTEND_TRANS_B);
9047 }
9048 else
9049 {
9050 if (aic7xxx_verbose & VERBOSE_PROBE2)
9051 {
9052 printk("done\n");
9053 }
9054
9055 /*
9056 * Note things in our flags
9057 */
9058 p->flags |= AHC_SEEPROM_FOUND;
9059
9060 /*
9061 * Update the settings in sxfrctl1 to match the termination settings.
9062 */
9063 *sxfrctl1 = 0;
9064
9065 /*
9066 * Get our SCSI ID from the SEEPROM setting...
9067 */
9068 p->scsi_id = (sc->brtime_id & CFSCSIID);
9069
9070 /*
9071 * First process the settings that are different between the VLB
9072 * and PCI adapter seeproms.
9073 */
9074 if ((p->chip & AHC_CHIPID_MASK) == AHC_AIC7770)
9075 {
9076 /* VLB adapter seeproms */
9077 if (sc->bios_control & CF284XEXTEND)
9078 p->flags |= AHC_EXTEND_TRANS_A;
9079
9080 if (sc->adapter_control & CF284XSTERM)
9081 {
9082 *sxfrctl1 |= STPWEN;
9083 p->flags |= AHC_TERM_ENB_SE_LOW | AHC_TERM_ENB_SE_HIGH;
9084 }
9085 }
9086 else
9087 {
9088 /* PCI adapter seeproms */
9089 if (sc->bios_control & CFEXTEND)
9090 p->flags |= AHC_EXTEND_TRANS_A;
9091 if (sc->bios_control & CFBIOSEN)
9092 p->flags |= AHC_BIOS_ENABLED;
9093 else
9094 p->flags &= ~AHC_BIOS_ENABLED;
9095
9096 if (sc->adapter_control & CFSTERM)
9097 {
9098 *sxfrctl1 |= STPWEN;
9099 p->flags |= AHC_TERM_ENB_SE_LOW | AHC_TERM_ENB_SE_HIGH;
9100 }
9101 }
9102 memcpy(&p->sc, sc, sizeof(struct seeprom_config));
9103 }
9104
9105 p->discenable = 0;
9106
9107 /*
9108 * Limit to 16 targets just in case. The 2842 for one is known to
9109 * blow the max_targets setting, future cards might also.
9110 */
9111 max_targets = ((p->features & (AHC_TWIN | AHC_WIDE)) ? 16 : 8);
9112
9113 if (have_seeprom)
9114 {
9115 for (i = 0; i < max_targets; i++)
9116 {
9117 if( ((p->features & AHC_ULTRA) &&
9118 !(sc->adapter_control & CFULTRAEN) &&
9119 (sc->device_flags[i] & CFSYNCHISULTRA)) ||
9120 (sc->device_flags[i] & CFNEWULTRAFORMAT) )
9121 {
9122 p->flags |= AHC_NEWEEPROM_FMT;
9123 break;
9124 }
9125 }
9126 }
9127
9128 for (i = 0; i < max_targets; i++)
9129 {
9130 mask = (0x01 << i);
9131 if (!have_seeprom)
9132 {
9133 if (aic_inb(p, SCSISEQ) != 0)
9134 {
9135 /*
9136 * OK...the BIOS set things up and left behind the settings we need.
9137 * Just make our sc->device_flags[i] entry match what the card has
9138 * set for this device.
9139 */
9140 p->discenable =
9141 ~(aic_inb(p, DISC_DSB) | (aic_inb(p, DISC_DSB + 1) << 8) );
9142 p->ultraenb =
9143 (aic_inb(p, ULTRA_ENB) | (aic_inb(p, ULTRA_ENB + 1) << 8) );
9144 sc->device_flags[i] = (p->discenable & mask) ? CFDISC : 0;
9145 if (aic_inb(p, TARG_SCSIRATE + i) & WIDEXFER)
9146 sc->device_flags[i] |= CFWIDEB;
9147 if (p->features & AHC_ULTRA2)
9148 {
9149 if (aic_inb(p, TARG_OFFSET + i))
9150 {
9151 sc->device_flags[i] |= CFSYNCH;
9152 sc->device_flags[i] |= (aic_inb(p, TARG_SCSIRATE + i) & 0x07);
9153 if ( (aic_inb(p, TARG_SCSIRATE + i) & 0x18) == 0x18 )
9154 sc->device_flags[i] |= CFSYNCHISULTRA;
9155 }
9156 }
9157 else
9158 {
9159 if (aic_inb(p, TARG_SCSIRATE + i) & ~WIDEXFER)
9160 {
9161 sc->device_flags[i] |= CFSYNCH;
9162 if (p->features & AHC_ULTRA)
9163 sc->device_flags[i] |= ((p->ultraenb & mask) ?
9164 CFSYNCHISULTRA : 0);
9165 }
9166 }
9167 }
9168 else
9169 {
9170 /*
9171 * Assume the BIOS has NOT been run on this card and nothing between
9172 * the card and the devices is configured yet.
9173 */
9174 sc->device_flags[i] = CFDISC;
9175 if (p->features & AHC_WIDE)
9176 sc->device_flags[i] |= CFWIDEB;
9177 if (p->features & AHC_ULTRA3)
9178 sc->device_flags[i] |= 2;
9179 else if (p->features & AHC_ULTRA2)
9180 sc->device_flags[i] |= 3;
9181 else if (p->features & AHC_ULTRA)
9182 sc->device_flags[i] |= CFSYNCHISULTRA;
9183 sc->device_flags[i] |= CFSYNCH;
9184 aic_outb(p, 0, TARG_SCSIRATE + i);
9185 if (p->features & AHC_ULTRA2)
9186 aic_outb(p, 0, TARG_OFFSET + i);
9187 }
9188 }
9189 if (sc->device_flags[i] & CFDISC)
9190 {
9191 p->discenable |= mask;
9192 }
9193 if (p->flags & AHC_NEWEEPROM_FMT)
9194 {
9195 if ( !(p->features & AHC_ULTRA2) )
9196 {
9197 /*
9198 * I know of two different Ultra BIOSes that do this differently.
9199 * One on the Gigabyte 6BXU mb that wants flags[i] & CFXFER to
9200 * be == to 0x03 and SYNCHISULTRA to be true to mean 40MByte/s
9201 * while on the IBM Netfinity 5000 they want the same thing
9202 * to be something else, while flags[i] & CFXFER == 0x03 and
9203 * SYNCHISULTRA false should be 40MByte/s. So, we set both to
9204 * 40MByte/s and the lower speeds be damned. People will have
9205 * to select around the conversely mapped lower speeds in order
9206 * to select lower speeds on these boards.
9207 */
9208 if ( (sc->device_flags[i] & CFNEWULTRAFORMAT) &&
9209 ((sc->device_flags[i] & CFXFER) == 0x03) )
9210 {
9211 sc->device_flags[i] &= ~CFXFER;
9212 sc->device_flags[i] |= CFSYNCHISULTRA;
9213 }
9214 if (sc->device_flags[i] & CFSYNCHISULTRA)
9215 {
9216 p->ultraenb |= mask;
9217 }
9218 }
9219 else if ( !(sc->device_flags[i] & CFNEWULTRAFORMAT) &&
9220 (p->features & AHC_ULTRA2) &&
9221 (sc->device_flags[i] & CFSYNCHISULTRA) )
9222 {
9223 p->ultraenb |= mask;
9224 }
9225 }
9226 else if (sc->adapter_control & CFULTRAEN)
9227 {
9228 p->ultraenb |= mask;
9229 }
9230 if ( (sc->device_flags[i] & CFSYNCH) == 0)
9231 {
9232 sc->device_flags[i] &= ~CFXFER;
9233 p->ultraenb &= ~mask;
9234 p->transinfo[i].user_offset = 0;
9235 p->transinfo[i].user_period = 0;
9236 p->transinfo[i].user_options = 0;
9237 p->transinfo[i].cur_offset = 0;
9238 p->transinfo[i].cur_period = 0;
9239 p->transinfo[i].cur_options = 0;
9240 p->needsdtr_copy &= ~mask;
9241 }
9242 else
9243 {
9244 if (p->features & AHC_ULTRA3)
9245 {
9246 p->transinfo[i].user_offset = MAX_OFFSET_ULTRA2;
9247 p->transinfo[i].cur_offset = aic_inb(p, TARG_OFFSET + i);
9248 if( (sc->device_flags[i] & CFXFER) < 0x03 )
9249 {
9250 scsirate = (sc->device_flags[i] & CFXFER);
9251 p->transinfo[i].user_options = MSG_EXT_PPR_OPTION_DT_CRC;
9252 if( (aic_inb(p, TARG_SCSIRATE + i) & CFXFER) < 0x03 )
9253 {
9254 p->transinfo[i].cur_options =
9255 ((aic_inb(p, TARG_SCSIRATE + i) & 0x40) ?
9256 MSG_EXT_PPR_OPTION_DT_CRC : MSG_EXT_PPR_OPTION_DT_UNITS);
9257 }
9258 else
9259 {
9260 p->transinfo[i].cur_options = 0;
9261 }
9262 }
9263 else
9264 {
9265 scsirate = (sc->device_flags[i] & CFXFER) |
9266 ((p->ultraenb & mask) ? 0x18 : 0x10);
9267 p->transinfo[i].user_options = 0;
9268 p->transinfo[i].cur_options = 0;
9269 }
9270 p->transinfo[i].user_period = aic7xxx_find_period(p, scsirate,
9271 AHC_SYNCRATE_ULTRA3);
9272 p->transinfo[i].cur_period = aic7xxx_find_period(p,
9273 aic_inb(p, TARG_SCSIRATE + i),
9274 AHC_SYNCRATE_ULTRA3);
9275 }
9276 else if (p->features & AHC_ULTRA2)
9277 {
9278 p->transinfo[i].user_offset = MAX_OFFSET_ULTRA2;
9279 p->transinfo[i].cur_offset = aic_inb(p, TARG_OFFSET + i);
9280 scsirate = (sc->device_flags[i] & CFXFER) |
9281 ((p->ultraenb & mask) ? 0x18 : 0x10);
9282 p->transinfo[i].user_options = 0;
9283 p->transinfo[i].cur_options = 0;
9284 p->transinfo[i].user_period = aic7xxx_find_period(p, scsirate,
9285 AHC_SYNCRATE_ULTRA2);
9286 p->transinfo[i].cur_period = aic7xxx_find_period(p,
9287 aic_inb(p, TARG_SCSIRATE + i),
9288 AHC_SYNCRATE_ULTRA2);
9289 }
9290 else
9291 {
9292 scsirate = (sc->device_flags[i] & CFXFER) << 4;
9293 p->transinfo[i].user_options = 0;
9294 p->transinfo[i].cur_options = 0;
9295 p->transinfo[i].user_offset = MAX_OFFSET_8BIT;
9296 if (p->features & AHC_ULTRA)
9297 {
9298 short ultraenb;
9299 ultraenb = aic_inb(p, ULTRA_ENB) |
9300 (aic_inb(p, ULTRA_ENB + 1) << 8);
9301 p->transinfo[i].user_period = aic7xxx_find_period(p,
9302 scsirate,
9303 (p->ultraenb & mask) ?
9304 AHC_SYNCRATE_ULTRA :
9305 AHC_SYNCRATE_FAST);
9306 p->transinfo[i].cur_period = aic7xxx_find_period(p,
9307 aic_inb(p, TARG_SCSIRATE + i),
9308 (ultraenb & mask) ?
9309 AHC_SYNCRATE_ULTRA :
9310 AHC_SYNCRATE_FAST);
9311 }
9312 else
9313 p->transinfo[i].user_period = aic7xxx_find_period(p,
9314 scsirate, AHC_SYNCRATE_FAST);
9315 }
9316 p->needsdtr_copy |= mask;
9317 }
9318 if ( (sc->device_flags[i] & CFWIDEB) && (p->features & AHC_WIDE) )
9319 {
9320 p->transinfo[i].user_width = MSG_EXT_WDTR_BUS_16_BIT;
9321 p->needwdtr_copy |= mask;
9322 }
9323 else
9324 {
9325 p->transinfo[i].user_width = MSG_EXT_WDTR_BUS_8_BIT;
9326 p->needwdtr_copy &= ~mask;
9327 }
9328 p->transinfo[i].cur_width =
9329 (aic_inb(p, TARG_SCSIRATE + i) & WIDEXFER) ?
9330 MSG_EXT_WDTR_BUS_16_BIT : MSG_EXT_WDTR_BUS_8_BIT;
9331 }
9332 aic_outb(p, ~(p->discenable & 0xFF), DISC_DSB);
9333 aic_outb(p, ~((p->discenable >> 8) & 0xFF), DISC_DSB + 1);
9334 p->needppr = p->needppr_copy = 0;
9335 p->needwdtr = p->needwdtr_copy;
9336 p->needsdtr = p->needsdtr_copy;
9337 p->dtr_pending = 0;
9338
9339 /*
9340 * We set the p->ultraenb from the SEEPROM to begin with, but now we make
9341 * it match what is already down in the card. If we are doing a reset
9342 * on the card then this will get put back to a default state anyway.
9343 * This allows us to not have to pre-emptively negotiate when using the
9344 * no_reset option.
9345 */
9346 if (p->features & AHC_ULTRA)
9347 p->ultraenb = aic_inb(p, ULTRA_ENB) | (aic_inb(p, ULTRA_ENB + 1) << 8);
9348
9349
9350 scsi_conf = (p->scsi_id & HSCSIID);
9351
9352 if(have_seeprom)
9353 {
9354 p->adapter_control = sc->adapter_control;
9355 p->bios_control = sc->bios_control;
9356
9357 switch (p->chip & AHC_CHIPID_MASK)
9358 {
9359 case AHC_AIC7895:
9360 case AHC_AIC7896:
9361 case AHC_AIC7899:
9362 if (p->adapter_control & CFBPRIMARY)
9363 p->flags |= AHC_CHANNEL_B_PRIMARY;
9364 default:
9365 break;
9366 }
9367
9368 if (sc->adapter_control & CFSPARITY)
9369 scsi_conf |= ENSPCHK;
9370 }
9371 else
9372 {
9373 scsi_conf |= ENSPCHK | RESET_SCSI;
9374 }
9375
9376 /*
9377 * Only set the SCSICONF and SCSICONF + 1 registers if we are a PCI card.
9378 * The 2842 and 2742 cards already have these registers set and we don't
9379 * want to muck with them since we don't set all the bits they do.
9380 */
9381 if ( (p->chip & ~AHC_CHIPID_MASK) == AHC_PCI )
9382 {
9383 /* Set the host ID */
9384 aic_outb(p, scsi_conf, SCSICONF);
9385 /* In case we are a wide card */
9386 aic_outb(p, p->scsi_id, SCSICONF + 1);
9387 }
9388 }
9389
9390 /*+F*************************************************************************
9391 * Function:
9392 * aic7xxx_configure_bugs
9393 *
9394 * Description:
9395 * Take the card passed in and set the appropriate bug flags based upon
9396 * the card model. Also make any changes needed to device registers or
9397 * PCI registers while we are here.
9398 *-F*************************************************************************/
9399 static void
aic7xxx_configure_bugs(struct aic7xxx_host * p)9400 aic7xxx_configure_bugs(struct aic7xxx_host *p)
9401 {
9402 unsigned short tmp_word;
9403
9404 switch(p->chip & AHC_CHIPID_MASK)
9405 {
9406 case AHC_AIC7860:
9407 p->bugs |= AHC_BUG_PCI_2_1_RETRY;
9408 /* fall through */
9409 case AHC_AIC7850:
9410 case AHC_AIC7870:
9411 p->bugs |= AHC_BUG_TMODE_WIDEODD | AHC_BUG_CACHETHEN | AHC_BUG_PCI_MWI;
9412 break;
9413 case AHC_AIC7880:
9414 p->bugs |= AHC_BUG_TMODE_WIDEODD | AHC_BUG_PCI_2_1_RETRY |
9415 AHC_BUG_CACHETHEN | AHC_BUG_PCI_MWI;
9416 break;
9417 case AHC_AIC7890:
9418 p->bugs |= AHC_BUG_AUTOFLUSH | AHC_BUG_CACHETHEN;
9419 break;
9420 case AHC_AIC7892:
9421 p->bugs |= AHC_BUG_SCBCHAN_UPLOAD;
9422 break;
9423 case AHC_AIC7895:
9424 p->bugs |= AHC_BUG_TMODE_WIDEODD | AHC_BUG_PCI_2_1_RETRY |
9425 AHC_BUG_CACHETHEN | AHC_BUG_PCI_MWI;
9426 break;
9427 case AHC_AIC7896:
9428 p->bugs |= AHC_BUG_CACHETHEN_DIS;
9429 break;
9430 case AHC_AIC7899:
9431 p->bugs |= AHC_BUG_SCBCHAN_UPLOAD;
9432 break;
9433 default:
9434 /* Nothing to do */
9435 break;
9436 }
9437
9438 /*
9439 * Now handle the bugs that require PCI register or card register tweaks
9440 */
9441 pci_read_config_word(p->pdev, PCI_COMMAND, &tmp_word);
9442 if(p->bugs & AHC_BUG_PCI_MWI)
9443 {
9444 tmp_word &= ~PCI_COMMAND_INVALIDATE;
9445 }
9446 else
9447 {
9448 tmp_word |= PCI_COMMAND_INVALIDATE;
9449 }
9450 pci_write_config_word(p->pdev, PCI_COMMAND, tmp_word);
9451
9452 if(p->bugs & AHC_BUG_CACHETHEN)
9453 {
9454 aic_outb(p, aic_inb(p, DSCOMMAND0) & ~CACHETHEN, DSCOMMAND0);
9455 }
9456 else if (p->bugs & AHC_BUG_CACHETHEN_DIS)
9457 {
9458 aic_outb(p, aic_inb(p, DSCOMMAND0) | CACHETHEN, DSCOMMAND0);
9459 }
9460
9461 return;
9462 }
9463
9464
9465 /*+F*************************************************************************
9466 * Function:
9467 * aic7xxx_detect
9468 *
9469 * Description:
9470 * Try to detect and register an Adaptec 7770 or 7870 SCSI controller.
9471 *
9472 * XXX - This should really be called aic7xxx_probe(). A sequence of
9473 * probe(), attach()/detach(), and init() makes more sense than
9474 * one do-it-all function. This may be useful when (and if) the
9475 * mid-level SCSI code is overhauled.
9476 *-F*************************************************************************/
9477 int
aic7xxx_detect(Scsi_Host_Template * template)9478 aic7xxx_detect(Scsi_Host_Template *template)
9479 {
9480 struct aic7xxx_host *temp_p = NULL;
9481 struct aic7xxx_host *current_p = NULL;
9482 struct aic7xxx_host *list_p = NULL;
9483 int found = 0;
9484 #if defined(__i386__) || defined(__alpha__)
9485 ahc_flag_type flags = 0;
9486 int type;
9487 #endif
9488 unsigned char sxfrctl1;
9489 #if defined(__i386__) || defined(__alpha__)
9490 unsigned char hcntrl, hostconf;
9491 unsigned int slot, base;
9492 #endif
9493
9494 #ifdef MODULE
9495 /*
9496 * If we are called as a module, the aic7xxx pointer may not be null
9497 * and it would point to our bootup string, just like on the lilo
9498 * command line. IF not NULL, then process this config string with
9499 * aic7xxx_setup
9500 */
9501 if(aic7xxx)
9502 aic7xxx_setup(aic7xxx);
9503 if(dummy_buffer[0] != 'P')
9504 printk(KERN_WARNING "aic7xxx: Please read the file /usr/src/linux/drivers"
9505 "/scsi/README.aic7xxx\n"
9506 "aic7xxx: to see the proper way to specify options to the aic7xxx "
9507 "module\n"
9508 "aic7xxx: Specifically, don't use any commas when passing arguments to\n"
9509 "aic7xxx: insmod or else it might trash certain memory areas.\n");
9510 #endif
9511
9512 template->proc_name = "aic7xxx";
9513 template->sg_tablesize = AIC7XXX_MAX_SG;
9514
9515
9516 #ifdef CONFIG_PCI
9517 /*
9518 * PCI-bus probe.
9519 */
9520 if (pci_present())
9521 {
9522 struct
9523 {
9524 unsigned short vendor_id;
9525 unsigned short device_id;
9526 ahc_chip chip;
9527 ahc_flag_type flags;
9528 ahc_feature features;
9529 int board_name_index;
9530 unsigned short seeprom_size;
9531 unsigned short seeprom_type;
9532 } const aic_pdevs[] = {
9533 {PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_7810, AHC_NONE,
9534 AHC_FNONE, AHC_FENONE, 1,
9535 32, C46 },
9536 {PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_7850, AHC_AIC7850,
9537 AHC_PAGESCBS, AHC_AIC7850_FE, 5,
9538 32, C46 },
9539 {PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_7855, AHC_AIC7850,
9540 AHC_PAGESCBS, AHC_AIC7850_FE, 6,
9541 32, C46 },
9542 {PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_7821, AHC_AIC7860,
9543 AHC_PAGESCBS | AHC_NEWEEPROM_FMT | AHC_BIOS_ENABLED,
9544 AHC_AIC7860_FE, 7,
9545 32, C46 },
9546 {PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_3860, AHC_AIC7860,
9547 AHC_PAGESCBS | AHC_NEWEEPROM_FMT | AHC_BIOS_ENABLED,
9548 AHC_AIC7860_FE, 7,
9549 32, C46 },
9550 {PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_38602, AHC_AIC7860,
9551 AHC_PAGESCBS | AHC_NEWEEPROM_FMT | AHC_BIOS_ENABLED,
9552 AHC_AIC7860_FE, 7,
9553 32, C46 },
9554 {PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_38602, AHC_AIC7860,
9555 AHC_PAGESCBS | AHC_NEWEEPROM_FMT | AHC_BIOS_ENABLED,
9556 AHC_AIC7860_FE, 7,
9557 32, C46 },
9558 {PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_7860, AHC_AIC7860,
9559 AHC_PAGESCBS | AHC_NEWEEPROM_FMT | AHC_BIOS_ENABLED | AHC_MOTHERBOARD,
9560 AHC_AIC7860_FE, 7,
9561 32, C46 },
9562 {PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_7861, AHC_AIC7860,
9563 AHC_PAGESCBS | AHC_NEWEEPROM_FMT | AHC_BIOS_ENABLED,
9564 AHC_AIC7860_FE, 8,
9565 32, C46 },
9566 {PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_7870, AHC_AIC7870,
9567 AHC_PAGESCBS | AHC_BIOS_ENABLED | AHC_MOTHERBOARD,
9568 AHC_AIC7870_FE, 9,
9569 32, C46 },
9570 {PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_7871, AHC_AIC7870,
9571 AHC_PAGESCBS | AHC_BIOS_ENABLED, AHC_AIC7870_FE, 10,
9572 32, C46 },
9573 {PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_7872, AHC_AIC7870,
9574 AHC_PAGESCBS | AHC_BIOS_ENABLED | AHC_MULTI_CHANNEL,
9575 AHC_AIC7870_FE, 11,
9576 32, C56_66 },
9577 {PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_7873, AHC_AIC7870,
9578 AHC_PAGESCBS | AHC_BIOS_ENABLED | AHC_MULTI_CHANNEL,
9579 AHC_AIC7870_FE, 12,
9580 32, C56_66 },
9581 {PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_7874, AHC_AIC7870,
9582 AHC_PAGESCBS | AHC_BIOS_ENABLED, AHC_AIC7870_FE, 13,
9583 32, C46 },
9584 {PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_7880, AHC_AIC7880,
9585 AHC_PAGESCBS | AHC_BIOS_ENABLED | AHC_MOTHERBOARD,
9586 AHC_AIC7880_FE, 14,
9587 32, C46 },
9588 {PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_7881, AHC_AIC7880,
9589 AHC_PAGESCBS | AHC_BIOS_ENABLED, AHC_AIC7880_FE, 15,
9590 32, C46 },
9591 {PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_7882, AHC_AIC7880,
9592 AHC_PAGESCBS | AHC_BIOS_ENABLED | AHC_MULTI_CHANNEL,
9593 AHC_AIC7880_FE, 16,
9594 32, C56_66 },
9595 {PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_7883, AHC_AIC7880,
9596 AHC_PAGESCBS | AHC_BIOS_ENABLED | AHC_MULTI_CHANNEL,
9597 AHC_AIC7880_FE, 17,
9598 32, C56_66 },
9599 {PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_7884, AHC_AIC7880,
9600 AHC_PAGESCBS | AHC_BIOS_ENABLED, AHC_AIC7880_FE, 18,
9601 32, C46 },
9602 {PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_7885, AHC_AIC7880,
9603 AHC_PAGESCBS | AHC_BIOS_ENABLED, AHC_AIC7880_FE, 18,
9604 32, C46 },
9605 {PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_7886, AHC_AIC7880,
9606 AHC_PAGESCBS | AHC_BIOS_ENABLED, AHC_AIC7880_FE, 18,
9607 32, C46 },
9608 {PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_7887, AHC_AIC7880,
9609 AHC_PAGESCBS | AHC_BIOS_ENABLED, AHC_AIC7880_FE | AHC_NEW_AUTOTERM, 19,
9610 32, C46 },
9611 {PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_7888, AHC_AIC7880,
9612 AHC_PAGESCBS | AHC_BIOS_ENABLED, AHC_AIC7880_FE, 18,
9613 32, C46 },
9614 {PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_7895, AHC_AIC7895,
9615 AHC_PAGESCBS | AHC_NEWEEPROM_FMT | AHC_BIOS_ENABLED | AHC_MULTI_CHANNEL,
9616 AHC_AIC7895_FE, 20,
9617 32, C56_66 },
9618 {PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_7890, AHC_AIC7890,
9619 AHC_PAGESCBS | AHC_NEWEEPROM_FMT | AHC_BIOS_ENABLED,
9620 AHC_AIC7890_FE, 21,
9621 32, C46 },
9622 {PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_7890B, AHC_AIC7890,
9623 AHC_PAGESCBS | AHC_NEWEEPROM_FMT | AHC_BIOS_ENABLED,
9624 AHC_AIC7890_FE, 21,
9625 32, C46 },
9626 {PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_2930U2, AHC_AIC7890,
9627 AHC_PAGESCBS | AHC_NEWEEPROM_FMT | AHC_BIOS_ENABLED,
9628 AHC_AIC7890_FE, 22,
9629 32, C46 },
9630 {PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_2940U2, AHC_AIC7890,
9631 AHC_PAGESCBS | AHC_NEWEEPROM_FMT | AHC_BIOS_ENABLED,
9632 AHC_AIC7890_FE, 23,
9633 32, C46 },
9634 {PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_7896, AHC_AIC7896,
9635 AHC_PAGESCBS | AHC_NEWEEPROM_FMT | AHC_BIOS_ENABLED | AHC_MULTI_CHANNEL,
9636 AHC_AIC7896_FE, 24,
9637 32, C56_66 },
9638 {PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_3940U2, AHC_AIC7896,
9639 AHC_PAGESCBS | AHC_NEWEEPROM_FMT | AHC_BIOS_ENABLED | AHC_MULTI_CHANNEL,
9640 AHC_AIC7896_FE, 25,
9641 32, C56_66 },
9642 {PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_3950U2D, AHC_AIC7896,
9643 AHC_PAGESCBS | AHC_NEWEEPROM_FMT | AHC_BIOS_ENABLED | AHC_MULTI_CHANNEL,
9644 AHC_AIC7896_FE, 26,
9645 32, C56_66 },
9646 {PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_1480A, AHC_AIC7860,
9647 AHC_PAGESCBS | AHC_NEWEEPROM_FMT | AHC_BIOS_ENABLED | AHC_NO_STPWEN,
9648 AHC_AIC7860_FE, 27,
9649 32, C46 },
9650 {PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_7892A, AHC_AIC7892,
9651 AHC_PAGESCBS | AHC_NEWEEPROM_FMT | AHC_BIOS_ENABLED,
9652 AHC_AIC7892_FE, 28,
9653 32, C46 },
9654 {PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_7892B, AHC_AIC7892,
9655 AHC_PAGESCBS | AHC_NEWEEPROM_FMT | AHC_BIOS_ENABLED,
9656 AHC_AIC7892_FE, 28,
9657 32, C46 },
9658 {PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_7892D, AHC_AIC7892,
9659 AHC_PAGESCBS | AHC_NEWEEPROM_FMT | AHC_BIOS_ENABLED,
9660 AHC_AIC7892_FE, 28,
9661 32, C46 },
9662 {PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_7892P, AHC_AIC7892,
9663 AHC_PAGESCBS | AHC_NEWEEPROM_FMT | AHC_BIOS_ENABLED,
9664 AHC_AIC7892_FE, 28,
9665 32, C46 },
9666 {PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_7899A, AHC_AIC7899,
9667 AHC_PAGESCBS | AHC_NEWEEPROM_FMT | AHC_BIOS_ENABLED | AHC_MULTI_CHANNEL,
9668 AHC_AIC7899_FE, 29,
9669 32, C56_66 },
9670 {PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_7899B, AHC_AIC7899,
9671 AHC_PAGESCBS | AHC_NEWEEPROM_FMT | AHC_BIOS_ENABLED | AHC_MULTI_CHANNEL,
9672 AHC_AIC7899_FE, 29,
9673 32, C56_66 },
9674 {PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_7899D, AHC_AIC7899,
9675 AHC_PAGESCBS | AHC_NEWEEPROM_FMT | AHC_BIOS_ENABLED | AHC_MULTI_CHANNEL,
9676 AHC_AIC7899_FE, 29,
9677 32, C56_66 },
9678 {PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_7899P, AHC_AIC7899,
9679 AHC_PAGESCBS | AHC_NEWEEPROM_FMT | AHC_BIOS_ENABLED | AHC_MULTI_CHANNEL,
9680 AHC_AIC7899_FE, 29,
9681 32, C56_66 },
9682 };
9683
9684 unsigned short command;
9685 unsigned int devconfig, i, oldverbose;
9686 struct pci_dev *pdev = NULL;
9687
9688 for (i = 0; i < NUMBER(aic_pdevs); i++)
9689 {
9690 pdev = NULL;
9691 while ((pdev = pci_find_device(aic_pdevs[i].vendor_id,
9692 aic_pdevs[i].device_id,
9693 pdev))) {
9694 if (pci_enable_device(pdev))
9695 continue;
9696 if ( i == 0 ) /* We found one, but it's the 7810 RAID cont. */
9697 {
9698 if (aic7xxx_verbose & (VERBOSE_PROBE|VERBOSE_PROBE2))
9699 {
9700 printk(KERN_INFO "aic7xxx: The 7810 RAID controller is not "
9701 "supported by\n");
9702 printk(KERN_INFO " this driver, we are ignoring it.\n");
9703 }
9704 }
9705 else if ( (temp_p = kmalloc(sizeof(struct aic7xxx_host),
9706 GFP_ATOMIC)) != NULL )
9707 {
9708 memset(temp_p, 0, sizeof(struct aic7xxx_host));
9709 temp_p->chip = aic_pdevs[i].chip | AHC_PCI;
9710 temp_p->flags = aic_pdevs[i].flags;
9711 temp_p->features = aic_pdevs[i].features;
9712 temp_p->board_name_index = aic_pdevs[i].board_name_index;
9713 temp_p->sc_size = aic_pdevs[i].seeprom_size;
9714 temp_p->sc_type = aic_pdevs[i].seeprom_type;
9715
9716 /*
9717 * Read sundry information from PCI BIOS.
9718 */
9719 temp_p->irq = pdev->irq;
9720 temp_p->pdev = pdev;
9721 temp_p->pci_bus = pdev->bus->number;
9722 temp_p->pci_device_fn = pdev->devfn;
9723 temp_p->base = pci_resource_start(pdev, 0);
9724 temp_p->mbase = pci_resource_start(pdev, 1);
9725 current_p = list_p;
9726 while(current_p && temp_p)
9727 {
9728 if ( ((current_p->pci_bus == temp_p->pci_bus) &&
9729 (current_p->pci_device_fn == temp_p->pci_device_fn)) ||
9730 (temp_p->base && (current_p->base == temp_p->base)) ||
9731 (temp_p->mbase && (current_p->mbase == temp_p->mbase)) )
9732 {
9733 /* duplicate PCI entry, skip it */
9734 kfree(temp_p);
9735 temp_p = NULL;
9736 }
9737 current_p = current_p->next;
9738 }
9739 if ( temp_p == NULL )
9740 continue;
9741 if (aic7xxx_verbose & VERBOSE_PROBE2)
9742 printk("aic7xxx: <%s> at PCI %d/%d\n",
9743 board_names[aic_pdevs[i].board_name_index],
9744 PCI_SLOT(pdev->devfn),
9745 PCI_FUNC(pdev->devfn));
9746 pci_read_config_word(pdev, PCI_COMMAND, &command);
9747 if (aic7xxx_verbose & VERBOSE_PROBE2)
9748 {
9749 printk("aic7xxx: Initial PCI_COMMAND value was 0x%x\n",
9750 (int)command);
9751 }
9752 #ifdef AIC7XXX_STRICT_PCI_SETUP
9753 command |= PCI_COMMAND_SERR | PCI_COMMAND_PARITY |
9754 PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY | PCI_COMMAND_IO;
9755 #else
9756 command |= PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY | PCI_COMMAND_IO;
9757 #endif
9758 command &= ~PCI_COMMAND_INVALIDATE;
9759 if (aic7xxx_pci_parity == 0)
9760 command &= ~(PCI_COMMAND_SERR | PCI_COMMAND_PARITY);
9761 pci_write_config_word(pdev, PCI_COMMAND, command);
9762 #ifdef AIC7XXX_STRICT_PCI_SETUP
9763 pci_read_config_dword(pdev, DEVCONFIG, &devconfig);
9764 if (aic7xxx_verbose & VERBOSE_PROBE2)
9765 {
9766 printk("aic7xxx: Initial DEVCONFIG value was 0x%x\n", devconfig);
9767 }
9768 devconfig |= 0x80000040;
9769 pci_write_config_dword(pdev, DEVCONFIG, devconfig);
9770 #endif /* AIC7XXX_STRICT_PCI_SETUP */
9771
9772 if(temp_p->base && check_region(temp_p->base, MAXREG - MINREG))
9773 {
9774 printk("aic7xxx: <%s> at PCI %d/%d/%d\n",
9775 board_names[aic_pdevs[i].board_name_index],
9776 temp_p->pci_bus,
9777 PCI_SLOT(temp_p->pci_device_fn),
9778 PCI_FUNC(temp_p->pci_device_fn));
9779 printk("aic7xxx: I/O ports already in use, ignoring.\n");
9780 kfree(temp_p);
9781 temp_p = NULL;
9782 continue;
9783 }
9784
9785 temp_p->unpause = INTEN;
9786 temp_p->pause = temp_p->unpause | PAUSE;
9787 if ( ((temp_p->base == 0) &&
9788 (temp_p->mbase == 0)) ||
9789 (temp_p->irq == 0) )
9790 {
9791 printk("aic7xxx: <%s> at PCI %d/%d/%d\n",
9792 board_names[aic_pdevs[i].board_name_index],
9793 temp_p->pci_bus,
9794 PCI_SLOT(temp_p->pci_device_fn),
9795 PCI_FUNC(temp_p->pci_device_fn));
9796 printk("aic7xxx: Controller disabled by BIOS, ignoring.\n");
9797 kfree(temp_p);
9798 temp_p = NULL;
9799 continue;
9800 }
9801
9802 #ifdef MMAPIO
9803 if ( !(temp_p->base) || !(temp_p->flags & AHC_MULTI_CHANNEL) ||
9804 ((temp_p->chip != (AHC_AIC7870 | AHC_PCI)) &&
9805 (temp_p->chip != (AHC_AIC7880 | AHC_PCI))) )
9806 {
9807 unsigned long page_offset, base;
9808
9809 base = temp_p->mbase & PAGE_MASK;
9810 page_offset = temp_p->mbase - base;
9811 temp_p->maddr = ioremap_nocache(base, page_offset + 256);
9812 if(temp_p->maddr)
9813 {
9814 temp_p->maddr += page_offset;
9815 /*
9816 * We need to check the I/O with the MMAPed address. Some machines
9817 * simply fail to work with MMAPed I/O and certain controllers.
9818 */
9819 if(aic_inb(temp_p, HCNTRL) == 0xff)
9820 {
9821 /*
9822 * OK.....we failed our test....go back to programmed I/O
9823 */
9824 printk(KERN_INFO "aic7xxx: <%s> at PCI %d/%d/%d\n",
9825 board_names[aic_pdevs[i].board_name_index],
9826 temp_p->pci_bus,
9827 PCI_SLOT(temp_p->pci_device_fn),
9828 PCI_FUNC(temp_p->pci_device_fn));
9829 printk(KERN_INFO "aic7xxx: MMAPed I/O failed, reverting to "
9830 "Programmed I/O.\n");
9831 iounmap((void *) (((unsigned long) temp_p->maddr) & PAGE_MASK));
9832 temp_p->maddr = 0;
9833 if(temp_p->base == 0)
9834 {
9835 printk("aic7xxx: <%s> at PCI %d/%d/%d\n",
9836 board_names[aic_pdevs[i].board_name_index],
9837 temp_p->pci_bus,
9838 PCI_SLOT(temp_p->pci_device_fn),
9839 PCI_FUNC(temp_p->pci_device_fn));
9840 printk("aic7xxx: Controller disabled by BIOS, ignoring.\n");
9841 kfree(temp_p);
9842 temp_p = NULL;
9843 continue;
9844 }
9845 }
9846 }
9847 }
9848 #endif
9849
9850 /*
9851 * Lock out other contenders for our i/o space.
9852 */
9853 if(temp_p->base)
9854 request_region(temp_p->base, MAXREG - MINREG, "aic7xxx");
9855
9856 /*
9857 * We HAVE to make sure the first pause_sequencer() and all other
9858 * subsequent I/O that isn't PCI config space I/O takes place
9859 * after the MMAPed I/O region is configured and tested. The
9860 * problem is the PowerPC architecture that doesn't support
9861 * programmed I/O at all, so we have to have the MMAP I/O set up
9862 * for this pause to even work on those machines.
9863 */
9864 pause_sequencer(temp_p);
9865
9866 /*
9867 * Clear out any pending PCI error status messages. Also set
9868 * verbose to 0 so that we don't emit strange PCI error messages
9869 * while cleaning out the current status bits.
9870 */
9871 oldverbose = aic7xxx_verbose;
9872 aic7xxx_verbose = 0;
9873 aic7xxx_pci_intr(temp_p);
9874 aic7xxx_verbose = oldverbose;
9875
9876 temp_p->bios_address = 0;
9877
9878 /*
9879 * Remember how the card was setup in case there is no seeprom.
9880 */
9881 if (temp_p->features & AHC_ULTRA2)
9882 temp_p->scsi_id = aic_inb(temp_p, SCSIID_ULTRA2) & OID;
9883 else
9884 temp_p->scsi_id = aic_inb(temp_p, SCSIID) & OID;
9885 /*
9886 * Get current termination setting
9887 */
9888 sxfrctl1 = aic_inb(temp_p, SXFRCTL1);
9889
9890 if (aic7xxx_chip_reset(temp_p) == -1)
9891 {
9892 release_region(temp_p->base, MAXREG - MINREG);
9893 kfree(temp_p);
9894 temp_p = NULL;
9895 continue;
9896 }
9897 /*
9898 * Very quickly put the term setting back into the register since
9899 * the chip reset may cause odd things to happen. This is to keep
9900 * LVD busses with lots of drives from draining the power out of
9901 * the diffsense line before we get around to running the
9902 * configure_termination() function. Also restore the STPWLEVEL
9903 * bit of DEVCONFIG
9904 */
9905 aic_outb(temp_p, sxfrctl1, SXFRCTL1);
9906 pci_write_config_dword(temp_p->pdev, DEVCONFIG, devconfig);
9907 sxfrctl1 &= STPWEN;
9908
9909 /*
9910 * We need to set the CHNL? assignments before loading the SEEPROM
9911 * The 3940 and 3985 cards (original stuff, not any of the later
9912 * stuff) are 7870 and 7880 class chips. The Ultra2 stuff falls
9913 * under 7896 and 7897. The 7895 is in a class by itself :)
9914 */
9915 switch (temp_p->chip & AHC_CHIPID_MASK)
9916 {
9917 case AHC_AIC7870: /* 3840 / 3985 */
9918 case AHC_AIC7880: /* 3840 UW / 3985 UW */
9919 if(temp_p->flags & AHC_MULTI_CHANNEL)
9920 {
9921 switch(PCI_SLOT(temp_p->pci_device_fn))
9922 {
9923 case 5:
9924 temp_p->flags |= AHC_CHNLB;
9925 break;
9926 case 8:
9927 temp_p->flags |= AHC_CHNLB;
9928 break;
9929 case 12:
9930 temp_p->flags |= AHC_CHNLC;
9931 break;
9932 default:
9933 break;
9934 }
9935 }
9936 break;
9937
9938 case AHC_AIC7895: /* 7895 */
9939 case AHC_AIC7896: /* 7896/7 */
9940 case AHC_AIC7899: /* 7899 */
9941 if (PCI_FUNC(pdev->devfn) != 0)
9942 {
9943 temp_p->flags |= AHC_CHNLB;
9944 }
9945 /*
9946 * The 7895 is the only chipset that sets the SCBSIZE32 param
9947 * in the DEVCONFIG register. The Ultra2 chipsets use
9948 * the DSCOMMAND0 register instead.
9949 */
9950 if ((temp_p->chip & AHC_CHIPID_MASK) == AHC_AIC7895)
9951 {
9952 pci_read_config_dword(pdev, DEVCONFIG, &devconfig);
9953 devconfig |= SCBSIZE32;
9954 pci_write_config_dword(pdev, DEVCONFIG, devconfig);
9955 }
9956 break;
9957 default:
9958 break;
9959 }
9960
9961 /*
9962 * Loading of the SEEPROM needs to come after we've set the flags
9963 * to indicate possible CHNLB and CHNLC assigments. Otherwise,
9964 * on 394x and 398x cards we'll end up reading the wrong settings
9965 * for channels B and C
9966 */
9967 switch (temp_p->chip & AHC_CHIPID_MASK)
9968 {
9969 case AHC_AIC7892:
9970 case AHC_AIC7899:
9971 aic_outb(temp_p, 0, SCAMCTL);
9972 /*
9973 * Switch to the alt mode of the chip...
9974 */
9975 aic_outb(temp_p, aic_inb(temp_p, SFUNCT) | ALT_MODE, SFUNCT);
9976 /*
9977 * Set our options...the last two items set our CRC after x byte
9978 * count in target mode...
9979 */
9980 aic_outb(temp_p, AUTO_MSGOUT_DE | DIS_MSGIN_DUALEDGE, OPTIONMODE);
9981 aic_outb(temp_p, 0x00, 0x0b);
9982 aic_outb(temp_p, 0x10, 0x0a);
9983 /*
9984 * switch back to normal mode...
9985 */
9986 aic_outb(temp_p, aic_inb(temp_p, SFUNCT) & ~ALT_MODE, SFUNCT);
9987 aic_outb(temp_p, CRCVALCHKEN | CRCENDCHKEN | CRCREQCHKEN |
9988 TARGCRCENDEN | TARGCRCCNTEN,
9989 CRCCONTROL1);
9990 aic_outb(temp_p, ((aic_inb(temp_p, DSCOMMAND0) | USCBSIZE32 |
9991 MPARCKEN | CIOPARCKEN | CACHETHEN) &
9992 ~DPARCKEN), DSCOMMAND0);
9993 aic7xxx_load_seeprom(temp_p, &sxfrctl1);
9994 break;
9995 case AHC_AIC7890:
9996 case AHC_AIC7896:
9997 aic_outb(temp_p, 0, SCAMCTL);
9998 aic_outb(temp_p, (aic_inb(temp_p, DSCOMMAND0) |
9999 CACHETHEN | MPARCKEN | USCBSIZE32 |
10000 CIOPARCKEN) & ~DPARCKEN, DSCOMMAND0);
10001 aic7xxx_load_seeprom(temp_p, &sxfrctl1);
10002 break;
10003 case AHC_AIC7850:
10004 case AHC_AIC7860:
10005 /*
10006 * Set the DSCOMMAND0 register on these cards different from
10007 * on the 789x cards. Also, read the SEEPROM as well.
10008 */
10009 aic_outb(temp_p, (aic_inb(temp_p, DSCOMMAND0) |
10010 CACHETHEN | MPARCKEN) & ~DPARCKEN,
10011 DSCOMMAND0);
10012 /* FALLTHROUGH */
10013 default:
10014 aic7xxx_load_seeprom(temp_p, &sxfrctl1);
10015 break;
10016 case AHC_AIC7880:
10017 /*
10018 * Check the rev of the chipset before we change DSCOMMAND0
10019 */
10020 pci_read_config_dword(pdev, DEVCONFIG, &devconfig);
10021 if ((devconfig & 0xff) >= 1)
10022 {
10023 aic_outb(temp_p, (aic_inb(temp_p, DSCOMMAND0) |
10024 CACHETHEN | MPARCKEN) & ~DPARCKEN,
10025 DSCOMMAND0);
10026 }
10027 aic7xxx_load_seeprom(temp_p, &sxfrctl1);
10028 break;
10029 }
10030
10031
10032 /*
10033 * and then we need another switch based on the type in order to
10034 * make sure the channel B primary flag is set properly on 7895
10035 * controllers....Arrrgggghhh!!! We also have to catch the fact
10036 * that when you disable the BIOS on the 7895 on the Intel DK440LX
10037 * motherboard, and possibly others, it only sets the BIOS disabled
10038 * bit on the A channel...I think I'm starting to lean towards
10039 * going postal....
10040 */
10041 switch(temp_p->chip & AHC_CHIPID_MASK)
10042 {
10043 case AHC_AIC7895:
10044 case AHC_AIC7896:
10045 case AHC_AIC7899:
10046 current_p = list_p;
10047 while(current_p != NULL)
10048 {
10049 if ( (current_p->pci_bus == temp_p->pci_bus) &&
10050 (PCI_SLOT(current_p->pci_device_fn) ==
10051 PCI_SLOT(temp_p->pci_device_fn)) )
10052 {
10053 if ( PCI_FUNC(current_p->pci_device_fn) == 0 )
10054 {
10055 temp_p->flags |=
10056 (current_p->flags & AHC_CHANNEL_B_PRIMARY);
10057 temp_p->flags &= ~(AHC_BIOS_ENABLED|AHC_USEDEFAULTS);
10058 temp_p->flags |=
10059 (current_p->flags & (AHC_BIOS_ENABLED|AHC_USEDEFAULTS));
10060 }
10061 else
10062 {
10063 current_p->flags |=
10064 (temp_p->flags & AHC_CHANNEL_B_PRIMARY);
10065 current_p->flags &= ~(AHC_BIOS_ENABLED|AHC_USEDEFAULTS);
10066 current_p->flags |=
10067 (temp_p->flags & (AHC_BIOS_ENABLED|AHC_USEDEFAULTS));
10068 }
10069 }
10070 current_p = current_p->next;
10071 }
10072 break;
10073 default:
10074 break;
10075 }
10076
10077 /*
10078 * We only support external SCB RAM on the 7895/6/7 chipsets.
10079 * We could support it on the 7890/1 easy enough, but I don't
10080 * know of any 7890/1 based cards that have it. I do know
10081 * of 7895/6/7 cards that have it and they work properly.
10082 */
10083 switch(temp_p->chip & AHC_CHIPID_MASK)
10084 {
10085 default:
10086 break;
10087 case AHC_AIC7895:
10088 case AHC_AIC7896:
10089 case AHC_AIC7899:
10090 pci_read_config_dword(pdev, DEVCONFIG, &devconfig);
10091 if (temp_p->features & AHC_ULTRA2)
10092 {
10093 if ( (aic_inb(temp_p, DSCOMMAND0) & RAMPSM_ULTRA2) &&
10094 (aic7xxx_scbram) )
10095 {
10096 aic_outb(temp_p,
10097 aic_inb(temp_p, DSCOMMAND0) & ~SCBRAMSEL_ULTRA2,
10098 DSCOMMAND0);
10099 temp_p->flags |= AHC_EXTERNAL_SRAM;
10100 devconfig |= EXTSCBPEN;
10101 }
10102 else if (aic_inb(temp_p, DSCOMMAND0) & RAMPSM_ULTRA2)
10103 {
10104 printk(KERN_INFO "aic7xxx: <%s> at PCI %d/%d/%d\n",
10105 board_names[aic_pdevs[i].board_name_index],
10106 temp_p->pci_bus,
10107 PCI_SLOT(temp_p->pci_device_fn),
10108 PCI_FUNC(temp_p->pci_device_fn));
10109 printk("aic7xxx: external SCB RAM detected, "
10110 "but not enabled\n");
10111 }
10112 }
10113 else
10114 {
10115 if ((devconfig & RAMPSM) && (aic7xxx_scbram))
10116 {
10117 devconfig &= ~SCBRAMSEL;
10118 devconfig |= EXTSCBPEN;
10119 temp_p->flags |= AHC_EXTERNAL_SRAM;
10120 }
10121 else if (devconfig & RAMPSM)
10122 {
10123 printk(KERN_INFO "aic7xxx: <%s> at PCI %d/%d/%d\n",
10124 board_names[aic_pdevs[i].board_name_index],
10125 temp_p->pci_bus,
10126 PCI_SLOT(temp_p->pci_device_fn),
10127 PCI_FUNC(temp_p->pci_device_fn));
10128 printk("aic7xxx: external SCB RAM detected, "
10129 "but not enabled\n");
10130 }
10131 }
10132 pci_write_config_dword(pdev, DEVCONFIG, devconfig);
10133 if ( (temp_p->flags & AHC_EXTERNAL_SRAM) &&
10134 (temp_p->flags & AHC_CHNLB) )
10135 aic_outb(temp_p, 1, CCSCBBADDR);
10136 break;
10137 }
10138
10139 /*
10140 * Take the LED out of diagnostic mode
10141 */
10142 aic_outb(temp_p,
10143 (aic_inb(temp_p, SBLKCTL) & ~(DIAGLEDEN | DIAGLEDON)),
10144 SBLKCTL);
10145
10146 /*
10147 * We don't know where this is set in the SEEPROM or by the
10148 * BIOS, so we default to 100%. On Ultra2 controllers, use 75%
10149 * instead.
10150 */
10151 if (temp_p->features & AHC_ULTRA2)
10152 {
10153 aic_outb(temp_p, RD_DFTHRSH_MAX | WR_DFTHRSH_MAX, DFF_THRSH);
10154 }
10155 else
10156 {
10157 aic_outb(temp_p, DFTHRSH_100, DSPCISTATUS);
10158 }
10159
10160 /*
10161 * Call our function to fixup any bugs that exist on this chipset.
10162 * This may muck with PCI settings and other device settings, so
10163 * make sure it's after all the other PCI and device register
10164 * tweaks so it can back out bad settings on specific broken cards.
10165 */
10166 aic7xxx_configure_bugs(temp_p);
10167
10168 if ( list_p == NULL )
10169 {
10170 list_p = current_p = temp_p;
10171 }
10172 else
10173 {
10174 current_p = list_p;
10175 while(current_p->next != NULL)
10176 current_p = current_p->next;
10177 current_p->next = temp_p;
10178 }
10179 temp_p->next = NULL;
10180 found++;
10181 } /* Found an Adaptec PCI device. */
10182 else /* Well, we found one, but we couldn't get any memory */
10183 {
10184 printk("aic7xxx: Found <%s>\n",
10185 board_names[aic_pdevs[i].board_name_index]);
10186 printk(KERN_INFO "aic7xxx: Unable to allocate device memory, "
10187 "skipping.\n");
10188 }
10189 } /* while(pdev=....) */
10190 } /* for PCI_DEVICES */
10191 } /* PCI BIOS present */
10192 #endif /* CONFIG_PCI */
10193
10194 #if defined(__i386__) || defined(__alpha__)
10195 /*
10196 * EISA/VL-bus card signature probe.
10197 */
10198 slot = MINSLOT;
10199 while ( (slot <= MAXSLOT) &&
10200 !(aic7xxx_no_probe) )
10201 {
10202 base = SLOTBASE(slot) + MINREG;
10203
10204 if (check_region(base, MAXREG - MINREG))
10205 {
10206 /*
10207 * Some other driver has staked a
10208 * claim to this i/o region already.
10209 */
10210 slot++;
10211 continue; /* back to the beginning of the for loop */
10212 }
10213 flags = 0;
10214 type = aic7xxx_probe(slot, base + AHC_HID0, &flags);
10215 if (type == -1)
10216 {
10217 slot++;
10218 continue;
10219 }
10220 temp_p = kmalloc(sizeof(struct aic7xxx_host), GFP_ATOMIC);
10221 if (temp_p == NULL)
10222 {
10223 printk(KERN_WARNING "aic7xxx: Unable to allocate device space.\n");
10224 slot++;
10225 continue; /* back to the beginning of the while loop */
10226 }
10227 /*
10228 * Lock out other contenders for our i/o space.
10229 */
10230 request_region(base, MAXREG - MINREG, "aic7xxx");
10231
10232 /*
10233 * Pause the card preserving the IRQ type. Allow the operator
10234 * to override the IRQ trigger.
10235 */
10236 if (aic7xxx_irq_trigger == 1)
10237 hcntrl = IRQMS; /* Level */
10238 else if (aic7xxx_irq_trigger == 0)
10239 hcntrl = 0; /* Edge */
10240 else
10241 hcntrl = inb(base + HCNTRL) & IRQMS; /* Default */
10242 memset(temp_p, 0, sizeof(struct aic7xxx_host));
10243 temp_p->unpause = hcntrl | INTEN;
10244 temp_p->pause = hcntrl | PAUSE | INTEN;
10245 temp_p->base = base;
10246 temp_p->mbase = 0;
10247 temp_p->maddr = 0;
10248 temp_p->pci_bus = 0;
10249 temp_p->pci_device_fn = slot;
10250 aic_outb(temp_p, hcntrl | PAUSE, HCNTRL);
10251 while( (aic_inb(temp_p, HCNTRL) & PAUSE) == 0 ) ;
10252 if (aic7xxx_chip_reset(temp_p) == -1)
10253 temp_p->irq = 0;
10254 else
10255 temp_p->irq = aic_inb(temp_p, INTDEF) & 0x0F;
10256 temp_p->flags |= AHC_PAGESCBS;
10257
10258 switch (temp_p->irq)
10259 {
10260 case 9:
10261 case 10:
10262 case 11:
10263 case 12:
10264 case 14:
10265 case 15:
10266 break;
10267
10268 default:
10269 printk(KERN_WARNING "aic7xxx: Host adapter uses unsupported IRQ "
10270 "level %d, ignoring.\n", temp_p->irq);
10271 kfree(temp_p);
10272 release_region(base, MAXREG - MINREG);
10273 slot++;
10274 continue; /* back to the beginning of the while loop */
10275 }
10276
10277 /*
10278 * We are commited now, everything has been checked and this card
10279 * has been found, now we just set it up
10280 */
10281
10282 /*
10283 * Insert our new struct into the list at the end
10284 */
10285 if (list_p == NULL)
10286 {
10287 list_p = current_p = temp_p;
10288 }
10289 else
10290 {
10291 current_p = list_p;
10292 while (current_p->next != NULL)
10293 current_p = current_p->next;
10294 current_p->next = temp_p;
10295 }
10296
10297 switch (type)
10298 {
10299 case 0:
10300 temp_p->board_name_index = 2;
10301 if (aic7xxx_verbose & VERBOSE_PROBE2)
10302 printk("aic7xxx: <%s> at EISA %d\n",
10303 board_names[2], slot);
10304 /* FALLTHROUGH */
10305 case 1:
10306 {
10307 temp_p->chip = AHC_AIC7770 | AHC_EISA;
10308 temp_p->features |= AHC_AIC7770_FE;
10309 temp_p->bios_control = aic_inb(temp_p, HA_274_BIOSCTRL);
10310
10311 /*
10312 * Get the primary channel information. Right now we don't
10313 * do anything with this, but someday we will be able to inform
10314 * the mid-level SCSI code which channel is primary.
10315 */
10316 if (temp_p->board_name_index == 0)
10317 {
10318 temp_p->board_name_index = 3;
10319 if (aic7xxx_verbose & VERBOSE_PROBE2)
10320 printk("aic7xxx: <%s> at EISA %d\n",
10321 board_names[3], slot);
10322 }
10323 if (temp_p->bios_control & CHANNEL_B_PRIMARY)
10324 {
10325 temp_p->flags |= AHC_CHANNEL_B_PRIMARY;
10326 }
10327
10328 if ((temp_p->bios_control & BIOSMODE) == BIOSDISABLED)
10329 {
10330 temp_p->flags &= ~AHC_BIOS_ENABLED;
10331 }
10332 else
10333 {
10334 temp_p->flags &= ~AHC_USEDEFAULTS;
10335 temp_p->flags |= AHC_BIOS_ENABLED;
10336 if ( (temp_p->bios_control & 0x20) == 0 )
10337 {
10338 temp_p->bios_address = 0xcc000;
10339 temp_p->bios_address += (0x4000 * (temp_p->bios_control & 0x07));
10340 }
10341 else
10342 {
10343 temp_p->bios_address = 0xd0000;
10344 temp_p->bios_address += (0x8000 * (temp_p->bios_control & 0x06));
10345 }
10346 }
10347 temp_p->adapter_control = aic_inb(temp_p, SCSICONF) << 8;
10348 temp_p->adapter_control |= aic_inb(temp_p, SCSICONF + 1);
10349 if (temp_p->features & AHC_WIDE)
10350 {
10351 temp_p->scsi_id = temp_p->adapter_control & HWSCSIID;
10352 temp_p->scsi_id_b = temp_p->scsi_id;
10353 }
10354 else
10355 {
10356 temp_p->scsi_id = (temp_p->adapter_control >> 8) & HSCSIID;
10357 temp_p->scsi_id_b = temp_p->adapter_control & HSCSIID;
10358 }
10359 aic7xxx_load_seeprom(temp_p, &sxfrctl1);
10360 break;
10361 }
10362
10363 case 2:
10364 case 3:
10365 temp_p->chip = AHC_AIC7770 | AHC_VL;
10366 temp_p->features |= AHC_AIC7770_FE;
10367 if (type == 2)
10368 temp_p->flags |= AHC_BIOS_ENABLED;
10369 else
10370 temp_p->flags &= ~AHC_BIOS_ENABLED;
10371 if (aic_inb(temp_p, SCSICONF) & TERM_ENB)
10372 sxfrctl1 = STPWEN;
10373 aic7xxx_load_seeprom(temp_p, &sxfrctl1);
10374 temp_p->board_name_index = 4;
10375 if (aic7xxx_verbose & VERBOSE_PROBE2)
10376 printk("aic7xxx: <%s> at VLB %d\n",
10377 board_names[2], slot);
10378 switch( aic_inb(temp_p, STATUS_2840) & BIOS_SEL )
10379 {
10380 case 0x00:
10381 temp_p->bios_address = 0xe0000;
10382 break;
10383 case 0x20:
10384 temp_p->bios_address = 0xc8000;
10385 break;
10386 case 0x40:
10387 temp_p->bios_address = 0xd0000;
10388 break;
10389 case 0x60:
10390 temp_p->bios_address = 0xd8000;
10391 break;
10392 default:
10393 break; /* can't get here */
10394 }
10395 break;
10396
10397 default: /* Won't get here. */
10398 break;
10399 }
10400 if (aic7xxx_verbose & VERBOSE_PROBE2)
10401 {
10402 printk(KERN_INFO "aic7xxx: BIOS %sabled, IO Port 0x%lx, IRQ %d (%s)\n",
10403 (temp_p->flags & AHC_USEDEFAULTS) ? "dis" : "en", temp_p->base,
10404 temp_p->irq,
10405 (temp_p->pause & IRQMS) ? "level sensitive" : "edge triggered");
10406 printk(KERN_INFO "aic7xxx: Extended translation %sabled.\n",
10407 (temp_p->flags & AHC_EXTEND_TRANS_A) ? "en" : "dis");
10408 }
10409
10410 /*
10411 * All the 7770 based chipsets have this bug
10412 */
10413 temp_p->bugs |= AHC_BUG_TMODE_WIDEODD;
10414
10415 /*
10416 * Set the FIFO threshold and the bus off time.
10417 */
10418 hostconf = aic_inb(temp_p, HOSTCONF);
10419 aic_outb(temp_p, hostconf & DFTHRSH, BUSSPD);
10420 aic_outb(temp_p, (hostconf << 2) & BOFF, BUSTIME);
10421 slot++;
10422 found++;
10423 }
10424
10425 #endif /* defined(__i386__) || defined(__alpha__) */
10426
10427 /*
10428 * Now, we re-order the probed devices by BIOS address and BUS class.
10429 * In general, we follow this algorithm to make the adapters show up
10430 * in the same order under linux that the computer finds them.
10431 * 1: All VLB/EISA cards with BIOS_ENABLED first, according to BIOS
10432 * address, going from lowest to highest.
10433 * 2: All PCI controllers with BIOS_ENABLED next, according to BIOS
10434 * address, going from lowest to highest.
10435 * 3: Remaining VLB/EISA controllers going in slot order.
10436 * 4: Remaining PCI controllers, going in PCI device order (reversable)
10437 */
10438
10439 {
10440 struct aic7xxx_host *sort_list[4] = { NULL, NULL, NULL, NULL };
10441 struct aic7xxx_host *vlb, *pci;
10442 struct aic7xxx_host *prev_p;
10443 struct aic7xxx_host *p;
10444 unsigned char left;
10445
10446 prev_p = vlb = pci = NULL;
10447
10448 temp_p = list_p;
10449 while (temp_p != NULL)
10450 {
10451 switch(temp_p->chip & ~AHC_CHIPID_MASK)
10452 {
10453 case AHC_EISA:
10454 case AHC_VL:
10455 {
10456 p = temp_p;
10457 if (p->flags & AHC_BIOS_ENABLED)
10458 vlb = sort_list[0];
10459 else
10460 vlb = sort_list[2];
10461
10462 if (vlb == NULL)
10463 {
10464 vlb = temp_p;
10465 temp_p = temp_p->next;
10466 vlb->next = NULL;
10467 }
10468 else
10469 {
10470 current_p = vlb;
10471 prev_p = NULL;
10472 while ( (current_p != NULL) &&
10473 (current_p->bios_address < temp_p->bios_address))
10474 {
10475 prev_p = current_p;
10476 current_p = current_p->next;
10477 }
10478 if (prev_p != NULL)
10479 {
10480 prev_p->next = temp_p;
10481 temp_p = temp_p->next;
10482 prev_p->next->next = current_p;
10483 }
10484 else
10485 {
10486 vlb = temp_p;
10487 temp_p = temp_p->next;
10488 vlb->next = current_p;
10489 }
10490 }
10491
10492 if (p->flags & AHC_BIOS_ENABLED)
10493 sort_list[0] = vlb;
10494 else
10495 sort_list[2] = vlb;
10496
10497 break;
10498 }
10499 default: /* All PCI controllers fall through to default */
10500 {
10501
10502 p = temp_p;
10503 if (p->flags & AHC_BIOS_ENABLED)
10504 pci = sort_list[1];
10505 else
10506 pci = sort_list[3];
10507
10508 if (pci == NULL)
10509 {
10510 pci = temp_p;
10511 temp_p = temp_p->next;
10512 pci->next = NULL;
10513 }
10514 else
10515 {
10516 current_p = pci;
10517 prev_p = NULL;
10518 if (!aic7xxx_reverse_scan)
10519 {
10520 while ( (current_p != NULL) &&
10521 ( (PCI_SLOT(current_p->pci_device_fn) |
10522 (current_p->pci_bus << 8)) <
10523 (PCI_SLOT(temp_p->pci_device_fn) |
10524 (temp_p->pci_bus << 8)) ) )
10525 {
10526 prev_p = current_p;
10527 current_p = current_p->next;
10528 }
10529 }
10530 else
10531 {
10532 while ( (current_p != NULL) &&
10533 ( (PCI_SLOT(current_p->pci_device_fn) |
10534 (current_p->pci_bus << 8)) >
10535 (PCI_SLOT(temp_p->pci_device_fn) |
10536 (temp_p->pci_bus << 8)) ) )
10537 {
10538 prev_p = current_p;
10539 current_p = current_p->next;
10540 }
10541 }
10542 /*
10543 * Are we dealing with a 7895/6/7/9 where we need to sort the
10544 * channels as well, if so, the bios_address values should
10545 * be the same
10546 */
10547 if ( (current_p) && (temp_p->flags & AHC_MULTI_CHANNEL) &&
10548 (temp_p->pci_bus == current_p->pci_bus) &&
10549 (PCI_SLOT(temp_p->pci_device_fn) ==
10550 PCI_SLOT(current_p->pci_device_fn)) )
10551 {
10552 if (temp_p->flags & AHC_CHNLB)
10553 {
10554 if ( !(temp_p->flags & AHC_CHANNEL_B_PRIMARY) )
10555 {
10556 prev_p = current_p;
10557 current_p = current_p->next;
10558 }
10559 }
10560 else
10561 {
10562 if (temp_p->flags & AHC_CHANNEL_B_PRIMARY)
10563 {
10564 prev_p = current_p;
10565 current_p = current_p->next;
10566 }
10567 }
10568 }
10569 if (prev_p != NULL)
10570 {
10571 prev_p->next = temp_p;
10572 temp_p = temp_p->next;
10573 prev_p->next->next = current_p;
10574 }
10575 else
10576 {
10577 pci = temp_p;
10578 temp_p = temp_p->next;
10579 pci->next = current_p;
10580 }
10581 }
10582
10583 if (p->flags & AHC_BIOS_ENABLED)
10584 sort_list[1] = pci;
10585 else
10586 sort_list[3] = pci;
10587
10588 break;
10589 }
10590 } /* End of switch(temp_p->type) */
10591 } /* End of while (temp_p != NULL) */
10592 /*
10593 * At this point, the cards have been broken into 4 sorted lists, now
10594 * we run through the lists in order and register each controller
10595 */
10596 {
10597 int i;
10598
10599 left = found;
10600 for (i=0; i<NUMBER(sort_list); i++)
10601 {
10602 temp_p = sort_list[i];
10603 while(temp_p != NULL)
10604 {
10605 template->name = board_names[temp_p->board_name_index];
10606 p = aic7xxx_alloc(template, temp_p);
10607 if (p != NULL)
10608 {
10609 p->instance = found - left;
10610 if (aic7xxx_register(template, p, (--left)) == 0)
10611 {
10612 found--;
10613 aic7xxx_release(p->host);
10614 scsi_unregister(p->host);
10615 }
10616 else if (aic7xxx_dump_card)
10617 {
10618 pause_sequencer(p);
10619 aic7xxx_print_card(p);
10620 aic7xxx_print_scratch_ram(p);
10621 unpause_sequencer(p, TRUE);
10622 }
10623 }
10624 current_p = temp_p;
10625 temp_p = (struct aic7xxx_host *)temp_p->next;
10626 kfree(current_p);
10627 }
10628 }
10629 }
10630 }
10631 return (found);
10632 }
10633
10634 #ifdef AIC7XXX_VERBOSE_DEBUGGING
10635 /*+F*************************************************************************
10636 * Function:
10637 * aic7xxx_print_scb
10638 *
10639 * Description:
10640 * Dump the byte codes for an about to be sent SCB.
10641 *-F*************************************************************************/
10642 static void
aic7xxx_print_scb(struct aic7xxx_host * p,struct aic7xxx_scb * scb)10643 aic7xxx_print_scb(struct aic7xxx_host *p, struct aic7xxx_scb *scb)
10644 {
10645 int i;
10646 unsigned char *x;
10647
10648 x = (unsigned char *)&scb->hscb->control;
10649
10650 for(i=0; i<32; i++)
10651 {
10652 printk("%02x ", x[i]);
10653 }
10654 printk("\n");
10655 }
10656 #endif
10657
10658 /*+F*************************************************************************
10659 * Function:
10660 * aic7xxx_buildscb
10661 *
10662 * Description:
10663 * Build a SCB.
10664 *-F*************************************************************************/
10665 static void
aic7xxx_buildscb(struct aic7xxx_host * p,Scsi_Cmnd * cmd,struct aic7xxx_scb * scb)10666 aic7xxx_buildscb(struct aic7xxx_host *p, Scsi_Cmnd *cmd,
10667 struct aic7xxx_scb *scb)
10668 {
10669 unsigned short mask;
10670 struct aic7xxx_hwscb *hscb;
10671 unsigned char tindex = TARGET_INDEX(cmd);
10672
10673 mask = (0x01 << tindex);
10674 hscb = scb->hscb;
10675
10676 /*
10677 * Setup the control byte if we need negotiation and have not
10678 * already requested it.
10679 */
10680 hscb->control = 0;
10681 scb->tag_action = 0;
10682
10683 if (p->discenable & mask)
10684 {
10685 hscb->control |= DISCENB;
10686 if ( (p->tagenable & mask) &&
10687 (cmd->cmnd[0] != TEST_UNIT_READY) )
10688 {
10689 p->dev_commands_sent[tindex]++;
10690 if (p->dev_commands_sent[tindex] < 200)
10691 {
10692 hscb->control |= MSG_SIMPLE_Q_TAG;
10693 scb->tag_action = MSG_SIMPLE_Q_TAG;
10694 }
10695 else
10696 {
10697 if (p->orderedtag & mask)
10698 {
10699 hscb->control |= MSG_ORDERED_Q_TAG;
10700 scb->tag_action = MSG_ORDERED_Q_TAG;
10701 }
10702 else
10703 {
10704 hscb->control |= MSG_SIMPLE_Q_TAG;
10705 scb->tag_action = MSG_SIMPLE_Q_TAG;
10706 }
10707 p->dev_commands_sent[tindex] = 0;
10708 }
10709 }
10710 }
10711 if ( !(p->dtr_pending & mask) &&
10712 ( (p->needppr & mask) ||
10713 (p->needwdtr & mask) ||
10714 (p->needsdtr & mask) ) &&
10715 (p->dev_flags[tindex] & DEVICE_DTR_SCANNED) )
10716 {
10717 p->dtr_pending |= mask;
10718 scb->tag_action = 0;
10719 hscb->control &= DISCENB;
10720 hscb->control |= MK_MESSAGE;
10721 if(p->needppr & mask)
10722 {
10723 scb->flags |= SCB_MSGOUT_PPR;
10724 }
10725 else if(p->needwdtr & mask)
10726 {
10727 scb->flags |= SCB_MSGOUT_WDTR;
10728 }
10729 else if(p->needsdtr & mask)
10730 {
10731 scb->flags |= SCB_MSGOUT_SDTR;
10732 }
10733 scb->flags |= SCB_DTR_SCB;
10734 }
10735 hscb->target_channel_lun = ((cmd->target << 4) & 0xF0) |
10736 ((cmd->channel & 0x01) << 3) | (cmd->lun & 0x07);
10737
10738 /*
10739 * The interpretation of request_buffer and request_bufflen
10740 * changes depending on whether or not use_sg is zero; a
10741 * non-zero use_sg indicates the number of elements in the
10742 * scatter-gather array.
10743 */
10744
10745 /*
10746 * XXX - this relies on the host data being stored in a
10747 * little-endian format.
10748 */
10749 hscb->SCSI_cmd_length = cmd->cmd_len;
10750 memcpy(scb->cmnd, cmd->cmnd, cmd->cmd_len);
10751 hscb->SCSI_cmd_pointer = cpu_to_le32(SCB_DMA_ADDR(scb, scb->cmnd));
10752
10753 if (cmd->use_sg)
10754 {
10755 struct scatterlist *sg; /* Must be mid-level SCSI code scatterlist */
10756
10757 /*
10758 * We must build an SG list in adapter format, as the kernel's SG list
10759 * cannot be used directly because of data field size (__alpha__)
10760 * differences and the kernel SG list uses virtual addresses where
10761 * we need physical addresses.
10762 */
10763 int i, use_sg;
10764
10765 sg = (struct scatterlist *)cmd->request_buffer;
10766 scb->sg_length = 0;
10767 use_sg = pci_map_sg(p->pdev, sg, cmd->use_sg, scsi_to_pci_dma_dir(cmd->sc_data_direction));
10768 /*
10769 * Copy the segments into the SG array. NOTE!!! - We used to
10770 * have the first entry both in the data_pointer area and the first
10771 * SG element. That has changed somewhat. We still have the first
10772 * entry in both places, but now we download the address of
10773 * scb->sg_list[1] instead of 0 to the sg pointer in the hscb.
10774 */
10775 for (i = 0; i < use_sg; i++)
10776 {
10777 unsigned int len = sg_dma_len(sg+i);
10778 scb->sg_list[i].address = cpu_to_le32(sg_dma_address(sg+i));
10779 scb->sg_list[i].length = cpu_to_le32(len);
10780 scb->sg_length += len;
10781 }
10782 /* Copy the first SG into the data pointer area. */
10783 hscb->data_pointer = scb->sg_list[0].address;
10784 hscb->data_count = scb->sg_list[0].length;
10785 scb->sg_count = i;
10786 hscb->SG_segment_count = i;
10787 hscb->SG_list_pointer = cpu_to_le32(SCB_DMA_ADDR(scb, &scb->sg_list[1]));
10788 }
10789 else
10790 {
10791 if (cmd->request_bufflen)
10792 {
10793 unsigned int address = pci_map_single(p->pdev, cmd->request_buffer,
10794 cmd->request_bufflen,
10795 scsi_to_pci_dma_dir(cmd->sc_data_direction));
10796 aic7xxx_mapping(cmd) = address;
10797 scb->sg_list[0].address = cpu_to_le32(address);
10798 scb->sg_list[0].length = cpu_to_le32(cmd->request_bufflen);
10799 scb->sg_count = 1;
10800 scb->sg_length = cmd->request_bufflen;
10801 hscb->SG_segment_count = 1;
10802 hscb->SG_list_pointer = cpu_to_le32(SCB_DMA_ADDR(scb, &scb->sg_list[0]));
10803 hscb->data_count = scb->sg_list[0].length;
10804 hscb->data_pointer = scb->sg_list[0].address;
10805 }
10806 else
10807 {
10808 scb->sg_count = 0;
10809 scb->sg_length = 0;
10810 hscb->SG_segment_count = 0;
10811 hscb->SG_list_pointer = 0;
10812 hscb->data_count = 0;
10813 hscb->data_pointer = 0;
10814 }
10815 }
10816 }
10817
10818 /*+F*************************************************************************
10819 * Function:
10820 * aic7xxx_queue
10821 *
10822 * Description:
10823 * Queue a SCB to the controller.
10824 *-F*************************************************************************/
10825 int
aic7xxx_queue(Scsi_Cmnd * cmd,void (* fn)(Scsi_Cmnd *))10826 aic7xxx_queue(Scsi_Cmnd *cmd, void (*fn)(Scsi_Cmnd *))
10827 {
10828 struct aic7xxx_host *p;
10829 struct aic7xxx_scb *scb;
10830 #ifdef AIC7XXX_VERBOSE_DEBUGGING
10831 int tindex = TARGET_INDEX(cmd);
10832 #endif
10833 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,1,95)
10834 unsigned long cpu_flags = 0;
10835 #endif
10836
10837 p = (struct aic7xxx_host *) cmd->host->hostdata;
10838 /*
10839 * Check to see if channel was scanned.
10840 */
10841
10842 #ifdef AIC7XXX_VERBOSE_DEBUGGING
10843 if (!(p->flags & AHC_A_SCANNED) && (cmd->channel == 0))
10844 {
10845 if (aic7xxx_verbose & VERBOSE_PROBE2)
10846 printk(INFO_LEAD "Scanning channel for devices.\n",
10847 p->host_no, 0, -1, -1);
10848 p->flags |= AHC_A_SCANNED;
10849 }
10850 else
10851 {
10852 if (!(p->flags & AHC_B_SCANNED) && (cmd->channel == 1))
10853 {
10854 if (aic7xxx_verbose & VERBOSE_PROBE2)
10855 printk(INFO_LEAD "Scanning channel for devices.\n",
10856 p->host_no, 1, -1, -1);
10857 p->flags |= AHC_B_SCANNED;
10858 }
10859 }
10860
10861 if (p->dev_active_cmds[tindex] > (cmd->device->queue_depth + 1))
10862 {
10863 printk(WARN_LEAD "Commands queued exceeds queue "
10864 "depth, active=%d\n",
10865 p->host_no, CTL_OF_CMD(cmd),
10866 p->dev_active_cmds[tindex]);
10867 if ( p->dev_active_cmds[tindex] > 220 )
10868 p->dev_active_cmds[tindex] = 0;
10869 }
10870 #endif
10871
10872 scb = scbq_remove_head(&p->scb_data->free_scbs);
10873 if (scb == NULL)
10874 {
10875 DRIVER_LOCK
10876 aic7xxx_allocate_scb(p);
10877 DRIVER_UNLOCK
10878 scb = scbq_remove_head(&p->scb_data->free_scbs);
10879 if(scb == NULL)
10880 printk(WARN_LEAD "Couldn't get a free SCB.\n", p->host_no,
10881 CTL_OF_CMD(cmd));
10882 }
10883 while (scb == NULL)
10884 {
10885 /*
10886 * Well, all SCBs are currently active on the bus. So, we spin here
10887 * running the interrupt handler until one completes and becomes free.
10888 * We can do this safely because we either A) hold the driver lock (in
10889 * 2.0 kernels) or we have the io_request_lock held (in 2.2 and later
10890 * kernels) and so either way, we won't take any other interrupts and
10891 * the queue path will block until we release it. Also, we would worry
10892 * about running the completion queues, but obviously there are plenty
10893 * of commands outstanding to trigger a later interrupt that will do
10894 * that for us, so skip it here.
10895 */
10896 DRIVER_LOCK
10897 aic7xxx_isr(p->irq, p, NULL);
10898 DRIVER_UNLOCK
10899 scb = scbq_remove_head(&p->scb_data->free_scbs);
10900 }
10901 scb->cmd = cmd;
10902 aic7xxx_position(cmd) = scb->hscb->tag;
10903
10904 /*
10905 * Make sure the Scsi_Cmnd pointer is saved, the struct it points to
10906 * is set up properly, and the parity error flag is reset, then send
10907 * the SCB to the sequencer and watch the fun begin.
10908 */
10909 cmd->scsi_done = fn;
10910 cmd->result = DID_OK;
10911 memset(cmd->sense_buffer, 0, sizeof(cmd->sense_buffer));
10912 aic7xxx_error(cmd) = DID_OK;
10913 aic7xxx_status(cmd) = 0;
10914 cmd->host_scribble = NULL;
10915
10916 /*
10917 * Construct the SCB beforehand, so the sequencer is
10918 * paused a minimal amount of time.
10919 */
10920 aic7xxx_buildscb(p, cmd, scb);
10921
10922 scb->flags |= SCB_ACTIVE | SCB_WAITINGQ;
10923
10924 DRIVER_LOCK
10925 scbq_insert_tail(&p->waiting_scbs, scb);
10926 if ( (p->flags & (AHC_IN_ISR | AHC_IN_ABORT | AHC_IN_RESET)) == 0)
10927 {
10928 aic7xxx_run_waiting_queues(p);
10929 }
10930 DRIVER_UNLOCK
10931 return (0);
10932 }
10933
10934 /*+F*************************************************************************
10935 * Function:
10936 * aic7xxx_bus_device_reset
10937 *
10938 * Description:
10939 * Abort or reset the current SCSI command(s). If the scb has not
10940 * previously been aborted, then we attempt to send a BUS_DEVICE_RESET
10941 * message to the target. If the scb has previously been unsuccessfully
10942 * aborted, then we will reset the channel and have all devices renegotiate.
10943 * Returns an enumerated type that indicates the status of the operation.
10944 *-F*************************************************************************/
10945 static int
aic7xxx_bus_device_reset(struct aic7xxx_host * p,Scsi_Cmnd * cmd)10946 aic7xxx_bus_device_reset(struct aic7xxx_host *p, Scsi_Cmnd *cmd)
10947 {
10948 struct aic7xxx_scb *scb;
10949 struct aic7xxx_hwscb *hscb;
10950 int result = -1;
10951 int channel;
10952 unsigned char saved_scbptr, lastphase;
10953 unsigned char hscb_index;
10954 int disconnected;
10955
10956 scb = (p->scb_data->scb_array[aic7xxx_position(cmd)]);
10957 hscb = scb->hscb;
10958
10959 lastphase = aic_inb(p, LASTPHASE);
10960 if (aic7xxx_verbose & VERBOSE_RESET_PROCESS)
10961 {
10962 printk(INFO_LEAD "Bus Device reset, scb flags 0x%x, ",
10963 p->host_no, CTL_OF_SCB(scb), scb->flags);
10964 switch (lastphase)
10965 {
10966 case P_DATAOUT:
10967 printk("Data-Out phase\n");
10968 break;
10969 case P_DATAIN:
10970 printk("Data-In phase\n");
10971 break;
10972 case P_COMMAND:
10973 printk("Command phase\n");
10974 break;
10975 case P_MESGOUT:
10976 printk("Message-Out phase\n");
10977 break;
10978 case P_STATUS:
10979 printk("Status phase\n");
10980 break;
10981 case P_MESGIN:
10982 printk("Message-In phase\n");
10983 break;
10984 default:
10985 /*
10986 * We're not in a valid phase, so assume we're idle.
10987 */
10988 printk("while idle, LASTPHASE = 0x%x\n", lastphase);
10989 break;
10990 }
10991 printk(INFO_LEAD "SCSISIGI 0x%x, SEQADDR 0x%x, SSTAT0 0x%x, SSTAT1 "
10992 "0x%x\n", p->host_no, CTL_OF_SCB(scb),
10993 aic_inb(p, SCSISIGI),
10994 aic_inb(p, SEQADDR0) | (aic_inb(p, SEQADDR1) << 8),
10995 aic_inb(p, SSTAT0), aic_inb(p, SSTAT1));
10996 printk(INFO_LEAD "SG_CACHEPTR 0x%x, SSTAT2 0x%x, STCNT 0x%x\n", p->host_no,
10997 CTL_OF_SCB(scb),
10998 (p->features & AHC_ULTRA2) ? aic_inb(p, SG_CACHEPTR) : 0,
10999 aic_inb(p, SSTAT2),
11000 aic_inb(p, STCNT + 2) << 16 | aic_inb(p, STCNT + 1) << 8 |
11001 aic_inb(p, STCNT));
11002 }
11003
11004 channel = cmd->channel;
11005
11006 /*
11007 * Send a Device Reset Message:
11008 * The target that is holding up the bus may not be the same as
11009 * the one that triggered this timeout (different commands have
11010 * different timeout lengths). Our strategy here is to queue an
11011 * abort message to the timed out target if it is disconnected.
11012 * Otherwise, if we have an active target we stuff the message buffer
11013 * with an abort message and assert ATN in the hopes that the target
11014 * will let go of the bus and go to the mesgout phase. If this
11015 * fails, we'll get another timeout a few seconds later which will
11016 * attempt a bus reset.
11017 */
11018 saved_scbptr = aic_inb(p, SCBPTR);
11019 disconnected = FALSE;
11020
11021 if (lastphase != P_BUSFREE)
11022 {
11023 if (aic_inb(p, SCB_TAG) >= p->scb_data->numscbs)
11024 {
11025 printk(WARN_LEAD "Invalid SCB ID %d is active, "
11026 "SCB flags = 0x%x.\n", p->host_no,
11027 CTL_OF_CMD(cmd), scb->hscb->tag, scb->flags);
11028 return(SCSI_RESET_ERROR);
11029 }
11030 if (scb->hscb->tag == aic_inb(p, SCB_TAG))
11031 {
11032 if ( (lastphase != P_MESGOUT) && (lastphase != P_MESGIN) )
11033 {
11034 if (aic7xxx_verbose & VERBOSE_RESET_PROCESS)
11035 printk(INFO_LEAD "Device reset message in "
11036 "message buffer\n", p->host_no, CTL_OF_SCB(scb));
11037 scb->flags |= SCB_RESET | SCB_DEVICE_RESET;
11038 aic7xxx_error(scb->cmd) = DID_RESET;
11039 p->dev_flags[TARGET_INDEX(scb->cmd)] |=
11040 BUS_DEVICE_RESET_PENDING;
11041 /* Send the abort message to the active SCB. */
11042 aic_outb(p, HOST_MSG, MSG_OUT);
11043 aic_outb(p, lastphase | ATNO, SCSISIGO);
11044 return(SCSI_RESET_PENDING);
11045 }
11046 else
11047 {
11048 /* We want to send out the message, but it could screw an already */
11049 /* in place and being used message. Instead, we return an error */
11050 /* to try and start the bus reset phase since this command is */
11051 /* probably hung (aborts failed, and now reset is failing). We */
11052 /* also make sure to set BUS_DEVICE_RESET_PENDING so we won't try */
11053 /* any more on this device, but instead will escalate to a bus or */
11054 /* host reset (additionally, we won't try to abort any more). */
11055 printk(WARN_LEAD "Device reset, Message buffer "
11056 "in use\n", p->host_no, CTL_OF_SCB(scb));
11057 scb->flags |= SCB_RESET | SCB_DEVICE_RESET;
11058 aic7xxx_error(scb->cmd) = DID_RESET;
11059 p->dev_flags[TARGET_INDEX(scb->cmd)] |=
11060 BUS_DEVICE_RESET_PENDING;
11061 return(SCSI_RESET_ERROR);
11062 }
11063 }
11064 } /* if (last_phase != P_BUSFREE).....indicates we are idle and can work */
11065 hscb_index = aic7xxx_find_scb(p, scb);
11066 if (hscb_index == SCB_LIST_NULL)
11067 {
11068 disconnected = (aic7xxx_scb_on_qoutfifo(p, scb)) ? FALSE : TRUE;
11069 }
11070 else
11071 {
11072 aic_outb(p, hscb_index, SCBPTR);
11073 if (aic_inb(p, SCB_CONTROL) & DISCONNECTED)
11074 {
11075 disconnected = TRUE;
11076 }
11077 }
11078 if (disconnected)
11079 {
11080 /*
11081 * Simply set the MK_MESSAGE flag and the SEQINT handler will do
11082 * the rest on a reconnect.
11083 */
11084 scb->hscb->control |= MK_MESSAGE;
11085 scb->flags |= SCB_RESET | SCB_DEVICE_RESET;
11086 p->dev_flags[TARGET_INDEX(scb->cmd)] |=
11087 BUS_DEVICE_RESET_PENDING;
11088 if (hscb_index != SCB_LIST_NULL)
11089 {
11090 unsigned char scb_control;
11091
11092 aic_outb(p, hscb_index, SCBPTR);
11093 scb_control = aic_inb(p, SCB_CONTROL);
11094 aic_outb(p, scb_control | MK_MESSAGE, SCB_CONTROL);
11095 }
11096 /*
11097 * Actually requeue this SCB in case we can select the
11098 * device before it reconnects. If the transaction we
11099 * want to abort is not tagged, then this will be the only
11100 * outstanding command and we can simply shove it on the
11101 * qoutfifo and be done. If it is tagged, then it goes right
11102 * in with all the others, no problem :) We need to add it
11103 * to the qinfifo and let the sequencer know it is there.
11104 * Now, the only problem left to deal with is, *IF* this
11105 * command completes, in spite of the MK_MESSAGE bit in the
11106 * control byte, then we need to pick that up in the interrupt
11107 * routine and clean things up. This *shouldn't* ever happen.
11108 */
11109 if (aic7xxx_verbose & VERBOSE_RESET_PROCESS)
11110 printk(INFO_LEAD "Queueing device reset "
11111 "command.\n", p->host_no, CTL_OF_SCB(scb));
11112 p->qinfifo[p->qinfifonext++] = scb->hscb->tag;
11113 if (p->features & AHC_QUEUE_REGS)
11114 aic_outb(p, p->qinfifonext, HNSCB_QOFF);
11115 else
11116 aic_outb(p, p->qinfifonext, KERNEL_QINPOS);
11117 scb->flags |= SCB_QUEUED_ABORT;
11118 result = SCSI_RESET_PENDING;
11119 }
11120 else if (result == -1)
11121 {
11122 result = SCSI_RESET_ERROR;
11123 }
11124 aic_outb(p, saved_scbptr, SCBPTR);
11125 return (result);
11126 }
11127
11128
11129 /*+F*************************************************************************
11130 * Function:
11131 * aic7xxx_panic_abort
11132 *
11133 * Description:
11134 * Abort the current SCSI command(s).
11135 *-F*************************************************************************/
11136 void
aic7xxx_panic_abort(struct aic7xxx_host * p,Scsi_Cmnd * cmd)11137 aic7xxx_panic_abort(struct aic7xxx_host *p, Scsi_Cmnd *cmd)
11138 {
11139
11140 printk("aic7xxx driver version %s/%s\n", AIC7XXX_C_VERSION,
11141 UTS_RELEASE);
11142 printk("Controller type:\n %s\n", board_names[p->board_name_index]);
11143 printk("p->flags=0x%lx, p->chip=0x%x, p->features=0x%x, "
11144 "sequencer %s paused\n",
11145 p->flags, p->chip, p->features,
11146 (aic_inb(p, HCNTRL) & PAUSE) ? "is" : "isn't" );
11147 pause_sequencer(p);
11148 disable_irq(p->irq);
11149 aic7xxx_print_card(p);
11150 aic7xxx_print_scratch_ram(p);
11151 spin_unlock_irq(&io_request_lock);
11152 for(;;) barrier();
11153 }
11154
11155 /*+F*************************************************************************
11156 * Function:
11157 * aic7xxx_abort
11158 *
11159 * Description:
11160 * Abort the current SCSI command(s).
11161 *-F*************************************************************************/
11162 int
aic7xxx_abort(Scsi_Cmnd * cmd)11163 aic7xxx_abort(Scsi_Cmnd *cmd)
11164 {
11165 struct aic7xxx_scb *scb = NULL;
11166 struct aic7xxx_host *p;
11167 int result, found=0;
11168 unsigned char tmp_char, saved_hscbptr, next_hscbptr, prev_hscbptr;
11169 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,1,95)
11170 unsigned long cpu_flags = 0;
11171 #endif
11172
11173 p = (struct aic7xxx_host *) cmd->host->hostdata;
11174 scb = (p->scb_data->scb_array[aic7xxx_position(cmd)]);
11175
11176 /*
11177 * I added a new config option to the driver: "panic_on_abort" that will
11178 * cause the driver to panic and the machine to stop on the first abort
11179 * or reset call into the driver. At that point, it prints out a lot of
11180 * useful information for me which I can then use to try and debug the
11181 * problem. Simply enable the boot time prompt in order to activate this
11182 * code.
11183 */
11184 if (aic7xxx_panic_on_abort)
11185 aic7xxx_panic_abort(p, cmd);
11186
11187 DRIVER_LOCK
11188
11189 /*
11190 * Run the isr to grab any command in the QOUTFIFO and any other misc.
11191 * assundry tasks. This should also set up the bh handler if there is
11192 * anything to be done, but it won't run until we are done here since
11193 * we are following a straight code path without entering the scheduler
11194 * code.
11195 */
11196 pause_sequencer(p);
11197 while ( (aic_inb(p, INTSTAT) & INT_PEND) && !(p->flags & AHC_IN_ISR))
11198 {
11199 aic7xxx_isr(p->irq, p, (void *)NULL);
11200 pause_sequencer(p);
11201 }
11202 aic7xxx_done_cmds_complete(p);
11203
11204 if (scb == NULL)
11205 {
11206 if (aic7xxx_verbose & VERBOSE_ABORT_MID)
11207 printk(INFO_LEAD "Abort called with bogus Scsi_Cmnd "
11208 "pointer.\n", p->host_no, CTL_OF_CMD(cmd));
11209 unpause_sequencer(p, FALSE);
11210 DRIVER_UNLOCK
11211 return(SCSI_ABORT_NOT_RUNNING);
11212 }
11213 if (scb->cmd != cmd) /* Hmmm...either this SCB is currently free with a */
11214 { /* NULL cmd pointer (NULLed out when freed) or it */
11215 /* has already been recycled for another command */
11216 /* Either way, this SCB has nothing to do with this*/
11217 /* command and we need to deal with cmd without */
11218 /* touching the SCB. */
11219 /* The theory here is to return a value that will */
11220 /* make the queued for complete command actually */
11221 /* finish successfully, or to indicate that we */
11222 /* don't have this cmd any more and the mid level */
11223 /* code needs to find it. */
11224 if (aic7xxx_verbose & VERBOSE_ABORT_MID)
11225 printk(INFO_LEAD "Abort called for already completed"
11226 " command.\n", p->host_no, CTL_OF_CMD(cmd));
11227 unpause_sequencer(p, FALSE);
11228 DRIVER_UNLOCK
11229 return(SCSI_ABORT_NOT_RUNNING);
11230 }
11231
11232 /* At this point we know the following:
11233 * the SCB pointer is valid
11234 * the command pointer passed in to us and the scb->cmd pointer match
11235 * this then means that the command we need to abort is the same as the
11236 * command held by the scb pointer and is a valid abort request.
11237 * Now, we just have to figure out what to do from here. Current plan is:
11238 * if we have already been here on this command, escalate to a reset
11239 * if scb is on waiting list or QINFIFO, send it back as aborted, but
11240 * we also need to be aware of the possibility that we could be using
11241 * a faked negotiation command that is holding this command up, if
11242 * so we need to take care of that command instead, which means we
11243 * would then treat this one like it was sitting around disconnected
11244 * instead.
11245 * if scb is on WAITING_SCB list in sequencer, free scb and send back
11246 * if scb is disconnected and not completed, abort with abort message
11247 * if scb is currently running, then it may be causing the bus to hang
11248 * so we want a return value that indicates a reset would be appropriate
11249 * if the command does not finish shortly
11250 * if scb is already complete but not on completeq, we're screwed because
11251 * this can't happen (except if the command is in the QOUTFIFO, in which
11252 * case we would like it to complete successfully instead of having to
11253 * to be re-done)
11254 * All other scenarios already dealt with by previous code.
11255 */
11256
11257 if ( scb->flags & (SCB_ABORT | SCB_RESET | SCB_QUEUED_ABORT) )
11258 {
11259 if (aic7xxx_verbose & VERBOSE_ABORT_PROCESS)
11260 printk(INFO_LEAD "SCB aborted once already, "
11261 "escalating.\n", p->host_no, CTL_OF_SCB(scb));
11262 unpause_sequencer(p, FALSE);
11263 DRIVER_UNLOCK
11264 return(SCSI_ABORT_SNOOZE);
11265 }
11266 if ( (p->flags & (AHC_RESET_PENDING | AHC_ABORT_PENDING)) ||
11267 (p->dev_flags[TARGET_INDEX(scb->cmd)] &
11268 BUS_DEVICE_RESET_PENDING) )
11269 {
11270 if (aic7xxx_verbose & VERBOSE_ABORT_PROCESS)
11271 printk(INFO_LEAD "Reset/Abort pending for this "
11272 "device, not wasting our time.\n", p->host_no, CTL_OF_SCB(scb));
11273 unpause_sequencer(p, FALSE);
11274 DRIVER_UNLOCK
11275 return(SCSI_ABORT_PENDING);
11276 }
11277
11278 found = 0;
11279 p->flags |= AHC_IN_ABORT;
11280 if (aic7xxx_verbose & VERBOSE_ABORT)
11281 {
11282 printk(INFO_LEAD "Aborting scb %d, flags 0x%x, SEQADDR 0x%x, LASTPHASE "
11283 "0x%x\n",
11284 p->host_no, CTL_OF_SCB(scb), scb->hscb->tag, scb->flags,
11285 aic_inb(p, SEQADDR0) | (aic_inb(p, SEQADDR1) << 8),
11286 aic_inb(p, LASTPHASE));
11287 printk(INFO_LEAD "SG_CACHEPTR 0x%x, SG_COUNT %d, SCSISIGI 0x%x\n",
11288 p->host_no, CTL_OF_SCB(scb), (p->features & AHC_ULTRA2) ?
11289 aic_inb(p, SG_CACHEPTR) : 0, aic_inb(p, SG_COUNT),
11290 aic_inb(p, SCSISIGI));
11291 printk(INFO_LEAD "SSTAT0 0x%x, SSTAT1 0x%x, SSTAT2 0x%x\n",
11292 p->host_no, CTL_OF_SCB(scb), aic_inb(p, SSTAT0),
11293 aic_inb(p, SSTAT1), aic_inb(p, SSTAT2));
11294 }
11295
11296 /*
11297 * First, let's check to see if the currently running command is our target
11298 * since if it is, the return is fairly easy and quick since we don't want
11299 * to touch the command in case it might complete, but we do want a timeout
11300 * in case it's actually hung, so we really do nothing, but tell the mid
11301 * level code to reset the timeout.
11302 */
11303
11304 if ( scb->hscb->tag == aic_inb(p, SCB_TAG) )
11305 {
11306 /*
11307 * Check to see if the sequencer is just sitting on this command, or
11308 * if it's actively being run.
11309 */
11310 result = aic_inb(p, LASTPHASE);
11311 switch (result)
11312 {
11313 case P_DATAOUT: /* For any of these cases, we can assume we are */
11314 case P_DATAIN: /* an active command and act according. For */
11315 case P_COMMAND: /* anything else we are going to fall on through*/
11316 case P_STATUS: /* The SCSI_ABORT_SNOOZE will give us two abort */
11317 case P_MESGOUT: /* chances to finish and then escalate to a */
11318 case P_MESGIN: /* reset call */
11319 if (aic7xxx_verbose & VERBOSE_ABORT_PROCESS)
11320 printk(INFO_LEAD "SCB is currently active. "
11321 "Waiting on completion.\n", p->host_no, CTL_OF_SCB(scb));
11322 printk(INFO_LEAD "SCSISIGI 0x%x, SEQADDR 0x%x, SSTAT0 0x%x, SSTAT1 "
11323 "0x%x\n", p->host_no, CTL_OF_SCB(scb),
11324 aic_inb(p, SCSISIGI),
11325 aic_inb(p, SEQADDR0) | (aic_inb(p, SEQADDR1) << 8),
11326 aic_inb(p, SSTAT0), aic_inb(p, SSTAT1));
11327 printk(INFO_LEAD "SG_CACHEPTR 0x%x, SSTAT2 0x%x, STCNT 0x%x\n",
11328 p->host_no, CTL_OF_SCB(scb),
11329 (p->features & AHC_ULTRA2) ? aic_inb(p, SG_CACHEPTR) : 0,
11330 aic_inb(p, SSTAT2), aic_inb(p, STCNT + 2) << 16 |
11331 aic_inb(p, STCNT + 1) << 8 | aic_inb(p, STCNT));
11332 unpause_sequencer(p, FALSE);
11333 p->flags &= ~AHC_IN_ABORT;
11334 scb->flags |= SCB_RECOVERY_SCB; /* Note the fact that we've been */
11335 p->flags |= AHC_ABORT_PENDING; /* here so we will know not to */
11336 DRIVER_UNLOCK /* muck with other SCBs if this */
11337 return(SCSI_ABORT_PENDING); /* one doesn't complete and clear */
11338 break; /* out. */
11339 default:
11340 break;
11341 }
11342 }
11343
11344 if ((found == 0) && (scb->flags & SCB_WAITINGQ))
11345 {
11346 int tindex = TARGET_INDEX(cmd);
11347
11348 if (aic7xxx_verbose & VERBOSE_ABORT_PROCESS)
11349 printk(INFO_LEAD "SCB found on waiting list and "
11350 "aborted.\n", p->host_no, CTL_OF_SCB(scb));
11351 scbq_remove(&p->waiting_scbs, scb);
11352 scbq_remove(&p->delayed_scbs[tindex], scb);
11353 p->dev_active_cmds[tindex]++;
11354 p->activescbs++;
11355 scb->flags &= ~(SCB_WAITINGQ | SCB_ACTIVE);
11356 scb->flags |= SCB_ABORT | SCB_QUEUED_FOR_DONE;
11357 found = 1;
11358 }
11359
11360 /*
11361 * We just checked the waiting_q, now for the QINFIFO
11362 */
11363 if ( found == 0 )
11364 {
11365 if ( ((found = aic7xxx_search_qinfifo(p, cmd->target,
11366 cmd->channel,
11367 cmd->lun, scb->hscb->tag, SCB_ABORT | SCB_QUEUED_FOR_DONE,
11368 FALSE, NULL)) != 0) &&
11369 (aic7xxx_verbose & VERBOSE_ABORT_PROCESS))
11370 printk(INFO_LEAD "SCB found in QINFIFO and "
11371 "aborted.\n", p->host_no, CTL_OF_SCB(scb));
11372 }
11373
11374 /*
11375 * QINFIFO, waitingq, completeq done. Next, check WAITING_SCB list in card
11376 */
11377
11378 if ( found == 0 )
11379 {
11380 unsigned char scb_next_ptr;
11381 prev_hscbptr = SCB_LIST_NULL;
11382 saved_hscbptr = aic_inb(p, SCBPTR);
11383 next_hscbptr = aic_inb(p, WAITING_SCBH);
11384 while ( next_hscbptr != SCB_LIST_NULL )
11385 {
11386 aic_outb(p, next_hscbptr, SCBPTR );
11387 if ( scb->hscb->tag == aic_inb(p, SCB_TAG) )
11388 {
11389 found = 1;
11390 if (aic7xxx_verbose & VERBOSE_ABORT_PROCESS)
11391 printk(INFO_LEAD "SCB found on hardware waiting"
11392 " list and aborted.\n", p->host_no, CTL_OF_SCB(scb));
11393 if ( prev_hscbptr == SCB_LIST_NULL )
11394 {
11395 aic_outb(p, aic_inb(p, SCB_NEXT), WAITING_SCBH);
11396 /* stop the selection since we just
11397 * grabbed the scb out from under the
11398 * card
11399 */
11400 aic_outb(p, aic_inb(p, SCSISEQ) & ~ENSELO, SCSISEQ);
11401 aic_outb(p, CLRSELTIMEO, CLRSINT1);
11402 }
11403 else
11404 {
11405 scb_next_ptr = aic_inb(p, SCB_NEXT);
11406 aic_outb(p, prev_hscbptr, SCBPTR);
11407 aic_outb(p, scb_next_ptr, SCB_NEXT);
11408 aic_outb(p, next_hscbptr, SCBPTR);
11409 }
11410 aic_outb(p, SCB_LIST_NULL, SCB_TAG);
11411 aic_outb(p, 0, SCB_CONTROL);
11412 aic7xxx_add_curscb_to_free_list(p);
11413 scb->flags = SCB_ABORT | SCB_QUEUED_FOR_DONE;
11414 break;
11415 }
11416 prev_hscbptr = next_hscbptr;
11417 next_hscbptr = aic_inb(p, SCB_NEXT);
11418 }
11419 aic_outb(p, saved_hscbptr, SCBPTR );
11420 }
11421
11422 /*
11423 * Hmmm...completeq, QOUTFIFO, QINFIFO, WAITING_SCBH, waitingq all checked.
11424 * OK...the sequencer's paused, interrupts are off, and we haven't found the
11425 * command anyplace where it could be easily aborted. Time for the hard
11426 * work. We also know the command is valid. This essentially means the
11427 * command is disconnected, or connected but not into any phases yet, which
11428 * we know due to the tests we ran earlier on the current active scb phase.
11429 * At this point we can queue the abort tag and go on with life.
11430 */
11431
11432 if ( found == 0 )
11433 {
11434 p->flags |= AHC_ABORT_PENDING;
11435 scb->flags |= SCB_QUEUED_ABORT | SCB_ABORT | SCB_RECOVERY_SCB;
11436 scb->hscb->control |= MK_MESSAGE;
11437 result=aic7xxx_find_scb(p, scb);
11438 if ( result != SCB_LIST_NULL )
11439 {
11440 saved_hscbptr = aic_inb(p, SCBPTR);
11441 aic_outb(p, result, SCBPTR);
11442 tmp_char = aic_inb(p, SCB_CONTROL);
11443 aic_outb(p, tmp_char | MK_MESSAGE, SCB_CONTROL);
11444 aic_outb(p, saved_hscbptr, SCBPTR);
11445 }
11446 if (aic7xxx_verbose & VERBOSE_ABORT_PROCESS)
11447 printk(INFO_LEAD "SCB disconnected. Queueing Abort"
11448 " SCB.\n", p->host_no, CTL_OF_SCB(scb));
11449 p->qinfifo[p->qinfifonext++] = scb->hscb->tag;
11450 if (p->features & AHC_QUEUE_REGS)
11451 aic_outb(p, p->qinfifonext, HNSCB_QOFF);
11452 else
11453 aic_outb(p, p->qinfifonext, KERNEL_QINPOS);
11454 }
11455 if (found)
11456 {
11457 aic7xxx_run_done_queue(p, TRUE);
11458 aic7xxx_run_waiting_queues(p);
11459 }
11460 p->flags &= ~AHC_IN_ABORT;
11461 unpause_sequencer(p, FALSE);
11462 DRIVER_UNLOCK
11463
11464 /*
11465 * On the return value. If we found the command and aborted it, then we know
11466 * it's already sent back and there is no reason for a further timeout, so
11467 * we use SCSI_ABORT_SUCCESS. On the queued abort side, we aren't so certain
11468 * there hasn't been a bus hang or something that might keep the abort from
11469 * from completing. Therefore, we use SCSI_ABORT_PENDING. The first time this
11470 * is passed back, the timeout on the command gets extended, the second time
11471 * we pass this back, the mid level SCSI code calls our reset function, which
11472 * would shake loose a hung bus.
11473 */
11474 if ( found != 0 )
11475 return(SCSI_ABORT_SUCCESS);
11476 else
11477 return(SCSI_ABORT_PENDING);
11478 }
11479
11480
11481 /*+F*************************************************************************
11482 * Function:
11483 * aic7xxx_reset
11484 *
11485 * Description:
11486 * Resetting the bus always succeeds - is has to, otherwise the
11487 * kernel will panic! Try a surgical technique - sending a BUS
11488 * DEVICE RESET message - on the offending target before pulling
11489 * the SCSI bus reset line.
11490 *-F*************************************************************************/
11491 int
aic7xxx_reset(Scsi_Cmnd * cmd,unsigned int flags)11492 aic7xxx_reset(Scsi_Cmnd *cmd, unsigned int flags)
11493 {
11494 struct aic7xxx_scb *scb = NULL;
11495 struct aic7xxx_host *p;
11496 int tindex;
11497 int result = -1;
11498 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,1,95)
11499 unsigned long cpu_flags = 0;
11500 #endif
11501 #define DEVICE_RESET 0x01
11502 #define BUS_RESET 0x02
11503 #define HOST_RESET 0x04
11504 #define RESET_DELAY 0x08
11505 int action;
11506
11507
11508 if ( cmd == NULL )
11509 {
11510 printk(KERN_WARNING "(scsi?:?:?:?) Reset called with NULL Scsi_Cmnd "
11511 "pointer, failing.\n");
11512 return(SCSI_RESET_SNOOZE);
11513 }
11514
11515 p = (struct aic7xxx_host *) cmd->host->hostdata;
11516 scb = (p->scb_data->scb_array[aic7xxx_position(cmd)]);
11517 tindex = TARGET_INDEX(cmd);
11518
11519 /*
11520 * I added a new config option to the driver: "panic_on_abort" that will
11521 * cause the driver to panic and the machine to stop on the first abort
11522 * or reset call into the driver. At that point, it prints out a lot of
11523 * useful information for me which I can then use to try and debug the
11524 * problem. Simply enable the boot time prompt in order to activate this
11525 * code.
11526 */
11527 if (aic7xxx_panic_on_abort)
11528 aic7xxx_panic_abort(p, cmd);
11529
11530 DRIVER_LOCK
11531
11532 pause_sequencer(p);
11533
11534 if(flags & SCSI_RESET_SYNCHRONOUS)
11535 {
11536 if (aic7xxx_verbose & VERBOSE_RESET_MID)
11537 printk(INFO_LEAD "Reset called for a SYNCHRONOUS reset, flags 0x%x, "
11538 "cmd->result 0x%x.\n", p->host_no, CTL_OF_CMD(cmd), flags,
11539 cmd->result);
11540 scb = NULL;
11541 action = HOST_RESET;
11542 }
11543 else if ((scb == NULL) || (scb->cmd != cmd))
11544 {
11545 if (aic7xxx_verbose & VERBOSE_RESET_MID)
11546 printk(INFO_LEAD "Reset called with bogus Scsi_Cmnd"
11547 "->SCB mapping, failing.\n", p->host_no, CTL_OF_CMD(cmd));
11548 aic7xxx_done_cmds_complete(p);
11549 aic7xxx_run_waiting_queues(p);
11550 unpause_sequencer(p, FALSE);
11551 DRIVER_UNLOCK
11552 return(SCSI_RESET_NOT_RUNNING);
11553 }
11554 else
11555 {
11556 if (aic7xxx_verbose & VERBOSE_RESET_MID)
11557 printk(INFO_LEAD "Reset called, scb %d, flags "
11558 "0x%x\n", p->host_no, CTL_OF_SCB(scb), scb->hscb->tag, scb->flags);
11559 if ( flags & SCSI_RESET_SUGGEST_HOST_RESET )
11560 {
11561 action = HOST_RESET;
11562 }
11563 else if ( flags & SCSI_RESET_SUGGEST_BUS_RESET )
11564 {
11565 action = BUS_RESET;
11566 }
11567 else
11568 {
11569 action = DEVICE_RESET;
11570 }
11571 }
11572
11573 while((aic_inb(p, INTSTAT) & INT_PEND) && !(p->flags & AHC_IN_ISR))
11574 {
11575 aic7xxx_isr(p->irq, p, (void *)NULL );
11576 pause_sequencer(p);
11577 }
11578 aic7xxx_done_cmds_complete(p);
11579
11580 if(scb && (scb->cmd == NULL))
11581 {
11582 /*
11583 * We just completed the command when we ran the isr stuff, so we no
11584 * longer have it.
11585 */
11586 aic7xxx_run_waiting_queues(p);
11587 unpause_sequencer(p, FALSE);
11588 DRIVER_UNLOCK
11589 return(SCSI_RESET_SUCCESS);
11590 }
11591
11592 if ( (action & DEVICE_RESET) &&
11593 (p->dev_flags[tindex] & BUS_DEVICE_RESET_PENDING) )
11594 {
11595 if (aic7xxx_verbose & VERBOSE_RESET_PROCESS)
11596 printk(INFO_LEAD "Bus device reset already sent to "
11597 "device, escalating.\n", p->host_no, CTL_OF_CMD(cmd));
11598 action = BUS_RESET;
11599 }
11600 if ( (action & DEVICE_RESET) &&
11601 (scb->flags & SCB_QUEUED_ABORT) )
11602 {
11603 if (aic7xxx_verbose & VERBOSE_RESET_PROCESS)
11604 {
11605 printk(INFO_LEAD "Have already attempted to reach "
11606 "device with queued\n", p->host_no, CTL_OF_CMD(cmd));
11607 printk(INFO_LEAD "message, will escalate to bus "
11608 "reset.\n", p->host_no, CTL_OF_CMD(cmd));
11609 }
11610 action = BUS_RESET;
11611 }
11612 if ( (action & DEVICE_RESET) &&
11613 (p->flags & (AHC_RESET_PENDING | AHC_ABORT_PENDING)) )
11614 {
11615 if (aic7xxx_verbose & VERBOSE_RESET_PROCESS)
11616 printk(INFO_LEAD "Bus device reset stupid when "
11617 "other action has failed.\n", p->host_no, CTL_OF_CMD(cmd));
11618 action = BUS_RESET;
11619 }
11620 if ( (action & BUS_RESET) && !(p->features & AHC_TWIN) )
11621 {
11622 action = HOST_RESET;
11623 }
11624 if ( (p->dev_flags[tindex] & DEVICE_RESET_DELAY) &&
11625 !(action & (HOST_RESET | BUS_RESET)))
11626 {
11627 if (aic7xxx_verbose & VERBOSE_RESET_PROCESS)
11628 {
11629 printk(INFO_LEAD "Reset called too soon after last "
11630 "reset without requesting\n", p->host_no, CTL_OF_CMD(cmd));
11631 printk(INFO_LEAD "bus or host reset, escalating.\n", p->host_no,
11632 CTL_OF_CMD(cmd));
11633 }
11634 action = BUS_RESET;
11635 }
11636 if ( (p->flags & AHC_RESET_DELAY) &&
11637 (action & (HOST_RESET | BUS_RESET)) )
11638 {
11639 if (aic7xxx_verbose & VERBOSE_RESET_PROCESS)
11640 printk(INFO_LEAD "Reset called too soon after "
11641 "last bus reset, delaying.\n", p->host_no, CTL_OF_CMD(cmd));
11642 action = RESET_DELAY;
11643 }
11644 /*
11645 * By this point, we want to already know what we are going to do and
11646 * only have the following code implement our course of action.
11647 */
11648 switch (action)
11649 {
11650 case RESET_DELAY:
11651 aic7xxx_run_waiting_queues(p);
11652 unpause_sequencer(p, FALSE);
11653 DRIVER_UNLOCK
11654 if(scb == NULL)
11655 return(SCSI_RESET_PUNT);
11656 else
11657 return(SCSI_RESET_PENDING);
11658 break;
11659 case DEVICE_RESET:
11660 p->flags |= AHC_IN_RESET;
11661 result = aic7xxx_bus_device_reset(p, cmd);
11662 aic7xxx_run_done_queue(p, TRUE);
11663 /* We can't rely on run_waiting_queues to unpause the sequencer for
11664 * PCI based controllers since we use AAP */
11665 aic7xxx_run_waiting_queues(p);
11666 unpause_sequencer(p, FALSE);
11667 p->flags &= ~AHC_IN_RESET;
11668 DRIVER_UNLOCK
11669 return(result);
11670 break;
11671 case BUS_RESET:
11672 case HOST_RESET:
11673 default:
11674 p->flags |= AHC_IN_RESET | AHC_RESET_DELAY;
11675 p->dev_expires[p->scsi_id] = jiffies + (1 * HZ);
11676 p->dev_timer_active |= (0x01 << p->scsi_id);
11677 if ( !(p->dev_timer_active & (0x01 << MAX_TARGETS)) ||
11678 time_after_eq(p->dev_timer.expires, p->dev_expires[p->scsi_id]) )
11679 {
11680 mod_timer(&p->dev_timer, p->dev_expires[p->scsi_id]);
11681 p->dev_timer_active |= (0x01 << MAX_TARGETS);
11682 }
11683 aic7xxx_reset_channel(p, cmd->channel, TRUE);
11684 if ( (p->features & AHC_TWIN) && (action & HOST_RESET) )
11685 {
11686 aic7xxx_reset_channel(p, cmd->channel ^ 0x01, TRUE);
11687 restart_sequencer(p);
11688 }
11689 if (action != HOST_RESET)
11690 result = SCSI_RESET_SUCCESS | SCSI_RESET_BUS_RESET;
11691 else
11692 {
11693 result = SCSI_RESET_SUCCESS | SCSI_RESET_HOST_RESET;
11694 aic_outb(p, aic_inb(p, SIMODE1) & ~(ENREQINIT|ENBUSFREE),
11695 SIMODE1);
11696 aic7xxx_clear_intstat(p);
11697 p->flags &= ~AHC_HANDLING_REQINITS;
11698 p->msg_type = MSG_TYPE_NONE;
11699 p->msg_index = 0;
11700 p->msg_len = 0;
11701 }
11702 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,1,95)
11703 if(flags & SCSI_RESET_SYNCHRONOUS)
11704 {
11705 cmd->result = DID_RESET << 16;
11706 cmd->done(cmd);
11707 }
11708 #endif
11709 aic7xxx_run_done_queue(p, TRUE);
11710 p->flags &= ~AHC_IN_RESET;
11711 /*
11712 * We can't rely on run_waiting_queues to unpause the sequencer for
11713 * PCI based controllers since we use AAP. NOTE: this also sets
11714 * the timer for the one command we might have queued in the case
11715 * of a synch reset.
11716 */
11717 aic7xxx_run_waiting_queues(p);
11718 unpause_sequencer(p, FALSE);
11719 DRIVER_UNLOCK
11720 if(scb == NULL)
11721 return(SCSI_RESET_SUCCESS|SCSI_RESET_HOST_RESET);
11722 else
11723 return(result);
11724 break;
11725 }
11726 }
11727
11728 /*+F*************************************************************************
11729 * Function:
11730 * aic7xxx_biosparam
11731 *
11732 * Description:
11733 * Return the disk geometry for the given SCSI device.
11734 *-F*************************************************************************/
11735 int
aic7xxx_biosparam(Disk * disk,kdev_t dev,int geom[])11736 aic7xxx_biosparam(Disk *disk, kdev_t dev, int geom[])
11737 {
11738 int heads, sectors, cylinders, ret;
11739 struct aic7xxx_host *p;
11740 struct buffer_head *bh;
11741
11742 p = (struct aic7xxx_host *) disk->device->host->hostdata;
11743 bh = bread(MKDEV(MAJOR(dev), MINOR(dev)&~0xf), 0, block_size(dev));
11744
11745 if ( bh )
11746 {
11747 ret = scsi_partsize(bh, disk->capacity, &geom[2], &geom[0], &geom[1]);
11748 brelse(bh);
11749 if ( ret != -1 )
11750 return(ret);
11751 }
11752
11753 heads = 64;
11754 sectors = 32;
11755 cylinders = disk->capacity / (heads * sectors);
11756
11757 if ((p->flags & AHC_EXTEND_TRANS_A) && (cylinders > 1024))
11758 {
11759 heads = 255;
11760 sectors = 63;
11761 cylinders = disk->capacity / (heads * sectors);
11762 }
11763
11764 geom[0] = heads;
11765 geom[1] = sectors;
11766 geom[2] = cylinders;
11767
11768 return (0);
11769 }
11770
11771 /*+F*************************************************************************
11772 * Function:
11773 * aic7xxx_release
11774 *
11775 * Description:
11776 * Free the passed in Scsi_Host memory structures prior to unloading the
11777 * module.
11778 *-F*************************************************************************/
11779 int
aic7xxx_release(struct Scsi_Host * host)11780 aic7xxx_release(struct Scsi_Host *host)
11781 {
11782 struct aic7xxx_host *p = (struct aic7xxx_host *) host->hostdata;
11783 struct aic7xxx_host *next, *prev;
11784
11785 if(p->irq)
11786 free_irq(p->irq, p);
11787 if(p->base)
11788 release_region(p->base, MAXREG - MINREG);
11789 #ifdef MMAPIO
11790 if(p->maddr)
11791 {
11792 iounmap((void *) (((unsigned long) p->maddr) & PAGE_MASK));
11793 }
11794 #endif /* MMAPIO */
11795 prev = NULL;
11796 next = first_aic7xxx;
11797 while(next != NULL)
11798 {
11799 if(next == p)
11800 {
11801 if(prev == NULL)
11802 first_aic7xxx = next->next;
11803 else
11804 prev->next = next->next;
11805 }
11806 else
11807 {
11808 prev = next;
11809 }
11810 next = next->next;
11811 }
11812 aic7xxx_free(p);
11813 return(0);
11814 }
11815
11816 /*+F*************************************************************************
11817 * Function:
11818 * aic7xxx_print_card
11819 *
11820 * Description:
11821 * Print out all of the control registers on the card
11822 *
11823 * NOTE: This function is not yet safe for use on the VLB and EISA
11824 * controllers, so it isn't used on those controllers at all.
11825 *-F*************************************************************************/
11826 static void
aic7xxx_print_card(struct aic7xxx_host * p)11827 aic7xxx_print_card(struct aic7xxx_host *p)
11828 {
11829 int i, j, k, chip;
11830 static struct register_ranges {
11831 int num_ranges;
11832 int range_val[32];
11833 } cards_ds[] = {
11834 { 0, {0,} }, /* none */
11835 {10, {0x00, 0x05, 0x08, 0x11, 0x18, 0x19, 0x1f, 0x1f, 0x60, 0x60, /*7771*/
11836 0x62, 0x66, 0x80, 0x8e, 0x90, 0x95, 0x97, 0x97, 0x9b, 0x9f} },
11837 { 9, {0x00, 0x05, 0x08, 0x11, 0x18, 0x1f, 0x60, 0x60, 0x62, 0x66, /*7850*/
11838 0x80, 0x8e, 0x90, 0x95, 0x97, 0x97, 0x9a, 0x9f} },
11839 { 9, {0x00, 0x05, 0x08, 0x11, 0x18, 0x1f, 0x60, 0x60, 0x62, 0x66, /*7860*/
11840 0x80, 0x8e, 0x90, 0x95, 0x97, 0x97, 0x9a, 0x9f} },
11841 {10, {0x00, 0x05, 0x08, 0x11, 0x18, 0x19, 0x1c, 0x1f, 0x60, 0x60, /*7870*/
11842 0x62, 0x66, 0x80, 0x8e, 0x90, 0x95, 0x97, 0x97, 0x9a, 0x9f} },
11843 {10, {0x00, 0x05, 0x08, 0x11, 0x18, 0x1a, 0x1c, 0x1f, 0x60, 0x60, /*7880*/
11844 0x62, 0x66, 0x80, 0x8e, 0x90, 0x95, 0x97, 0x97, 0x9a, 0x9f} },
11845 {16, {0x00, 0x05, 0x08, 0x11, 0x18, 0x1f, 0x60, 0x60, 0x62, 0x66, /*7890*/
11846 0x84, 0x8e, 0x90, 0x95, 0x97, 0x97, 0x9a, 0x9a, 0x9f, 0x9f,
11847 0xe0, 0xf1, 0xf4, 0xf4, 0xf6, 0xf6, 0xf8, 0xf8, 0xfa, 0xfc,
11848 0xfe, 0xff} },
11849 {12, {0x00, 0x05, 0x08, 0x11, 0x18, 0x19, 0x1b, 0x1f, 0x60, 0x60, /*7895*/
11850 0x62, 0x66, 0x80, 0x8e, 0x90, 0x95, 0x97, 0x97, 0x9a, 0x9a,
11851 0x9f, 0x9f, 0xe0, 0xf1} },
11852 {16, {0x00, 0x05, 0x08, 0x11, 0x18, 0x1f, 0x60, 0x60, 0x62, 0x66, /*7896*/
11853 0x84, 0x8e, 0x90, 0x95, 0x97, 0x97, 0x9a, 0x9a, 0x9f, 0x9f,
11854 0xe0, 0xf1, 0xf4, 0xf4, 0xf6, 0xf6, 0xf8, 0xf8, 0xfa, 0xfc,
11855 0xfe, 0xff} },
11856 {12, {0x00, 0x05, 0x08, 0x11, 0x18, 0x1f, 0x60, 0x60, 0x62, 0x66, /*7892*/
11857 0x84, 0x8e, 0x90, 0x95, 0x97, 0x97, 0x9a, 0x9a, 0x9c, 0x9f,
11858 0xe0, 0xf1, 0xf4, 0xfc} },
11859 {12, {0x00, 0x05, 0x08, 0x11, 0x18, 0x1f, 0x60, 0x60, 0x62, 0x66, /*7899*/
11860 0x84, 0x8e, 0x90, 0x95, 0x97, 0x97, 0x9a, 0x9a, 0x9c, 0x9f,
11861 0xe0, 0xf1, 0xf4, 0xfc} },
11862 };
11863 chip = p->chip & AHC_CHIPID_MASK;
11864 printk("%s at ",
11865 board_names[p->board_name_index]);
11866 switch(p->chip & ~AHC_CHIPID_MASK)
11867 {
11868 case AHC_VL:
11869 printk("VLB Slot %d.\n", p->pci_device_fn);
11870 break;
11871 case AHC_EISA:
11872 printk("EISA Slot %d.\n", p->pci_device_fn);
11873 break;
11874 case AHC_PCI:
11875 default:
11876 printk("PCI %d/%d/%d.\n", p->pci_bus, PCI_SLOT(p->pci_device_fn),
11877 PCI_FUNC(p->pci_device_fn));
11878 break;
11879 }
11880
11881 /*
11882 * the registers on the card....
11883 */
11884 printk("Card Dump:\n");
11885 k = 0;
11886 for(i=0; i<cards_ds[chip].num_ranges; i++)
11887 {
11888 for(j = cards_ds[chip].range_val[ i * 2 ];
11889 j <= cards_ds[chip].range_val[ i * 2 + 1 ] ;
11890 j++)
11891 {
11892 printk("%02x:%02x ", j, aic_inb(p, j));
11893 if(++k == 13)
11894 {
11895 printk("\n");
11896 k=0;
11897 }
11898 }
11899 }
11900 if(k != 0)
11901 printk("\n");
11902
11903 /*
11904 * If this was an Ultra2 controller, then we just hosed the card in terms
11905 * of the QUEUE REGS. This function is only called at init time or by
11906 * the panic_abort function, so it's safe to assume a generic init time
11907 * setting here
11908 */
11909
11910 if(p->features & AHC_QUEUE_REGS)
11911 {
11912 aic_outb(p, 0, SDSCB_QOFF);
11913 aic_outb(p, 0, SNSCB_QOFF);
11914 aic_outb(p, 0, HNSCB_QOFF);
11915 }
11916
11917 }
11918
11919 /*+F*************************************************************************
11920 * Function:
11921 * aic7xxx_print_scratch_ram
11922 *
11923 * Description:
11924 * Print out the scratch RAM values on the card.
11925 *-F*************************************************************************/
11926 static void
aic7xxx_print_scratch_ram(struct aic7xxx_host * p)11927 aic7xxx_print_scratch_ram(struct aic7xxx_host *p)
11928 {
11929 int i, k;
11930
11931 k = 0;
11932 printk("Scratch RAM:\n");
11933 for(i = SRAM_BASE; i < SEQCTL; i++)
11934 {
11935 printk("%02x:%02x ", i, aic_inb(p, i));
11936 if(++k == 13)
11937 {
11938 printk("\n");
11939 k=0;
11940 }
11941 }
11942 if (p->features & AHC_MORE_SRAM)
11943 {
11944 for(i = TARG_OFFSET; i < 0x80; i++)
11945 {
11946 printk("%02x:%02x ", i, aic_inb(p, i));
11947 if(++k == 13)
11948 {
11949 printk("\n");
11950 k=0;
11951 }
11952 }
11953 }
11954 printk("\n");
11955 }
11956
11957
11958 #include "aic7xxx_old/aic7xxx_proc.c"
11959
11960 MODULE_LICENSE("Dual BSD/GPL");
11961
11962
11963 /* Eventually this will go into an include file, but this will be later */
11964 static Scsi_Host_Template driver_template = AIC7XXX;
11965
11966 #include "scsi_module.c"
11967
11968 /*
11969 * Overrides for Emacs so that we almost follow Linus's tabbing style.
11970 * Emacs will notice this stuff at the end of the file and automatically
11971 * adjust the settings for this buffer only. This must remain at the end
11972 * of the file.
11973 * ---------------------------------------------------------------------------
11974 * Local variables:
11975 * c-indent-level: 2
11976 * c-brace-imaginary-offset: 0
11977 * c-brace-offset: -2
11978 * c-argdecl-indent: 2
11979 * c-label-offset: -2
11980 * c-continued-statement-offset: 2
11981 * c-continued-brace-offset: 0
11982 * indent-tabs-mode: nil
11983 * tab-width: 8
11984 * End:
11985 */
11986