Searched refs:RPX_CSR_ADDR (Results 1 – 8 of 8) sorted by relevance
114 *((uint *)RPX_CSR_ADDR) &= ~BCSR2_QSPACESEL; in qspan_pcibios_read_config_byte()125 *((uint *)RPX_CSR_ADDR) |= BCSR2_QSPACESEL; in qspan_pcibios_read_config_byte()153 *((uint *)RPX_CSR_ADDR) &= ~BCSR2_QSPACESEL; in qspan_pcibios_read_config_word()165 *((uint *)RPX_CSR_ADDR) |= BCSR2_QSPACESEL; in qspan_pcibios_read_config_word()190 *((uint *)RPX_CSR_ADDR) &= ~BCSR2_QSPACESEL; in qspan_pcibios_read_config_dword()201 *((uint *)RPX_CSR_ADDR) |= BCSR2_QSPACESEL; in qspan_pcibios_read_config_dword()230 *((uint *)RPX_CSR_ADDR) &= ~BCSR2_QSPACESEL; in qspan_pcibios_write_config_byte()241 *((uint *)RPX_CSR_ADDR) |= BCSR2_QSPACESEL; in qspan_pcibios_write_config_byte()270 *((uint *)RPX_CSR_ADDR) &= ~BCSR2_QSPACESEL; in qspan_pcibios_write_config_word()281 *((uint *)RPX_CSR_ADDR) |= BCSR2_QSPACESEL; in qspan_pcibios_write_config_word()[all …]
342 io_block_mapping(RPX_CSR_ADDR, RPX_CSR_ADDR, RPX_CSR_SIZE, _PAGE_IO); in m8xx_map_io()
37 #define RPX_CSR_ADDR ((uint)0xfa000000) macro
32 #define RPX_CSR_ADDR ((uint)0xfa400000) macro
36 #define RPX_CSR_ADDR ((uint)0xfa400000) macro
911 *((volatile uint *)RPX_CSR_ADDR) &= ~BCSR0_ETHLPBK; in scc_enet_init()912 *((volatile uint *)RPX_CSR_ADDR) |= in scc_enet_init()
1832 *((uint *) RPX_CSR_ADDR) &= ~BCSR2_FETHLEDMODE; in fec_enet_init()
284 *((uint *)RPX_CSR_ADDR) &= ~(BCSR1_PCVCTL4 | BCSR1_PCVCTL5 in voltage_set()289 *((uint *)RPX_CSR_ADDR) |= reg; in voltage_set()