| /linux-2.4.37.9/drivers/net/sk98lin/ |
| D | skgeinit.c | 82 SK_OUT32(IoC, Q_ADDR(pPrt->PRxQOff, Q_CSR), (PollRxD) ? in SkGePollRxD()
114 SK_OUT32(IoC, Q_ADDR(pPrt->PXsQOff, Q_CSR), DWord); in SkGePollTxD()
118 SK_OUT32(IoC, Q_ADDR(pPrt->PXaQOff, Q_CSR), DWord); in SkGePollTxD()
1009 SK_OUT32(IoC, Q_ADDR(pPrt->PRxQOff, Q_CSR), CSR_CLR_RESET); in SkGeInitBmu()
1017 SK_OUT32(IoC, Q_ADDR(pPrt->PXsQOff, Q_CSR), CSR_CLR_RESET); in SkGeInitBmu()
1022 SK_OUT32(IoC, Q_ADDR(pPrt->PXaQOff, Q_CSR), CSR_CLR_RESET); in SkGeInitBmu()
1052 SK_IN32(IoC, Q_ADDR(QuIoOffs, Q_CSR), &QuCsr); in TestStopBit()
1056 SK_OUT32(IoC, Q_ADDR(QuIoOffs, Q_CSR), CSR_STOP); in TestStopBit()
1058 SK_IN32(IoC, Q_ADDR(QuIoOffs, Q_CSR), &QuCsr); in TestStopBit()
1172 SK_OUT32(IoC, Q_ADDR(pPrt->PXsQOff, Q_CSR), CSR_STOP); in SkGeStopPort()
[all …]
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| D | skge.c | 1988 SK_OUT8(pTxPort->HwAddr, Q_CSR, CSR_START); in XmitFrame()
2168 SK_OUT8(pTxPort->HwAddr, Q_CSR, CSR_START); in XmitFrameSG()
2782 RxQueueAddr[PortIndex]+Q_CSR,
2803 TxQueueAddr[PortIndex][Prio]+Q_CSR,
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| /linux-2.4.37.9/drivers/net/ |
| D | skge.c | 2110 skge_write32(hw, Q_ADDR(q, Q_CSR), CSR_CLR_RESET); in skge_qset()
2188 skge_write8(hw, Q_ADDR(rxqaddr[port], Q_CSR), CSR_START | CSR_IRQ_CL_F); in skge_up()
2224 skge_write8(hw, Q_ADDR(txqaddr[port], Q_CSR), CSR_STOP); in skge_down()
2238 skge_write32(hw, Q_ADDR(txqaddr[port], Q_CSR), CSR_SET_RESET); in skge_down()
2244 skge_write8(hw, Q_ADDR(rxqaddr[port], Q_CSR), CSR_STOP); in skge_down()
2247 skge_write32(hw, Q_ADDR(rxqaddr[port], Q_CSR), CSR_SET_RESET); in skge_down()
2359 skge_write8(hw, Q_ADDR(txqaddr[skge->port], Q_CSR), CSR_START); in skge_xmit_frame()
2432 skge_write8(skge->hw, Q_ADDR(txqaddr[skge->port], Q_CSR), CSR_STOP); in skge_tx_timeout()
2708 skge_write8(hw, Q_ADDR(rxqaddr[skge->port], Q_CSR), CSR_START); in skge_poll()
2877 skge_write8(hw, Q_ADDR(Q_XA1, Q_CSR), CSR_IRQ_CL_F); in skge_intr()
[all …]
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| D | sky2.c | 726 sky2_write32(hw, Q_ADDR(q, Q_CSR), BMU_CLR_RESET); in sky2_qset()
727 sky2_write32(hw, Q_ADDR(q, Q_CSR), BMU_OPER_INIT); in sky2_qset()
728 sky2_write32(hw, Q_ADDR(q, Q_CSR), BMU_FIFO_OP_ON); in sky2_qset()
815 Q_ADDR(rxqaddr[sky2->port], Q_CSR), in rx_set_checksum()
847 sky2_write32(hw, Q_ADDR(rxq, Q_CSR), BMU_RST_SET | BMU_FIFO_RST); in sky2_rx_stop()
1371 sky2_write32(hw, Q_ADDR(txqaddr[port], Q_CSR), BMU_STOP); in sky2_down()
1372 sky2_read32(hw, Q_ADDR(txqaddr[port], Q_CSR)); in sky2_down()
1397 sky2_write32(hw, Q_ADDR(txqaddr[port], Q_CSR), in sky2_down()
1693 sky2_write32(hw, Q_ADDR(txq, Q_CSR), BMU_STOP); in sky2_tx_timeout()
1990 sky2_write32(hw, Q_ADDR(rxqaddr[port], Q_CSR), BMU_CLR_IRQ_PAR); in sky2_hw_error()
[all …]
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| D | sky2.h | 515 Q_CSR = 0x34, /* 32 bit BMU Control/Status Register */ enumerator
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| D | skge.h | 468 Q_CSR = 0x34, /* 32 bit BMU Control/Status Register */ enumerator
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| /linux-2.4.37.9/drivers/net/sk98lin/h/ |
| D | skgehw.h | 562 #define Q_CSR 0x34 /* 32 bit BMU Control/Status Register */ macro
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