Searched refs:PPLL_REF_DIV_MASK (Results 1 – 4 of 4) sorted by relevance
267 #define PPLL_REF_DIV_MASK 0x3FF macro
3334 if ((mode->ppll_ref_div == (INPLL(PPLL_REF_DIV) & PPLL_REF_DIV_MASK)) && in radeon_write_pll_regs()3347 while ((INPLL(PPLL_REF_DIV) & PPLL_REF_DIV_MASK) != in radeon_write_pll_regs()3348 (mode->ppll_ref_div & PPLL_REF_DIV_MASK)) { in radeon_write_pll_regs()3349 OUTPLLP(PPLL_REF_DIV, mode->ppll_ref_div, ~PPLL_REF_DIV_MASK); in radeon_write_pll_regs()
878 #define PPLL_REF_DIV_MASK 0x000003ff macro
2260 aty_ld_pll(PPLL_REF_DIV) & PPLL_REF_DIV_MASK; in aty128_timings()