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Searched refs:PPLL_POST3_DIV_MASK (Results 1 – 4 of 4) sorted by relevance

/linux-2.4.37.9/drivers/video/
Daty128.h269 #define PPLL_POST3_DIV_MASK 0x70000 macro
Dradeonfb.c3336 (PPLL_POST3_DIV_MASK | PPLL_FB3_DIV_MASK)))) in radeon_write_pll_regs()
3357 while ((INPLL(PPLL_DIV_3) & PPLL_POST3_DIV_MASK) != in radeon_write_pll_regs()
3358 (mode->ppll_div_3 & PPLL_POST3_DIV_MASK)) { in radeon_write_pll_regs()
3359 OUTPLLP(PPLL_DIV_3, mode->ppll_div_3, ~PPLL_POST3_DIV_MASK); in radeon_write_pll_regs()
Dradeon.h880 #define PPLL_POST3_DIV_MASK 0x00070000 macro
Daty128fb.c1123 div3 &= ~PPLL_POST3_DIV_MASK; in aty128_set_pll()