Searched refs:ORC_RISCRAM (Results 1 – 3 of 3) sorted by relevance
250 #define ORC_RISCRAM 0xEC /* RISC RAM data port 4 bytes */ macro
208 #define ORC_RISCRAM 0xEC /* RISC RAM data port 4 bytes */ macro
411 ORC_WRLONG(hcsp->HCS_Base + ORC_RISCRAM, dData); /* Write every 4 bytes */ in load_FW()424 if (ORC_RDLONG(hcsp->HCS_Base, ORC_RISCRAM) != dData) { in load_FW()