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Searched refs:MII_CONTROL (Results 1 – 5 of 5) sorted by relevance

/linux-2.4.37.9/drivers/net/
Dau1000_eth.c152 data = mdio_read(dev, phy_addr, MII_CONTROL); in bcm_5201_init()
153 mdio_write(dev, phy_addr, MII_CONTROL, data & ~MII_CNTL_AUTO); in bcm_5201_init()
162 data = mdio_read(dev, phy_addr, MII_CONTROL); in bcm_5201_init()
164 mdio_write(dev, phy_addr, MII_CONTROL, data); in bcm_5201_init()
175 mii_control = mdio_read(dev, phy_addr, MII_CONTROL); in bcm_5201_reset()
176 mdio_write(dev, phy_addr, MII_CONTROL, mii_control | MII_CNTL_RESET); in bcm_5201_reset()
179 mii_control = mdio_read(dev, phy_addr, MII_CONTROL); in bcm_5201_reset()
237 mdio_write(dev, phy_addr, MII_CONTROL, in lsi_80227_init()
262 mii_control = mdio_read(dev, phy_addr, MII_CONTROL); in lsi_80227_reset()
263 mdio_write(dev, phy_addr, MII_CONTROL, mii_control | MII_CNTL_RESET); in lsi_80227_reset()
[all …]
Dsis900.c658 status = mdio_read(net_dev, phy->phy_addr, MII_CONTROL); in sis900_default_phy()
659 mdio_write(net_dev, phy->phy_addr, MII_CONTROL, in sis900_default_phy()
677 status = mdio_read(net_dev, sis_priv->cur_phy, MII_CONTROL); in sis900_default_phy()
680 mdio_write(net_dev, sis_priv->cur_phy, MII_CONTROL, status); in sis900_default_phy()
907 mdio_write( net_dev, phy_addr, MII_CONTROL, MII_CNTL_RESET ); in sis900_reset_phy()
1351 mdio_write(net_dev, phy_addr, MII_CONTROL, in sis900_auto_negotiate()
1400 if(mdio_read(net_dev, phy_addr, MII_CONTROL) & MII_CNTL_FDX) in sis900_read_mode()
1981 status = mdio_read(dev, mii_phy->phy_addr, MII_CONTROL); in sis900_set_config()
1987 MII_CONTROL, status | MII_CNTL_AUTO | MII_CNTL_RST_AUTO); in sis900_set_config()
2002 status = mdio_read(dev, mii_phy->phy_addr, MII_CONTROL); in sis900_set_config()
[all …]
Dtc35815.c276 #define MII_CONTROL 0x0000 macro
1557 tc_phy_write(0, tr, 0, MII_CONTROL); /* ID:0 */ in tc35815_phy_chip_init()
1559 tc_phy_write(MIICNTL_RESET, tr, 0, MII_CONTROL); in tc35815_phy_chip_init()
1561 while (tc_phy_read(tr, 0, MII_CONTROL) & MIICNTL_RESET) in tc35815_phy_chip_init()
1565 MII_CONTROL); in tc35815_phy_chip_init()
1580 tc_phy_write(MIICNTL_AUTO | MIICNTL_RST_AUTO, tr, 0, MII_CONTROL); in tc35815_phy_chip_init()
1614 tc_phy_write(ctl, tr, 0, MII_CONTROL); in tc35815_phy_chip_init()
Dau1000_eth.h48 #define MII_CONTROL 0x0000 macro
Dsis900.h173 MII_CONTROL = 0x0000, MII_STATUS = 0x0001, MII_PHY_ID0 = 0x0002, enumerator