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Searched refs:MII_BMCR (Results 1 – 25 of 28) sorted by relevance

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/linux-2.4.37.9/drivers/net/ibm_emac/
Dibm_ocp_phy.c56 val = __phy_read(phy, phy_id, MII_BMCR); in reset_one_mii_phy()
59 __phy_write(phy, phy_id, MII_BMCR, val); in reset_one_mii_phy()
64 val = __phy_read(phy, phy_id, MII_BMCR); in reset_one_mii_phy()
70 __phy_write(phy, phy_id, MII_BMCR, val & ~BMCR_ISOLATE); in reset_one_mii_phy()
99 ctl = phy_read(phy, MII_BMCR); in genmii_setup_aneg()
101 phy_write(phy, MII_BMCR, ctl); in genmii_setup_aneg()
115 ctl = phy_read(phy, MII_BMCR); in genmii_setup_forced()
119 phy_write(phy, MII_BMCR, ctl | BMCR_RESET); in genmii_setup_forced()
134 phy_write(phy, MII_BMCR, ctl); in genmii_setup_forced()
/linux-2.4.37.9/drivers/net/
Dmii.c66 bmcr = mii->mdio_read(dev, mii->phy_id, MII_BMCR); in mii_ethtool_gset()
141 bmcr = mii->mdio_read(dev, mii->phy_id, MII_BMCR); in mii_ethtool_sset()
143 mii->mdio_write(dev, mii->phy_id, MII_BMCR, bmcr); in mii_ethtool_sset()
150 bmcr = mii->mdio_read(dev, mii->phy_id, MII_BMCR); in mii_ethtool_sset()
160 mii->mdio_write(dev, mii->phy_id, MII_BMCR, tmp); in mii_ethtool_sset()
182 bmcr = mii->mdio_read(mii->dev, mii->phy_id, MII_BMCR); in mii_nway_restart()
186 mii->mdio_write(mii->dev, mii->phy_id, MII_BMCR, bmcr); in mii_nway_restart()
302 case MII_BMCR: { in generic_mii_ioctl()
Dsungem.c1099 ctl = phy_read(gp, MII_BMCR); in gem_begin_auto_negotiation()
1108 phy_write(gp, MII_BMCR, ctl); in gem_begin_auto_negotiation()
1172 val = phy_read(gp, MII_BMCR); in gem_set_link_modes()
1277 phy_write(gp, MII_BMCR, gp->link_fcntl); in gem_mdio_link_not_up()
1281 val = phy_read(gp, MII_BMCR); in gem_mdio_link_not_up()
1290 phy_write(gp, MII_BMCR, val); in gem_mdio_link_not_up()
1298 val = phy_read(gp, MII_BMCR); in gem_mdio_link_not_up()
1301 phy_write(gp, MII_BMCR, val); in gem_mdio_link_not_up()
1364 u16 cntl = phy_read(gp, MII_BMCR); in gem_link_timer()
1382 gp->link_fcntl = phy_read(gp, MII_BMCR); in gem_link_timer()
[all …]
Dioc3-eth.c656 ip->sw_bmcr = mii_read(ip, MII_BMCR); in ioc3_try_next_permutation()
661 mii_write(ip, MII_BMCR, ip->sw_bmcr); in ioc3_try_next_permutation()
669 mii_write(ip, MII_BMCR, ip->sw_bmcr); in ioc3_try_next_permutation()
705 ip->sw_bmcr = mii_read(ip, MII_BMCR); in ioc3_display_forced_link_mode()
743 ip->sw_bmcr = mii_read(ip, MII_BMCR); in ioc3_set_link_modes()
794 ip->sw_bmcr = mii_read(ip, MII_BMCR); in ioc3_timer()
798 mii_write(ip, MII_BMCR, ip->sw_bmcr); in ioc3_timer()
964 ip->sw_bmcr = mii_read(ip, MII_BMCR); in ioc3_start_auto_negotiation()
1014 mii_write(ip, MII_BMCR, ip->sw_bmcr); in ioc3_start_auto_negotiation()
1018 mii_write(ip, MII_BMCR, ip->sw_bmcr); in ioc3_start_auto_negotiation()
[all …]
Dsunhme.c577 hp->sw_bmcr = happy_meal_tcvr_read(hp, tregs, MII_BMCR); in try_next_permutation()
584 happy_meal_tcvr_write(hp, tregs, MII_BMCR, hp->sw_bmcr); in try_next_permutation()
591 happy_meal_tcvr_write(hp, tregs, MII_BMCR, hp->sw_bmcr); in try_next_permutation()
629 hp->sw_bmcr = happy_meal_tcvr_read(hp, tregs, MII_BMCR); in display_forced_link_mode()
661 hp->sw_bmcr = happy_meal_tcvr_read(hp, tregs, MII_BMCR); in set_happy_link_modes()
734 hp->sw_bmcr = happy_meal_tcvr_read(hp, tregs, MII_BMCR); in happy_meal_timer()
738 happy_meal_tcvr_write(hp, tregs, MII_BMCR, hp->sw_bmcr); in happy_meal_timer()
1034 happy_meal_tcvr_write(hp, tregs, MII_BMCR, in happy_meal_tcvr_reset()
1036 result = happy_meal_tcvr_read(hp, tregs, MII_BMCR); in happy_meal_tcvr_reset()
1050 happy_meal_tcvr_write(hp, tregs, MII_BMCR, in happy_meal_tcvr_reset()
[all …]
Ddl2k.c1668 bmcr.image = mii_read (dev, phy_addr, MII_BMCR); in mii_get_media()
1726 mii_write (dev, phy_addr, MII_BMCR, MII_BMCR_RESET); in mii_set_media()
1731 mii_write (dev, phy_addr, MII_BMCR, bmcr.image); in mii_set_media()
1741 bmcr.image = mii_read (dev, phy_addr, MII_BMCR); in mii_set_media()
1743 mii_write (dev, phy_addr, MII_BMCR, bmcr.image); in mii_set_media()
1747 mii_write (dev, phy_addr, MII_BMCR, bmcr.image); in mii_set_media()
1778 mii_write (dev, phy_addr, MII_BMCR, bmcr.image); in mii_set_media()
1866 mii_write (dev, phy_addr, MII_BMCR, MII_BMCR_RESET); in mii_set_media_pcs()
1871 mii_write (dev, phy_addr, MII_BMCR, bmcr.image); in mii_set_media_pcs()
1878 mii_write (dev, phy_addr, MII_BMCR, bmcr.image); in mii_set_media_pcs()
[all …]
Deepro100.c792 mdio_write(dev, eeprom[6] & 0x1f, MII_BMCR, in speedo_found1()
1018 mdio_write(dev, phy_addr, MII_BMCR, mii_ctrl[dev->default_port & 7]); in speedo_open()
1020 mdio_write(dev, phy_addr, MII_BMCR, 0x3300); in speedo_open()
1062 mdio_read(dev, sp->phy[0] & 0x1f, MII_BMCR); in speedo_open()
1359 int mii_bmcr = mdio_read(dev, phy_addr, MII_BMCR); in reset_mii()
1360 mdio_write(dev, phy_addr, MII_BMCR, 0x0400); in reset_mii()
1363 mdio_write(dev, phy_addr, MII_BMCR, 0x8000); in reset_mii()
1365 mdio_write(dev, phy_addr, MII_BMCR, mii_ctrl[dev->default_port & 7]); in reset_mii()
1367 mdio_read(dev, phy_addr, MII_BMCR); in reset_mii()
1368 mdio_write(dev, phy_addr, MII_BMCR, mii_bmcr); in reset_mii()
Dstarfire.c982 mdio_write(dev, phy, MII_BMCR, BMCR_RESET); in starfire_init_one()
986 if ((mdio_read(dev, phy, MII_BMCR) & BMCR_RESET) == 0) in starfire_init_one()
1222 mdio_write(dev, np->phys[0], MII_BMCR, BMCR_RESET); in check_duplex()
1224 while (--silly_count && mdio_read(dev, np->phys[0], MII_BMCR) & BMCR_RESET) in check_duplex()
1231 reg0 = mdio_read(dev, np->phys[0], MII_BMCR); in check_duplex()
1246 mdio_write(dev, np->phys[0], MII_BMCR, reg0); in check_duplex()
1685 mdio_read(dev, np->phys[0], MII_BMCR); in netdev_media_change()
1688 reg0 = mdio_read(dev, np->phys[0], MII_BMCR); in netdev_media_change()
Db44.c339 err = b44_writephy(bp, MII_BMCR, BMCR_RESET); in b44_phy_reset()
343 err = b44_readphy(bp, MII_BMCR, &val); in b44_phy_reset()
437 if ((err = b44_writephy(bp, MII_BMCR, (BMCR_ANENABLE | in b44_setup_phy()
443 if ((err = b44_readphy(bp, MII_BMCR, &bmcr)) != 0) in b44_setup_phy()
450 if ((err = b44_writephy(bp, MII_BMCR, bmcr)) != 0) in b44_setup_phy()
1515 b44_readphy(bp, MII_BMCR, &bmcr); in b44_ethtool_ioctl()
1516 b44_readphy(bp, MII_BMCR, &bmcr); in b44_ethtool_ioctl()
1519 b44_writephy(bp, MII_BMCR, in b44_ethtool_ioctl()
Dforcedeth.c691 miicontrol = mii_rw(dev, np->phyaddr, MII_BMCR, MII_READ); in phy_reset()
693 if (mii_rw(dev, np->phyaddr, MII_BMCR, miicontrol)) { in phy_reset()
703 miicontrol = mii_rw(dev, np->phyaddr, MII_BMCR, MII_READ); in phy_reset()
779 mii_control = mii_rw(dev, np->phyaddr, MII_BMCR, MII_READ); in phy_init()
781 if (mii_rw(dev, np->phyaddr, MII_BMCR, mii_control)) { in phy_init()
2151 bmcr = mii_rw(dev, np->phyaddr, MII_BMCR, MII_READ); in nv_set_settings()
2153 mii_rw(dev, np->phyaddr, MII_BMCR, bmcr); in nv_set_settings()
2179 bmcr = mii_rw(dev, np->phyaddr, MII_BMCR, MII_READ); in nv_set_settings()
2185 mii_rw(dev, np->phyaddr, MII_BMCR, bmcr); in nv_set_settings()
2229 bmcr = mii_rw(dev, np->phyaddr, MII_BMCR, MII_READ); in nv_nway_reset()
[all …]
Dnatsemi.c1842 if (mdio_read(dev, 1, MII_BMCR) & BMCR_ANENABLE in netdev_error()
2075 tmp = mdio_read(dev, 1, MII_BMCR); in netdev_ethtool_ioctl()
2078 mdio_write(dev, 1, MII_BMCR, tmp); in netdev_ethtool_ioctl()
2286 tmp = mdio_read(dev, 1, MII_BMCR); in netdev_get_ecmd()
2331 tmp = mdio_read(dev, 1, MII_BMCR); in netdev_set_ecmd()
2346 mdio_write(dev, 1, MII_BMCR, tmp); in netdev_set_ecmd()
Dsundance.c694 mdio_write (dev, np->phys[0], MII_BMCR, BMCR_RESET); in sundance_probe1()
699 mdio_write (dev, np->phys[0], MII_BMCR, BMCR_ANENABLE|BMCR_ANRESTART); in sundance_probe1()
705 mdio_write (dev, np->phys[0], MII_BMCR, mii_ctl); in sundance_probe1()
1457 mii_ctl = mdio_read (dev, np->phys[0], MII_BMCR); in netdev_error()
Ddl2k.h281 MII_BMCR = 0, enumerator
Dtg3.c643 err = tg3_writephy(tp, MII_BMCR, phy_control); in tg3_bmcr_reset()
649 err = tg3_readphy(tp, MII_BMCR, &phy_control); in tg3_bmcr_reset()
792 tg3_writephy(tp, MII_BMCR, in tg3_phy_reset_5703_4_5()
1431 if (!tg3_readphy(tp, MII_BMCR, &orig_bmcr) && in tg3_phy_copper_begin()
1433 tg3_writephy(tp, MII_BMCR, BMCR_LOOPBACK); in tg3_phy_copper_begin()
1446 tg3_writephy(tp, MII_BMCR, bmcr); in tg3_phy_copper_begin()
1450 tg3_writephy(tp, MII_BMCR, in tg3_phy_copper_begin()
1646 tg3_readphy(tp, MII_BMCR, &bmcr); in tg3_setup_copper_phy()
1647 if (tg3_readphy(tp, MII_BMCR, &bmcr)) in tg3_setup_copper_phy()
2157 tg3_writephy(tp, MII_BMCR, BMCR_RESET); in tg3_init_bcm8002()
[all …]
Dvia-rhine.c871 mdio_write(dev, np->phys[0], MII_BMCR, in via_rhine_init_one()
1119 case MII_BMCR: /* Is user forcing speed/duplex? */ in mdio_write()
1647 mdio_write(dev, np->phys[0], MII_BMCR, 0x3300); in via_rhine_error()
Dbig_sur_ge.c1078 err = big_sur_ge_phy_read(lp->emac, lp->mii_addr, MII_BMCR, &reg_data); in big_sur_ge_get_phy_status()
1567 if (big_sur_ge_phy_read(lp->emac, maddr, MII_BMCR, &reg_data) == 0) { in big_sur_ge_probe()
Depic100.c720 mdio_write(dev, ep->phys[0], MII_BMCR, media2miictl[dev->if_port&15]); in epic_open()
733 mdio_write(dev, ep->phys[0], MII_BMCR, BMCR_ANENABLE|BMCR_ANRESTART); in epic_open()
Dsb1250-mac.c444 #define MII_BMCR 0x00 /* Basic mode control register (rw) */ macro
2501 bmcr = sbmac_mii_read(s,s->sbm_phys[0],MII_BMCR); in sbmac_mii_poll()
Damd8111e.c238 bmcr = amd8111e_mdio_read(dev, PHY_ID, MII_BMCR); in amd8111e_set_ext_phy()
240 amd8111e_mdio_write(dev, PHY_ID, MII_BMCR, bmcr); in amd8111e_set_ext_phy()
/linux-2.4.37.9/drivers/net/e100/
De100_phy.c141 e100_mdi_read(bdp, MII_BMCR, phy_address, &ctrl_reg); in e100_phy_valid()
217 e100_mdi_write(bdp, MII_BMCR, phy_address, in e100_phy_isolate()
221 e100_mdi_read(bdp, MII_BMCR, bdp->phy_addr, &ctrl_reg); in e100_phy_isolate()
223 e100_mdi_write(bdp, MII_BMCR, bdp->phy_addr, ctrl_reg); in e100_phy_isolate()
360 e100_mdi_write(bdp, MII_BMCR, bdp->phy_addr, in e100_phy_fix_squelch()
633 e100_mdi_read(bdp, MII_BMCR, bdp->phy_addr, &control); in e100_force_speed_duplex()
667 e100_mdi_write(bdp, MII_BMCR, bdp->phy_addr, control); in e100_force_speed_duplex()
687 e100_mdi_read(bdp, MII_BMCR, bdp->phy_addr, &control); in e100_force_speed_duplex_to_phy()
714 e100_mdi_write(bdp, MII_BMCR, bdp->phy_addr, control); in e100_force_speed_duplex_to_phy()
842 e100_mdi_write(bdp, MII_BMCR, bdp->phy_addr, in e100_auto_neg()
[all …]
De100_test.c453 e100_mdi_write(bdp, MII_BMCR, bdp->phy_addr, in e100_cable_diag()
/linux-2.4.37.9/drivers/net/pcmcia/
Dxircom_tulip_cb.c468 int mii_reg0 = mdio_read(dev, phy, MII_BMCR); in find_mii_transceivers()
982 mdio_read(dev, tp->phys[0], MII_BMCR); in xircom_media_change()
985 reg0 = mdio_read(dev, tp->phys[0], MII_BMCR); in xircom_media_change()
1038 mdio_write(dev, tp->phys[0], MII_BMCR, BMCR_RESET); in check_duplex()
1040 while (mdio_read(dev, tp->phys[0], MII_BMCR) & BMCR_RESET); in check_duplex()
1042 reg0 = mdio_read(dev, tp->phys[0], MII_BMCR); in check_duplex()
1059 mdio_write(dev, tp->phys[0], MII_BMCR, reg0); in check_duplex()
/linux-2.4.37.9/drivers/net/tulip/
Dmedia.c481 mii_reg0 = tulip_mdio_read (dev, phy, MII_BMCR); in tulip_find_mii()
552 tulip_mdio_write (dev, phy, MII_BMCR, new_bmcr); in tulip_find_mii()
555 tulip_mdio_write (dev, phy, MII_BMCR, new_bmcr); in tulip_find_mii()
/linux-2.4.37.9/include/linux/
Dmii.h15 #define MII_BMCR 0x00 /* Basic mode control register */ macro
/linux-2.4.37.9/drivers/usb/
Dusbnet.c659 dev->mii.phy_id, MII_BMCR, 2, buf16)) < 0) { in ax8817x_bind()
675 dev->mii.phy_id, MII_BMCR, in ax8817x_bind()

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