Searched refs:LE_C0_ERR (Results 1 – 6 of 6) sorted by relevance
60 #define LE_C0_ERR 0x8000 /* Error */ macro
207 for (i = 0; (i < 100) && !(READRDP() & (LE_C0_ERR | LE_C0_IDON)); i++) in init_restart_lance()209 if ((i == 100) || (READRDP() & LE_C0_ERR)) { in init_restart_lance()426 if ((csr0 & LE_C0_ERR)) { in lance_interrupt()428 WRITERDP(LE_C0_BABL|LE_C0_ERR|LE_C0_MISS|LE_C0_INEA); in lance_interrupt()
262 for (i = 0; (i < 100) && !(ll->rdp & (LE_C0_ERR | LE_C0_IDON)); i++) in init_restart_lance()264 if ((i == 100) || (ll->rdp & LE_C0_ERR)) { in init_restart_lance()459 if ((csr0 & LE_C0_ERR)) { in lance_interrupt()461 ll->rdp = LE_C0_BABL|LE_C0_ERR|LE_C0_MISS|LE_C0_INEA; in lance_interrupt()
146 #define LE_C0_ERR 0x8000 /* Error = BABL | CERR | MISS | MERR */ macro
94 #define LE_C0_ERR 0x8000 /* Error: set if BAB, SQE, MISS or ME is set */ macro516 if ((i == 100) || (ll->rdp & LE_C0_ERR)) { in init_restart_lance()520 if ((ll->rdp & LE_C0_ERR)) { in init_restart_lance()721 if ((csr0 & LE_C0_ERR)) { in lance_interrupt()723 writereg(&ll->rdp, LE_C0_BABL | LE_C0_ERR | LE_C0_MISS | in lance_interrupt()
129 #define LE_C0_ERR 0x8000 /* Error: set if BAB, SQE, MISS or ME is set */ macro480 if (regval & (LE_C0_ERR | LE_C0_IDON)) in init_restart_lance()484 if (i == 100 || (regval & LE_C0_ERR)) { in init_restart_lance()834 if ((csr0 & LE_C0_ERR) != 0) { in lance_interrupt()836 sbus_writew((LE_C0_BABL | LE_C0_ERR | LE_C0_MISS | in lance_interrupt()