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Searched refs:IT_SCR_SCDR_RESET_MODE_ASYNC (Results 1 – 2 of 2) sorted by relevance

/linux-2.4.37.9/arch/mips/ite-boards/generic/
Dit8172_setup.c240 outb(IT_SCR_SCDR_RESET_MODE_ASYNC << IT_SCR_SCDR_RESET_MODE_BIT, in it8172_setup()
259 outb(IT_SCR_SCDR_RESET_MODE_ASYNC << IT_SCR_SCDR_RESET_MODE_BIT, in it8172_setup()
/linux-2.4.37.9/include/asm-mips/it8172/
Dit8172.h261 #define IT_SCR_SCDR_RESET_MODE_ASYNC 0 macro