/linux-2.4.37.9/drivers/isdn/hisax/ |
D | telespci.c | 250 writehscx(cs->hw.teles0.membase, 0, HSCX_MASK, 0xFF); in telespci_interrupt() 251 writehscx(cs->hw.teles0.membase, 1, HSCX_MASK, 0xFF); in telespci_interrupt() 254 writehscx(cs->hw.teles0.membase, 0, HSCX_MASK, 0x0); in telespci_interrupt() 255 writehscx(cs->hw.teles0.membase, 1, HSCX_MASK, 0x0); in telespci_interrupt()
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D | avm_a1p.c | 208 WriteHSCX(cs, 0, HSCX_MASK, 0xff); in avm_a1p_interrupt() 209 WriteHSCX(cs, 1, HSCX_MASK, 0xff); in avm_a1p_interrupt() 212 WriteHSCX(cs, 0, HSCX_MASK, 0x00); in avm_a1p_interrupt() 213 WriteHSCX(cs, 1, HSCX_MASK, 0x00); in avm_a1p_interrupt()
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D | mic.c | 166 writereg(cs->hw.mic.adr, cs->hw.mic.hscx, HSCX_MASK, 0xFF); in mic_interrupt() 167 writereg(cs->hw.mic.adr, cs->hw.mic.hscx, HSCX_MASK + 0x40, 0xFF); in mic_interrupt() 170 writereg(cs->hw.mic.adr, cs->hw.mic.hscx, HSCX_MASK, 0x0); in mic_interrupt() 171 writereg(cs->hw.mic.adr, cs->hw.mic.hscx, HSCX_MASK + 0x40, 0x0); in mic_interrupt()
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D | s0box.c | 188 writereg(cs->hw.teles3.cfg_reg, cs->hw.teles3.hscx[0], HSCX_MASK, 0xFF); in s0box_interrupt() 189 writereg(cs->hw.teles3.cfg_reg, cs->hw.teles3.hscx[1], HSCX_MASK, 0xFF); in s0box_interrupt() 192 writereg(cs->hw.teles3.cfg_reg, cs->hw.teles3.hscx[0], HSCX_MASK, 0x0); in s0box_interrupt() 193 writereg(cs->hw.teles3.cfg_reg, cs->hw.teles3.hscx[1], HSCX_MASK, 0x0); in s0box_interrupt()
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D | hscx.c | 246 cs->BC_Write_Reg(cs, 0, HSCX_MASK, 0xFF); in clear_pending_hscx_ints() 247 cs->BC_Write_Reg(cs, 1, HSCX_MASK, 0xFF); in clear_pending_hscx_ints() 279 cs->BC_Write_Reg(cs, 0, HSCX_MASK, 0); in inithscxisac() 280 cs->BC_Write_Reg(cs, 1, HSCX_MASK, 0); in inithscxisac()
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D | saphir.c | 167 writereg(cs->hw.saphir.ale, cs->hw.saphir.hscx, HSCX_MASK, 0xFF); in saphir_interrupt() 168 writereg(cs->hw.saphir.ale, cs->hw.saphir.hscx, HSCX_MASK + 0x40, 0xFF); in saphir_interrupt() 171 writereg(cs->hw.saphir.ale, cs->hw.saphir.hscx, HSCX_MASK, 0); in saphir_interrupt() 172 writereg(cs->hw.saphir.ale, cs->hw.saphir.hscx, HSCX_MASK + 0x40, 0); in saphir_interrupt()
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D | teles0.c | 179 writehscx(cs->hw.teles0.membase, 0, HSCX_MASK, 0xFF); in teles0_interrupt() 180 writehscx(cs->hw.teles0.membase, 1, HSCX_MASK, 0xFF); in teles0_interrupt() 183 writehscx(cs->hw.teles0.membase, 0, HSCX_MASK, 0x0); in teles0_interrupt() 184 writehscx(cs->hw.teles0.membase, 1, HSCX_MASK, 0x0); in teles0_interrupt()
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D | ix1_micro.c | 170 writereg(cs->hw.ix1.hscx_ale, cs->hw.ix1.hscx, HSCX_MASK, 0xFF); in ix1micro_interrupt() 171 writereg(cs->hw.ix1.hscx_ale, cs->hw.ix1.hscx, HSCX_MASK + 0x40, 0xFF); in ix1micro_interrupt() 174 writereg(cs->hw.ix1.hscx_ale, cs->hw.ix1.hscx, HSCX_MASK, 0); in ix1micro_interrupt() 175 writereg(cs->hw.ix1.hscx_ale, cs->hw.ix1.hscx, HSCX_MASK + 0x40, 0); in ix1micro_interrupt()
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D | avm_a1.c | 131 writereg(cs->hw.avm.hscx[0], HSCX_MASK, 0xFF); in avm_a1_interrupt() 132 writereg(cs->hw.avm.hscx[1], HSCX_MASK, 0xFF); in avm_a1_interrupt() 135 writereg(cs->hw.avm.hscx[0], HSCX_MASK, 0x0); in avm_a1_interrupt() 136 writereg(cs->hw.avm.hscx[1], HSCX_MASK, 0x0); in avm_a1_interrupt()
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D | hscx.h | 35 #define HSCX_MASK 0x20 macro
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D | niccy.c | 184 writereg(cs->hw.niccy.hscx_ale, cs->hw.niccy.hscx, HSCX_MASK, 0xFF); in niccy_interrupt() 185 writereg(cs->hw.niccy.hscx_ale, cs->hw.niccy.hscx, HSCX_MASK + 0x40, 0xFF); in niccy_interrupt() 188 writereg(cs->hw.niccy.hscx_ale, cs->hw.niccy.hscx, HSCX_MASK, 0); in niccy_interrupt() 189 writereg(cs->hw.niccy.hscx_ale, cs->hw.niccy.hscx, HSCX_MASK + 0x40, 0); in niccy_interrupt()
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D | asuscom.c | 201 writereg(cs->hw.asus.adr, cs->hw.asus.hscx, HSCX_MASK, 0xFF); in asuscom_interrupt() 202 writereg(cs->hw.asus.adr, cs->hw.asus.hscx, HSCX_MASK + 0x40, 0xFF); in asuscom_interrupt() 205 writereg(cs->hw.asus.adr, cs->hw.asus.hscx, HSCX_MASK, 0x0); in asuscom_interrupt() 206 writereg(cs->hw.asus.adr, cs->hw.asus.hscx, HSCX_MASK + 0x40, 0x0); in asuscom_interrupt()
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D | teles3.c | 139 writereg(cs->hw.teles3.hscx[0], HSCX_MASK, 0xFF); in teles3_interrupt() 140 writereg(cs->hw.teles3.hscx[1], HSCX_MASK, 0xFF); in teles3_interrupt() 143 writereg(cs->hw.teles3.hscx[0], HSCX_MASK, 0x0); in teles3_interrupt() 144 writereg(cs->hw.teles3.hscx[1], HSCX_MASK, 0x0); in teles3_interrupt()
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D | gazel.c | 278 WriteHSCX(cs, 0, HSCX_MASK, 0xFF); in gazel_interrupt() 279 WriteHSCX(cs, 1, HSCX_MASK, 0xFF); in gazel_interrupt() 282 WriteHSCX(cs, 0, HSCX_MASK, 0x0); in gazel_interrupt() 283 WriteHSCX(cs, 1, HSCX_MASK, 0x0); in gazel_interrupt()
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D | sedlbauer.c | 312 writereg(cs->hw.sedl.adr, cs->hw.sedl.hscx, HSCX_MASK, 0xFF); in sedlbauer_interrupt() 313 writereg(cs->hw.sedl.adr, cs->hw.sedl.hscx, HSCX_MASK + 0x40, 0xFF); in sedlbauer_interrupt() 316 writereg(cs->hw.sedl.adr, cs->hw.sedl.hscx, HSCX_MASK, 0x0); in sedlbauer_interrupt() 317 writereg(cs->hw.sedl.adr, cs->hw.sedl.hscx, HSCX_MASK + 0x40, 0x0); in sedlbauer_interrupt()
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D | diva.c | 327 writereg(cs->hw.diva.hscx_adr, cs->hw.diva.hscx, HSCX_MASK, 0xFF); in diva_interrupt() 328 writereg(cs->hw.diva.hscx_adr, cs->hw.diva.hscx, HSCX_MASK + 0x40, 0xFF); in diva_interrupt() 331 writereg(cs->hw.diva.hscx_adr, cs->hw.diva.hscx, HSCX_MASK, 0x0); in diva_interrupt() 332 writereg(cs->hw.diva.hscx_adr, cs->hw.diva.hscx, HSCX_MASK + 0x40, 0x0); in diva_interrupt()
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D | elsa.c | 360 writereg(cs->hw.elsa.ale, cs->hw.elsa.hscx, HSCX_MASK, 0xFF); in elsa_interrupt() 361 writereg(cs->hw.elsa.ale, cs->hw.elsa.hscx, HSCX_MASK + 0x40, 0xFF); in elsa_interrupt() 382 writereg(cs->hw.elsa.ale, cs->hw.elsa.hscx, HSCX_MASK, 0x0); in elsa_interrupt() 383 writereg(cs->hw.elsa.ale, cs->hw.elsa.hscx, HSCX_MASK + 0x40, 0x0); in elsa_interrupt()
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/linux-2.4.37.9/drivers/net/wan/ |
D | hscx.h | 4 #define HSCX_MASK 0x00 macro
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D | comx-hw-mixcom.c | 245 wr_hscx(dev, HSCX_MASK, HSCX_RSC | HSCX_TIN ); in mixcom_on()
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