1 /* 2 * include/asm-ppc64/cputable.h 3 * 4 * Copyright (C) 2001 Ben. Herrenschmidt (benh@kernel.crashing.org) 5 * 6 * Modifications for ppc64: 7 * Copyright (C) 2003 Dave Engebretsen <engebret@us.ibm.com> 8 * 9 * This program is free software; you can redistribute it and/or 10 * modify it under the terms of the GNU General Public License 11 * as published by the Free Software Foundation; either version 12 * 2 of the License, or (at your option) any later version. 13 */ 14 15 #ifndef __ASM_PPC_CPUTABLE_H 16 #define __ASM_PPC_CPUTABLE_H 17 18 /* Exposed to userland CPU features - Must match ppc32 definitions */ 19 #define PPC_FEATURE_32 0x80000000 20 #define PPC_FEATURE_64 0x40000000 21 #define PPC_FEATURE_601_INSTR 0x20000000 22 #define PPC_FEATURE_HAS_ALTIVEC 0x10000000 23 #define PPC_FEATURE_HAS_FPU 0x08000000 24 #define PPC_FEATURE_HAS_MMU 0x04000000 25 #define PPC_FEATURE_HAS_4xxMAC 0x02000000 26 #define PPC_FEATURE_UNIFIED_CACHE 0x01000000 27 28 #ifdef __KERNEL__ 29 30 #ifndef __ASSEMBLY__ 31 32 /* This structure can grow, it's real size is used by head.S code 33 * via the mkdefs mechanism. 34 */ 35 struct cpu_spec; 36 37 typedef void (*cpu_setup_t)(unsigned long offset, struct cpu_spec* spec); 38 39 struct cpu_spec { 40 /* CPU is matched via (PVR & pvr_mask) == pvr_value */ 41 unsigned int pvr_mask; 42 unsigned int pvr_value; 43 44 char *cpu_name; 45 unsigned long cpu_features; /* Kernel features */ 46 unsigned int cpu_user_features; /* Userland features */ 47 48 /* cache line sizes */ 49 unsigned int icache_bsize; 50 unsigned int dcache_bsize; 51 52 /* this is called to initialize various CPU bits like L1 cache, 53 * BHT, SPD, etc... from head.S before branching to identify_machine 54 */ 55 cpu_setup_t cpu_setup; 56 57 /* This is used to identify firmware features which are available 58 * to the kernel. 59 */ 60 unsigned long firmware_features; 61 }; 62 63 extern struct cpu_spec cpu_specs[]; 64 extern struct cpu_spec *cur_cpu_spec; 65 66 67 /* firmware feature bitmask values */ 68 #define FIRMWARE_MAX_FEATURES 63 69 70 #define FW_FEATURE_PFT (1UL<<0) 71 #define FW_FEATURE_TCE (1UL<<1) 72 #define FW_FEATURE_SPRG0 (1UL<<2) 73 #define FW_FEATURE_DABR (1UL<<3) 74 #define FW_FEATURE_COPY (1UL<<4) 75 #define FW_FEATURE_ASR (1UL<<5) 76 #define FW_FEATURE_DEBUG (1UL<<6) 77 #define FW_FEATURE_TERM (1UL<<7) 78 #define FW_FEATURE_PERF (1UL<<8) 79 #define FW_FEATURE_DUMP (1UL<<9) 80 #define FW_FEATURE_INTERRUPT (1UL<<10) 81 #define FW_FEATURE_MIGRATE (1UL<<11) 82 #define FW_FEATURE_PERFMON (1UL<<12) 83 #define FW_FEATURE_CRQ (1UL<<13) 84 #define FW_FEATURE_VIO (1UL<<14) 85 #define FW_FEATURE_RDMA (1UL<<15) 86 #define FW_FEATURE_LLAN (1UL<<16) 87 #define FW_FEATURE_BULK (1UL<<17) 88 #define FW_FEATURE_XDABR (1UL<<18) 89 #define FW_FEATURE_MULTITCE (1UL<<19) 90 #define FW_FEATURE_SPLPAR (1UL<<20) 91 92 typedef struct { 93 unsigned long val; 94 char * name; 95 } firmware_feature_t; 96 97 extern firmware_feature_t firmware_features_table[]; 98 99 #endif /* __ASSEMBLY__ */ 100 101 /* CPU kernel features */ 102 103 /* Retain the 32b definitions for the time being - use bottom half of word */ 104 #define CPU_FTR_SPLIT_ID_CACHE 0x0000000000000001 105 #define CPU_FTR_L2CR 0x0000000000000002 106 #define CPU_FTR_SPEC7450 0x0000000000000004 107 #define CPU_FTR_ALTIVEC 0x0000000000000008 108 #define CPU_FTR_TAU 0x0000000000000010 109 #define CPU_FTR_CAN_DOZE 0x0000000000000020 110 #define CPU_FTR_USE_TB 0x0000000000000040 111 #define CPU_FTR_604_PERF_MON 0x0000000000000080 112 #define CPU_FTR_601 0x0000000000000100 113 #define CPU_FTR_HPTE_TABLE 0x0000000000000200 114 #define CPU_FTR_CAN_NAP 0x0000000000000400 115 #define CPU_FTR_L3CR 0x0000000000000800 116 #define CPU_FTR_L3_DISABLE_NAP 0x0000000000001000 117 #define CPU_FTR_NAP_DISABLE_L2_PR 0x0000000000002000 118 #define CPU_FTR_DUAL_PLL_750FX 0x0000000000004000 119 120 /* Add the 64b processor unique features in the top half of the word */ 121 #define CPU_FTR_SLB 0x0000000100000000 122 #define CPU_FTR_16M_PAGE 0x0000000200000000 123 #define CPU_FTR_TLBIEL 0x0000000400000000 124 #define CPU_FTR_NOEXECUTE 0x0000000800000000 125 #define CPU_FTR_NODSISRALIGN 0x0000001000000000 126 #define CPU_FTR_DABR 0x0000002000000000 127 #define CPU_FTR_IABR 0x0000004000000000 128 129 /* Platform firmware features */ 130 #define FW_FTR_ 0x0000000000000001 131 132 #ifndef __ASSEMBLY__ 133 #define COMMON_USER_PPC64 (PPC_FEATURE_32 | PPC_FEATURE_64 | \ 134 PPC_FEATURE_HAS_FPU | PPC_FEATURE_HAS_MMU) 135 136 #define CPU_FTR_PPCAS_ARCH_V2 (CPU_FTR_SLB | CPU_FTR_16M_PAGE | \ 137 CPU_FTR_TLBIEL | CPU_FTR_NOEXECUTE | \ 138 CPU_FTR_NODSISRALIGN) 139 140 #define COMMON_PPC64_FW (0) 141 #endif 142 143 #ifdef __ASSEMBLY__ 144 145 #define BEGIN_FTR_SECTION 98: 146 147 #define END_FTR_SECTION(msk, val) \ 148 99: \ 149 .section __ftr_fixup,"a"; \ 150 .align 3; \ 151 .llong msk; \ 152 .llong val; \ 153 .llong 98b; \ 154 .llong 99b; \ 155 .previous 156 157 #else 158 159 #define BEGIN_FTR_SECTION "98:\n" 160 #define END_FTR_SECTION(msk, val) \ 161 "99:\n" \ 162 " .section __ftr_fixup,\"a\";\n" \ 163 " .align 3;\n" \ 164 " .llong "#msk";\n" \ 165 " .llong "#val";\n" \ 166 " .llong 98b;\n" \ 167 " .llong 99b;\n" \ 168 " .previous\n" 169 170 #endif /* __ASSEMBLY__ */ 171 172 173 #define END_FTR_SECTION_IFSET(msk) END_FTR_SECTION((msk), (msk)) 174 #define END_FTR_SECTION_IFCLR(msk) END_FTR_SECTION((msk), 0) 175 176 #endif /* __ASM_PPC_CPUTABLE_H */ 177 #endif /* __KERNEL__ */ 178 179