Searched refs:ENISR_RESET (Results 1 – 10 of 10) sorted by relevance
147 while ((z_readb(ioaddr + NE_EN0_ISR) & ENISR_RESET) == 0) in zorro8390_init()269 while ((z_readb(NE_BASE+NE_EN0_ISR) & ENISR_RESET) == 0) in zorro8390_reset_8390()274 z_writeb(ENISR_RESET, NE_BASE + NE_EN0_ISR); /* Ack intr. */ in zorro8390_reset_8390()
185 while ((inb(ioaddr + NE_EN0_ISR) & ENISR_RESET) == 0) in apne_probe1()355 while ((inb(NE_BASE+NE_EN0_ISR) & ENISR_RESET) == 0) in apne_reset_8390()360 outb(ENISR_RESET, NE_BASE + NE_EN0_ISR); /* Ack intr. */ in apne_reset_8390()
375 while ((inb_p(base_addr + EN0_ISR) & ENISR_RESET) == 0) in ne2_probe1()526 while ((inb_p(NE_BASE+EN0_ISR) & ENISR_RESET) == 0) in ne_reset_8390()532 outb_p(ENISR_RESET, NE_BASE + EN0_ISR); /* Ack intr. */ in ne_reset_8390()
283 while ((inb(ioaddr + EN0_ISR) & ENISR_RESET) == 0) in ne2k_pci_init_one()427 while ((inb(NE_BASE+EN0_ISR) & ENISR_RESET) == 0) in ne2k_pci_reset_8390()432 outb(ENISR_RESET, NE_BASE + EN0_ISR); /* Ack intr. */ in ne2k_pci_reset_8390()
298 while ((inb_p(ioaddr + EN0_ISR) & ENISR_RESET) == 0) in ne_probe1()523 while ((inb_p(NE_BASE+EN0_ISR) & ENISR_RESET) == 0) in ne_reset_8390()528 outb_p(ENISR_RESET, NE_BASE + EN0_ISR); /* Ack intr. */ in ne_reset_8390()
176 #define ENISR_RESET 0x80 /* Reset completed */ macro
309 if ((inb_p(ioaddr+NIC_OFFSET+EN0_ISR) & ENISR_RESET) == 0) in hpp_reset_8390()
237 if ((inb_p(hp_base+NIC_OFFSET+EN0_ISR) & ENISR_RESET) == 0) in hp_reset_8390()
748 if ((inb_p(nic_base+EN0_ISR) & ENISR_RESET) != 0) in axnet_reset_8390()752 outb_p(ENISR_RESET, nic_base + EN0_ISR); /* Ack intr. */ in axnet_reset_8390()
1187 if ((inb_p(nic_base+EN0_ISR) & ENISR_RESET) != 0) in pcnet_reset_8390()1191 outb_p(ENISR_RESET, nic_base + EN0_ISR); /* Ack intr. */ in pcnet_reset_8390()