1 /* 2 * Copyright (C) Eicon Technology Corporation, 2000. 3 * 4 * Eicon File Revision : 1.0 5 * 6 * This software may be used and distributed according to the terms 7 * of the GNU General Public License, incorporated herein by reference. 8 * 9 */ 10 11 #ifndef DSP_DEFS_H_ 12 #define DSP_DEFS_H_ 13 14 #ifndef DSPDIDS_H_ 15 #include "dspdids.h" 16 #endif 17 18 #ifdef __cplusplus 19 extern "C" { 20 #endif 21 /*---------------------------------------------------------------------------*/ 22 23 #ifndef NULL 24 #define NULL 0 25 #endif 26 #ifndef TRUE 27 #define TRUE (0 == 0) 28 #endif 29 #ifndef FALSE 30 #define FALSE (0 != 0) 31 #endif 32 33 34 /*---------------------------------------------------------------------------*/ 35 36 #define DSP_MEMORY_TYPE_EXTERNAL_DM 0 37 #define DSP_MEMORY_TYPE_EXTERNAL_PM 1 38 #define DSP_MEMORY_TYPE_INTERNAL_DM 2 39 #define DSP_MEMORY_TYPE_INTERNAL_PM 3 40 41 #define DSP_DOWNLOAD_FLAG_BOOTABLE 0x0001 42 #define DSP_DOWNLOAD_FLAG_2181 0x0002 43 #define DSP_DOWNLOAD_FLAG_TIMECRITICAL 0x0004 44 #define DSP_DOWNLOAD_FLAG_COMPAND 0x0008 45 46 #define DSP_MEMORY_BLOCK_COUNT 16 47 48 #define DSP_SEGMENT_PM_FLAG 0x0001 49 #define DSP_SEGMENT_SHARED_FLAG 0x0002 50 51 #define DSP_SEGMENT_EXTERNAL_DM DSP_MEMORY_TYPE_EXTERNAL_DM 52 #define DSP_SEGMENT_EXTERNAL_PM DSP_MEMORY_TYPE_EXTERNAL_PM 53 #define DSP_SEGMENT_INTERNAL_DM DSP_MEMORY_TYPE_INTERNAL_DM 54 #define DSP_SEGMENT_INTERNAL_PM DSP_MEMORY_TYPE_INTERNAL_PM 55 #define DSP_SEGMENT_FIRST_RELOCATABLE 4 56 57 #define DSP_DATA_BLOCK_PM_FLAG 0x0001 58 #define DSP_DATA_BLOCK_DWORD_FLAG 0x0002 59 #define DSP_DATA_BLOCK_RESOLVE_FLAG 0x0004 60 61 #define DSP_RELOC_NONE 0x00 62 #define DSP_RELOC_SEGMENT_MASK 0x3f 63 #define DSP_RELOC_TYPE_MASK 0xc0 64 #define DSP_RELOC_TYPE_0 0x00 /* relocation of address in DM word / high part of PM word */ 65 #define DSP_RELOC_TYPE_1 0x40 /* relocation of address in low part of PM data word */ 66 #define DSP_RELOC_TYPE_2 0x80 /* relocation of address in standard command */ 67 #define DSP_RELOC_TYPE_3 0xc0 /* relocation of address in call/jump on flag in */ 68 69 #define DSP_COMBIFILE_FORMAT_IDENTIFICATION_SIZE 48 70 #define DSP_COMBIFILE_FORMAT_VERSION_BCD 0x0100 71 72 #define DSP_FILE_FORMAT_IDENTIFICATION_SIZE 48 73 #define DSP_FILE_FORMAT_VERSION_BCD 0x0100 74 75 76 typedef struct tag_dsp_combifile_header 77 { 78 char format_identification[DSP_COMBIFILE_FORMAT_IDENTIFICATION_SIZE]; 79 word format_version_bcd; 80 word header_size; 81 word combifile_description_size; 82 word directory_entries; 83 word directory_size; 84 word download_count; 85 word usage_mask_size; 86 } t_dsp_combifile_header; 87 88 typedef struct tag_dsp_combifile_directory_entry 89 { 90 word card_type_number; 91 word file_set_number; 92 } t_dsp_combifile_directory_entry; 93 94 typedef struct tag_dsp_file_header 95 { 96 char format_identification[DSP_FILE_FORMAT_IDENTIFICATION_SIZE]; 97 word format_version_bcd; 98 word download_id; 99 word download_flags; 100 word required_processing_power; 101 word interface_channel_count; 102 word header_size; 103 word download_description_size; 104 word memory_block_table_size; 105 word memory_block_count; 106 word segment_table_size; 107 word segment_count; 108 word symbol_table_size; 109 word symbol_count; 110 word total_data_size_dm; 111 word data_block_count_dm; 112 word total_data_size_pm; 113 word data_block_count_pm; 114 } t_dsp_file_header; 115 116 typedef struct tag_dsp_memory_block_desc 117 { 118 word alias_memory_block; 119 word memory_type; 120 word address; 121 word size; /* DSP words */ 122 } t_dsp_memory_block_desc; 123 124 typedef struct tag_dsp_segment_desc 125 { 126 word memory_block; 127 word attributes; 128 word base; 129 word size; 130 word alignment; /* ==0 -> no other legal start address than base */ 131 } t_dsp_segment_desc; 132 133 typedef struct tag_dsp_symbol_desc 134 { 135 word symbol_id; 136 word segment; 137 word offset; 138 word size; /* DSP words */ 139 } t_dsp_symbol_desc; 140 141 typedef struct tag_dsp_data_block_header 142 { 143 word attributes; 144 word segment; 145 word offset; 146 word size; /* DSP words */ 147 } t_dsp_data_block_header; 148 149 typedef struct tag_dsp_download_desc /* be sure to keep native alignment for MAESTRA's */ 150 { 151 word download_id; 152 word download_flags; 153 word required_processing_power; 154 word interface_channel_count; 155 word excess_header_size; 156 word memory_block_count; 157 word segment_count; 158 word symbol_count; 159 word data_block_count_dm; 160 word data_block_count_pm; 161 byte *p_excess_header_data; 162 char *p_download_description; 163 t_dsp_memory_block_desc *p_memory_block_table; 164 t_dsp_segment_desc *p_segment_table; 165 t_dsp_symbol_desc *p_symbol_table; 166 word *p_data_blocks_dm; 167 word *p_data_blocks_pm; 168 } t_dsp_download_desc; 169 170 #define DSP_DOWNLOAD_INDEX_KERNEL 0 171 #define DSP30TX_DOWNLOAD_INDEX_KERNEL 1 172 #define DSP30RX_DOWNLOAD_INDEX_KERNEL 2 173 #define DSP_MAX_DOWNLOAD_COUNT 35 174 175 176 #define DSP_DOWNLOAD_MAX_SEGMENTS 16 177 178 #define DSP_UDATA_REQUEST_RECONFIGURE 0 179 /* 180 parameters: 181 <word> reconfigure delay (in 8kHz samples) 182 <word> reconfigure code 183 <byte> reconfigure hdlc preamble flags 184 */ 185 186 #define DSP_RECONFIGURE_TX_FLAG 0x8000 187 #define DSP_RECONFIGURE_SHORT_TRAIN_FLAG 0x4000 188 #define DSP_RECONFIGURE_ECHO_PROTECT_FLAG 0x2000 189 #define DSP_RECONFIGURE_HDLC_FLAG 0x1000 190 #define DSP_RECONFIGURE_SYNC_FLAG 0x0800 191 #define DSP_RECONFIGURE_PROTOCOL_MASK 0x00ff 192 #define DSP_RECONFIGURE_IDLE 0 193 #define DSP_RECONFIGURE_V25 1 194 #define DSP_RECONFIGURE_V21_CH2 2 195 #define DSP_RECONFIGURE_V27_2400 3 196 #define DSP_RECONFIGURE_V27_4800 4 197 #define DSP_RECONFIGURE_V29_7200 5 198 #define DSP_RECONFIGURE_V29_9600 6 199 #define DSP_RECONFIGURE_V33_12000 7 200 #define DSP_RECONFIGURE_V33_14400 8 201 #define DSP_RECONFIGURE_V17_7200 9 202 #define DSP_RECONFIGURE_V17_9600 10 203 #define DSP_RECONFIGURE_V17_12000 11 204 #define DSP_RECONFIGURE_V17_14400 12 205 206 /* 207 data indications if transparent framer 208 <byte> data 0 209 <byte> data 1 210 ... 211 212 data indications if HDLC framer 213 <byte> data 0 214 <byte> data 1 215 ... 216 <byte> CRC 0 217 <byte> CRC 1 218 <byte> preamble flags 219 */ 220 221 #define DSP_UDATA_INDICATION_SYNC 0 222 /* 223 returns: 224 <word> time of sync (sampled from counter at 8kHz) 225 */ 226 227 #define DSP_UDATA_INDICATION_DCD_OFF 1 228 /* 229 returns: 230 <word> time of DCD off (sampled from counter at 8kHz) 231 */ 232 233 #define DSP_UDATA_INDICATION_DCD_ON 2 234 /* 235 returns: 236 <word> time of DCD on (sampled from counter at 8kHz) 237 <byte> connected norm 238 <word> connected options 239 <dword> connected speed (bit/s) 240 */ 241 242 #define DSP_UDATA_INDICATION_CTS_OFF 3 243 /* 244 returns: 245 <word> time of CTS off (sampled from counter at 8kHz) 246 */ 247 248 #define DSP_UDATA_INDICATION_CTS_ON 4 249 /* 250 returns: 251 <word> time of CTS on (sampled from counter at 8kHz) 252 <byte> connected norm 253 <word> connected options 254 <dword> connected speed (bit/s) 255 */ 256 257 #define DSP_CONNECTED_NORM_UNSPECIFIED 0 258 #define DSP_CONNECTED_NORM_V21 1 259 #define DSP_CONNECTED_NORM_V23 2 260 #define DSP_CONNECTED_NORM_V22 3 261 #define DSP_CONNECTED_NORM_V22_BIS 4 262 #define DSP_CONNECTED_NORM_V32_BIS 5 263 #define DSP_CONNECTED_NORM_V34 6 264 #define DSP_CONNECTED_NORM_V8 7 265 #define DSP_CONNECTED_NORM_BELL_212A 8 266 #define DSP_CONNECTED_NORM_BELL_103 9 267 #define DSP_CONNECTED_NORM_V29_LEASED_LINE 10 268 #define DSP_CONNECTED_NORM_V33_LEASED_LINE 11 269 #define DSP_CONNECTED_NORM_TFAST 12 270 #define DSP_CONNECTED_NORM_V21_CH2 13 271 #define DSP_CONNECTED_NORM_V27_TER 14 272 #define DSP_CONNECTED_NORM_V29 15 273 #define DSP_CONNECTED_NORM_V33 16 274 #define DSP_CONNECTED_NORM_V17 17 275 276 #define DSP_CONNECTED_OPTION_TRELLIS 0x0001 277 278 279 /*---------------------------------------------------------------------------*/ 280 #ifdef __cplusplus 281 } 282 #endif 283 284 #endif 285 286 /*---------------------------------------------------------------------------*/ 287