Home
last modified time | relevance | path

Searched refs:DDB_INTCLR (Results 1 – 3 of 3) sorted by relevance

/linux-2.4.37.9/arch/mips/ddb5xxx/ddb5476/
Dnile4_pic.c140 ddb_out32(DDB_INTCLR, 1 << nile4_irq); in nile4_clear_irq()
145 ddb_out32(DDB_INTCLR, mask); in nile4_clear_irq_mask()
184 "INTCLR = %p:%p\n", (void *) ddb_in32(DDB_INTCLR + 4), in nile4_dump_irq_status()
185 (void *) ddb_in32(DDB_INTCLR)); in nile4_dump_irq_status()
/linux-2.4.37.9/arch/mips/ddb5xxx/ddb5074/
Dnile4_pic.c152 ddb_out32(DDB_INTCLR, 1 << nile4_irq); in nile4_clear_irq()
157 ddb_out32(DDB_INTCLR, mask); in nile4_clear_irq_mask()
281 "INTCLR = %p:%p\n", (void *) ddb_in32(DDB_INTCLR + 4), in nile4_dump_irq_status()
282 (void *) ddb_in32(DDB_INTCLR)); in nile4_dump_irq_status()
/linux-2.4.37.9/include/asm-mips/ddb5xxx/
Dddb5xxx.h70 #define DDB_INTCLR 0x00A0 /* Interrupt Clear [R/W] */ macro