Searched refs:DCRN_DMA3_BASE (Results 1 – 5 of 5) sorted by relevance
145 #ifdef DCRN_DMA3_BASE146 #define DCRN_DMACR3 (DCRN_DMA3_BASE + 0x0) /* DMA Channel Control Register 3 */147 #define DCRN_DMACT3 (DCRN_DMA3_BASE + 0x1) /* DMA Count Register 3 */148 #define DCRN_DMADA3 (DCRN_DMA3_BASE + 0x2) /* DMA Destination Address Register 3 */149 #define DCRN_DMASA3 (DCRN_DMA3_BASE + 0x3) /* DMA Source Address Register 3 */151 #define DCRN_DMACC3 (DCRN_DMA3_BASE + 0x4) /* DMA Chained Count Register 3 */154 #define DCRN_ASG3 (DCRN_DMA3_BASE + 0x4) /* DMA Scatter/Gather Descriptor Addr 3 */
170 #define DCRN_DMA3_BASE 0x0D8 macro182 #define DCRN_DMA3_BASE 0x0D8 macro
166 #define DCRN_DMA3_BASE 0x0D8 macro178 #define DCRN_DMA3_BASE 0x0D8 macro
176 #define DCRN_DMA3_BASE 0x118 macro
158 #define DCRN_DMA3_BASE 0x118 macro313 #define DCRN_DMACR3 (DCRN_DMA3_BASE + 0x0) /* DMA Channel Control 3 */314 #define DCRN_DMACT3 (DCRN_DMA3_BASE + 0x1) /* DMA Count 3 */315 #define DCRN_DMASAH3 (DCRN_DMA3_BASE + 0x2) /* DMA Src Addr High 3 */316 #define DCRN_DMASA3 (DCRN_DMA3_BASE + 0x3) /* DMA Src Addr Low 3 */317 #define DCRN_DMADAH3 (DCRN_DMA3_BASE + 0x4) /* DMA Dest Addr High 3 */318 #define DCRN_DMADA3 (DCRN_DMA3_BASE + 0x5) /* DMA Dest Addr Low 3 */319 #define DCRN_ASGH3 (DCRN_DMA3_BASE + 0x6) /* DMA SG Desc Addr High 3 */320 #define DCRN_ASG3 (DCRN_DMA3_BASE + 0x7) /* DMA SG Desc Addr Low 3 */