Searched refs:DCRN_DMA1_BASE (Results 1 – 5 of 5) sorted by relevance
114 #ifdef DCRN_DMA1_BASE116 #define DCRN_DMACR1 (DCRN_DMA1_BASE + 0x0)117 #define DCRN_DMACT1 (DCRN_DMA1_BASE + 0x1) /* DMA Count Register 1 */119 #define DCRN_DMADA1 (DCRN_DMA1_BASE + 0x2)121 #define DCRN_DMASA1 (DCRN_DMA1_BASE + 0x3) /* DMA Source Address Register 1 */124 #define DCRN_DMACC1 (DCRN_DMA1_BASE + 0x4)128 #define DCRN_ASG1 (DCRN_DMA1_BASE + 0x4)
168 #define DCRN_DMA1_BASE 0x0C8 macro180 #define DCRN_DMA1_BASE 0x0C8 macro
164 #define DCRN_DMA1_BASE 0x0C8 macro176 #define DCRN_DMA1_BASE 0x0C8 macro
174 #define DCRN_DMA1_BASE 0x108 macro
156 #define DCRN_DMA1_BASE 0x108 macro295 #define DCRN_DMACR1 (DCRN_DMA1_BASE + 0x0) /* DMA Channel Control 1 */296 #define DCRN_DMACT1 (DCRN_DMA1_BASE + 0x1) /* DMA Count 1 */297 #define DCRN_DMASAH1 (DCRN_DMA1_BASE + 0x2) /* DMA Src Addr High 1 */298 #define DCRN_DMASA1 (DCRN_DMA1_BASE + 0x3) /* DMA Src Addr Low 1 */299 #define DCRN_DMADAH1 (DCRN_DMA1_BASE + 0x4) /* DMA Dest Addr High 1 */300 #define DCRN_DMADA1 (DCRN_DMA1_BASE + 0x5) /* DMA Dest Addr Low 1 */301 #define DCRN_ASGH1 (DCRN_DMA1_BASE + 0x6) /* DMA SG Desc Addr High 1 */302 #define DCRN_ASG1 (DCRN_DMA1_BASE + 0x7) /* DMA SG Desc Addr Low 1 */