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Searched refs:DCRN_CHCR_BASE (Results 1 – 3 of 3) sorted by relevance

/linux-2.4.37.9/arch/ppc/platforms/
Dibm405.h67 #ifdef DCRN_CHCR_BASE
68 #define DCRN_CHCR0 (DCRN_CHCR_BASE + 0x0) /* Chip Control Register 1 */
69 #define DCRN_CHCR1 (DCRN_CHCR_BASE + 0x1) /* Chip Control Register 2 */
Dcpci405.c78 uart_div = ((mfdcr(DCRN_CHCR_BASE) & CHR0_UDIV) >> 1) + 1; in cpci405_early_serial_map()
Dibm405gp.h130 #define DCRN_CHCR_BASE 0x0B1 macro