Searched refs:CSR0_CERR (Results 1 – 8 of 8) sorted by relevance
35 #define CSR0_CERR 0x2000 /* Collision Error (RC) */ macro
21 #define CSR0_CERR 0x2000 /* Collision Error (RC) */ macro
44 #define CSR0_CERR 0x2000 macro
88 #define CSR0_CERR 0x2000 /* collision error */ macro
231 #define CSR0_CERR 0x2000 /* carrier error (no heartbeat :-) (RC) */ macro654 DREG = CSR0_BABL | CSR0_MERR | CSR0_CERR | CSR0_MISS; in lance_interrupt()
331 #define CSR0_CERR 0x2000 /* carrier error (no heartbeat :-) (RC) */ macro962 DREG = CSR0_BABL | CSR0_CERR | CSR0_MISS | CSR0_MERR | in lance_interrupt()
319 #define CSR0_CERR 0x2000 /* carrier error (no heartbeat :-) (RC) */ macro1086 DREG = CSR0_BABL | CSR0_CERR | CSR0_MISS | CSR0_MERR |
199 …write_rreg (dev->base_addr, CSR0, CSR0_BABL|CSR0_CERR|CSR0_MISS|CSR0_MERR|CSR0_TINT|CSR0_RINT|CSR0… in am79c961_init_for_open()