Searched refs:CLOCK_CNTL_INDEX (Results 1 – 4 of 4) sorted by relevance
12 #define CLOCK_CNTL_INDEX 0x0008 macro
531 aty_st_8(CLOCK_CNTL_INDEX, pll_index & 0x3F); in _aty_ld_pll()540 aty_st_8(CLOCK_CNTL_INDEX, (pll_index & 0x3F) | PLL_WR_EN); in _aty_st_pll()675 clock_cntl_index = aty_ld_le32(CLOCK_CNTL_INDEX); in aty128_reset_engine()687 aty_st_le32(CLOCK_CNTL_INDEX, clock_cntl_index); in aty128_reset_engine()1109 aty_st_le32(CLOCK_CNTL_INDEX, aty_ld_le32(CLOCK_CNTL_INDEX) | (3 << 8)); in aty128_set_pll()
580 OUTREG8(CLOCK_CNTL_INDEX, (addr & 0x0000003f) | 0x00000080); \603 OUTREG8(CLOCK_CNTL_INDEX, addr & 0x0000003f); in _INPLL()755 clock_cntl_index = INREG(CLOCK_CNTL_INDEX); in _radeon_engine_reset()808 OUTREG(CLOCK_CNTL_INDEX, clock_cntl_index); in _radeon_engine_reset()3340 while ((INREG(CLOCK_CNTL_INDEX) & PPLL_DIV_SEL_MASK) != in radeon_write_pll_regs()3342 OUTREGP(CLOCK_CNTL_INDEX, PPLL_DIV_SEL_MASK, 0xffff); in radeon_write_pll_regs()
294 #define CLOCK_CNTL_INDEX 0x0008 macro