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Searched refs:CISREG_COR (Results 1 – 6 of 6) sorted by relevance

/linux-2.4.37.9/include/pcmcia/
Dcisreg.h36 #define CISREG_COR 0x00 macro
/linux-2.4.37.9/drivers/net/pcmcia/
Dsmc91c92_cs.c524 tmp = readb(smc->base + link->conf.ConfigBase + CISREG_COR); in mhz_3288_power()
526 writeb(tmp, smc->base + link->conf.ConfigBase + CISREG_COR); in mhz_3288_power()
656 writeb(MOT_NORMAL, smc->base + MOT_UART + CISREG_COR); in mot_config()
661 writeb(MOT_NORMAL, smc->base + MOT_LAN + CISREG_COR); in mot_config()
1682 cor = readb(smc->base + MOT_UART + CISREG_COR); in smc_interrupt()
1683 writeb(cor & ~COR_IREQ_ENA, smc->base + MOT_UART + CISREG_COR); in smc_interrupt()
1684 writeb(cor, smc->base + MOT_UART + CISREG_COR); in smc_interrupt()
1685 cor = readb(smc->base + MOT_LAN + CISREG_COR); in smc_interrupt()
1686 writeb(cor & ~COR_IREQ_ENA, smc->base + MOT_LAN + CISREG_COR); in smc_interrupt()
1687 writeb(cor, smc->base + MOT_LAN + CISREG_COR); in smc_interrupt()
Dnmclan_cs.c913 reg.Offset = CISREG_COR; in nmclan_reset()
920 reg.Offset = CISREG_COR; in nmclan_reset()
Dxirc2ps_cs.c1116 writeb(0x47, local->dingo_ccr + CISREG_COR); in xirc2ps_config()
Dwavelan_cs.c3571 conf_reg_t reg = { 0, CS_READ, CISREG_COR, 0 };
/linux-2.4.37.9/drivers/pcmcia/
Dcs.c1735 write_cis_mem(s, 1, (base + CISREG_COR)>>1, 1, &c->Option); in pcmcia_request_configuration()