Home
last modified time | relevance | path

Searched refs:BIT_8 (Results 1 – 5 of 5) sorted by relevance

/linux-2.4.37.9/drivers/net/e100/
De100_phy.h87 #define MDI_MDIX_CONCT_CONFIG BIT_8 /* Sets the MDI/MDI-X connectivity configuration (test pr…
117 #define PHY_82555_POLARITY_BIT BIT_8
141 #define NSC_TX_CONG_ENABLE BIT_8 /* Enables congestion control */
De100.h182 #define BIT_8 0x0100 macro
252 #define SCB_STATUS_ACK_FCP BIT_8 /* Flow Control Pause */
390 #define RFD_DMA_OVERRUN BIT_8 /* Receive DMA Overrun */
/linux-2.4.37.9/drivers/net/sk98lin/h/
Dskgehw.h55 #define BIT_8 (1L << 8) macro
276 #define PCI_DIS_PCI_CLK BIT_8 /* Disable PCI clock driving */
290 #define PCI_PATCH_DIR_0 BIT_8
868 #define IS_XA1_B BIT_8 /* Q_XA1 End of Buffer */
891 #define IS_NO_STAT_M2 BIT_8 /* No Rx Status from MAC 2 */
996 #define GP_IO_8 BIT_8 /* IO_8 pin */
1196 #define CSR_TRANS_RST BIT_8 /* Reset Transfer SM */
1441 #define GMF_RP_STEP BIT_8 /* Read Pointer Step/Increment */
1506 #define GPC_PHYADDR_0 BIT_8 /* Bit 0 of Phy Addr */
Dxmac_ii.h1093 #define PHY_M_AN_100_FD BIT_8 /* Advertise 100Base-TX Full Duplex */
1099 #define PHY_M_AN_ASP_X BIT_8 /* Asymmetric Pause */
/linux-2.4.37.9/drivers/scsi/
Dqla1280.h36 #define BIT_8 0x100 macro
167 #define ISP_FLASH_ENABLE BIT_8 /* Flash BIOS Read/Write enable */
306 #define TP_RENEGOTIATE BIT_8 /* Renegotiate on error. */
580 #define SF_GOT_BUS BIT_8 /* */