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Searched refs:BIT_1 (Results 1 – 8 of 8) sorted by relevance

/linux-2.4.37.9/drivers/net/e100/
De100_config.h50 #define CB_CFIG_TYPE_EN BIT_1 /* Type Enable */
64 #define CB_CFIG_DIRECT_DMA_DIS BIT_1 /* Direct DMA mode */
105 #define CB_CFIG_BROADCAST_DIS BIT_1 /* Broadcast Mode Disable */
118 #define CB_CFIG_PADDING BIT_1 /* Padding Disabled */
123 #define CB_DISABLE_MAGPAK_WAKE BIT_1 /* Magic Packet Wakeup disable */
144 #define CB_CFIG_VLAN_DROP_ENABLE BIT_1 /* vlan stripping */
De100_phy.h67 #define MDI_NC3133_INT_ENABLE BIT_1
116 #define PHY_82555_SPEED_BIT BIT_1
137 #define PHY_100_ER0_SPEED_INDIC BIT_1 /* 1 = 100Mbps, 0= 10Mbps */
De100.h175 #define BIT_1 0x0002 macro
289 #define SCB_RUC_RESUME BIT_1 /* RU Resume */
292 #define SCB_RUC_LOAD_BASE (BIT_1 | BIT_2) /* Load the RU base */
297 #define SCB_SOFT_INT BIT_1 /* Generate a S/W interrupt */
387 #define RFD_IA_MATCH BIT_1 /* Indv Address Match Bit */
448 #define PHY_82555_LED_ON_PRE_559 (BIT_0 | BIT_1 | BIT_2) // activity LED is on for 558 and be…
719 #define IPCB_INSERTVLAN_ENABLE BIT_1
De100_phy.c505 if (readb(&bdp->scb->scb_ext.d101m_scb.scb_gen_stat) & BIT_1) in e100_find_speed_duplex()
De100_main.c1490 if (!(readb(&bdp->scb->scb_ext.d101m_scb.scb_pmdr) & BIT_1)) in e100_tco_workaround()
/linux-2.4.37.9/drivers/scsi/
Dqla1280.h29 #define BIT_1 0x2 macro
123 #define SRB_SENT BIT_1 /* Command sent to ISP */
147 #define QLA1280_QWAIT BIT_1
165 #define ISP_EN_INT BIT_1 /* ISP enable interrupts. */
172 #define PCI_INT BIT_1 /* PCI interrupt */
177 #define NV_SELECT BIT_1
567 #define RF_FULL BIT_1 /* Full */
965 #define SS_CHECK_CONDITION BIT_1
973 #define OF_ENABLE_TAG BIT_1 /* Tagged queue action enable */
Dqla1280.c1669 mr = BIT_3 | BIT_2 | BIT_1 | BIT_0; in qla12160_set_target_parameters()
2260 qla1280_mailbox_command(ha, BIT_1 | BIT_0, &mb[0]))) { in qla1280_isp_firmware()
2268 qla1280_mailbox_command(ha, BIT_1 | BIT_0, &mb[0]); in qla1280_isp_firmware()
2557 BIT_2 | BIT_1 | BIT_0, in qla1280_setup_chip()
2575 BIT_1 | BIT_0, in qla1280_setup_chip()
2608 qla1280_mailbox_command(ha, BIT_1 | BIT_0, &mb[0]))) { in qla1280_setup_chip()
2614 qla1280_mailbox_command(ha, BIT_1 | BIT_0, &mb[0]); in qla1280_setup_chip()
2670 BIT_3 | BIT_2 | BIT_1 | BIT_0, in qla1280_init_rings()
2684 BIT_3 | BIT_2 | BIT_1 | BIT_0, in qla1280_init_rings()
2888 WRT_REG_WORD(&reg->gpio_enable, (BIT_3 + BIT_2 + BIT_1 + BIT_0)); in qla1280_nvram_config()
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/linux-2.4.37.9/drivers/net/sk98lin/h/
Dskgehw.h62 #define BIT_1 (1L << 1) macro
832 #define PC_VCC_ON BIT_1 /* Switch VCC On */
877 #define IS_XA2_F BIT_1 /* Q_XA2 End of Frame */
898 #define IS_R1_PAR_ERR BIT_1 /* Queue R1 Parity Error */
1003 #define GP_IO_1 BIT_1 /* IO_1 pin */
1203 #define CSR_IRQ_CL_F BIT_1 /* Clear EOF IRQ */
1252 #define T2_STEP02 BIT_1 /* Inc AC/Dec BC by 2 */
1448 #define GMF_RST_CLR BIT_1 /* Clear GMAC FIFO Reset */
1481 #define GMC_RST_CLR BIT_1 /* Clear GMAC Reset */
1508 #define GPC_RST_CLR BIT_1 /* Clear GPHY Reset */
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