1 /* 2 * A collection of structures, addresses, and values associated with 3 * the Motorola 860T FADS board. Copied from the MBX stuff. 4 * 5 * Copyright (c) 1998 Dan Malek (dmalek@jlc.net) 6 */ 7 #ifdef __KERNEL__ 8 #ifndef __ASM_FADS_H__ 9 #define __ASM_FADS_H__ 10 11 #include <linux/config.h> 12 13 #include <asm/ppcboot.h> 14 15 /* Memory map is configured by the PROM startup. 16 * I tried to follow the FADS manual, although the startup PROM 17 * dictates this and we simply have to move some of the physical 18 * addresses for Linux. 19 */ 20 #define BCSR_ADDR ((uint)0xff010000) 21 #define BCSR_SIZE ((uint)(64 * 1024)) 22 #define BCSR0 ((uint)0xff010000) 23 #define BCSR1 ((uint)0xff010004) 24 #define BCSR2 ((uint)0xff010008) 25 #define BCSR3 ((uint)0xff01000c) 26 #define BCSR4 ((uint)0xff010010) 27 28 #define IMAP_ADDR ((uint)0xff000000) 29 #define IMAP_SIZE ((uint)(64 * 1024)) 30 31 #define PCMCIA_MEM_ADDR ((uint)0xff020000) 32 #define PCMCIA_MEM_SIZE ((uint)(64 * 1024)) 33 34 /* Bits of interest in the BCSRs. 35 */ 36 #define BCSR1_ETHEN ((uint)0x20000000) 37 #define BCSR1_RS232EN_1 ((uint)0x01000000) 38 #define BCSR1_RS232EN_2 ((uint)0x00040000) 39 #define BCSR4_ETHLOOP ((uint)0x80000000) /* EEST Loopback */ 40 #define BCSR4_EEFDX ((uint)0x40000000) /* EEST FDX enable */ 41 #define BCSR4_FETH_EN ((uint)0x08000000) /* PHY enable */ 42 #define BCSR4_FETHCFG0 ((uint)0x04000000) /* PHY autoneg mode */ 43 #define BCSR4_FETHCFG1 ((uint)0x00400000) /* PHY autoneg mode */ 44 #define BCSR4_FETHFDE ((uint)0x02000000) /* PHY FDX advertise */ 45 #define BCSR4_FETHRST ((uint)0x00200000) /* PHY Reset */ 46 47 /* Interrupt level assignments. 48 */ 49 #define FEC_INTERRUPT SIU_LEVEL1 /* FEC interrupt */ 50 #define PHY_INTERRUPT SIU_IRQ2 /* PHY link change interrupt */ 51 52 /* We don't use the 8259. 53 */ 54 #define NR_8259_INTS 0 55 56 #endif /* __ASM_FADS_H__ */ 57 #endif /* __KERNEL__ */ 58