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Searched refs:BASE (Results 1 – 25 of 40) sorted by relevance

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/linux-2.4.37.9/Documentation/video4linux/
Dradiotrack.txt106 Default: BASE <-- 0xc8 (current volume, no stereo detect,
109 Card Off: BASE <-- 0x00 (audio mute, no stereo detect,
112 Card On: BASE <-- 0x00 (see "Card Off", clears any unfinished business)
113 BASE <-- 0xc8 (see "Default")
115 Volume Down: BASE <-- 0x48 (volume down, no stereo detect,
118 BASE <-- 0xc8 (see "Default")
120 Volume Up: BASE <-- 0x88 (volume up, no stereo detect,
123 BASE <-- 0xc8 (see "Default")
125 Check Stereo: BASE <-- 0xd8 (current volume, stereo detect,
128 x <-- BASE (read ioport)
[all …]
/linux-2.4.37.9/net/sctp/
Dadler32.c71 #define BASE 65521 /* largest prime smaller than 65536 */ macro
101 if (s1 >= BASE) in update_adler32()
102 s1 -= BASE; in update_adler32()
117 if (s2 >= BASE) { in update_adler32()
119 s2 -= BASE; in update_adler32()
/linux-2.4.37.9/drivers/i2c/
Di2c-velleman.c51 #define BASE (unsigned int)(data) macro
52 #define DATA BASE /* Centronics data port */
53 #define STAT (BASE+1) /* Centronics status port */
54 #define CTRL (BASE+2) /* Centronics control port */
Di2c-elv.c48 #define BASE (unsigned int)(data) macro
49 #define DATA BASE /* Centronics data port */
50 #define STAT (BASE+1) /* Centronics status port */
51 #define CTRL (BASE+2) /* Centronics control port */
/linux-2.4.37.9/arch/mips/momentum/ocelot_c/
Ddbg_io.c41 #define BASE OCELOT_SERIAL1_BASE macro
68 #define UART16550_READ(y) (*((volatile uint8*)(BASE + y)))
69 #define UART16550_WRITE(y, z) ((*((volatile uint8*)(BASE + y))) = z)
/linux-2.4.37.9/arch/mips/ddb5xxx/ddb5476/
Ddbg_io.c17 #define BASE 0xa60002f8 macro
81 #define UART16550_READ(y) (*((volatile uint8*)(BASE + y)))
82 #define UART16550_WRITE(y, z) ((*((volatile uint8*)(BASE + y))) = z)
/linux-2.4.37.9/arch/mips/ddb5xxx/ddb5477/
Dkgdb_io.c17 #define BASE 0xbfa04240 macro
81 #define UART16550_READ(y) (*((volatile uint8*)(BASE + y)))
82 #define UART16550_WRITE(y, z) ((*((volatile uint8*)(BASE + y))) = z)
/linux-2.4.37.9/arch/mips/gt64120/momenco_ocelot/
Ddbg_io.c41 #define BASE OCELOT_SERIAL1_BASE macro
68 #define UART16550_READ(y) (*((volatile uint8*)(BASE + y)))
69 #define UART16550_WRITE(y, z) ((*((volatile uint8*)(BASE + y))) = z)
/linux-2.4.37.9/arch/mips/momentum/jaguar_atx/
Ddbg_io.c41 #define BASE OCELOT_SERIAL1_BASE macro
68 #define UART16550_READ(y) (*((volatile uint8*)(BASE + y)))
69 #define UART16550_WRITE(y, z) ((*((volatile uint8*)(BASE + y))) = z)
/linux-2.4.37.9/arch/mips/momentum/ocelot_g/
Ddbg_io.c41 #define BASE OCELOT_SERIAL1_BASE macro
68 #define UART16550_READ(y) (*((volatile uint8*)(BASE + y)))
69 #define UART16550_WRITE(y, z) ((*((volatile uint8*)(BASE + y))) = z)
/linux-2.4.37.9/arch/mips/pmc-sierra/stretch/
Ddbg_io.c76 #define BASE PMC_STRETCH_SERIAL1_BASE macro
106 #define UART16550_READ(y) (*((volatile uint8*)(BASE + y)))
107 #define UART16550_WRITE(y, z) ((*((volatile uint8*)(BASE + y))) = z)
/linux-2.4.37.9/arch/mips/vr4181/osprey/
Ddbg_io.c17 #define BASE 0xb7fffff0 macro
81 #define UART16550_READ(y) (*((volatile uint8*)(BASE + y)))
82 #define UART16550_WRITE(y, z) ((*((volatile uint8*)(BASE + y))) = z)
/linux-2.4.37.9/include/linux/
Dzutil.h73 #define BASE 65521L /* largest prime smaller than 65536 */ macro
120 s1 %= BASE; in zlib_adler32()
121 s2 %= BASE; in zlib_adler32()
/linux-2.4.37.9/include/asm-arm/arch-cl7500/
Duncompress.h7 #define BASE 0x03010000 macro
8 #define SERBASE (BASE + (0x2f8 << 2))
/linux-2.4.37.9/fs/xfs/
Dxfs_da_btree.h265 #define XFS_DA_LOGOFF(BASE, ADDR) ((char *)(ADDR) - (char *)(BASE)) argument
266 #define XFS_DA_LOGRANGE(BASE, ADDR, SIZE) \ argument
267 (uint)(XFS_DA_LOGOFF(BASE, ADDR)), \
268 (uint)(XFS_DA_LOGOFF(BASE, ADDR)+(SIZE)-1)
/linux-2.4.37.9/Documentation/sound/
DCMI833092 (IO 0 (SIZE 8) (BASE 0x0530))
93 (IO 1 (SIZE 8) (BASE 0x0388))
103 (IO 0 (SIZE 2) (BASE 0x0330))
112 (IO 0 (SIZE 8) (BASE 0x0200))
120 (IO 0 (SIZE 16) (BASE 0x0220))
DESS186824 (IO 0 (BASE 0x0220))
25 (IO 1 (BASE 0x0388))
26 (IO 2 (BASE 0x0330))
DVIBRA1641 (IO 0 (SIZE 16) (BASE 0x0220))
42 (IO 2 (SIZE 4) (BASE 0x0388))
50 (IO 0 (SIZE 1) (BASE 0x0200))
DINSTALL.awe91 (IO 0 (BASE 0x0620))
92 (IO 1 (BASE 0x0A20))
93 (IO 2 (BASE 0x0E20))
DOPL3-SA2135 (IO 0 (BASE 0x0220))
136 (IO 1 (BASE 0x0530))
137 (IO 2 (BASE 0x0388))
138 (IO 3 (BASE 0x0330))
139 (IO 4 (BASE 0x0370))
/linux-2.4.37.9/include/asm-mips64/mips-boards/
Dbonito64.h413 #define BONITO_PCIMEMBASECFGBASE(WIN,BASE) (((BASE)>>(BONITO_PCIMEMBASECFG_ASHIFT-BONITO_PCIMEMBASE… argument
/linux-2.4.37.9/include/asm-mips/mips-boards/
Dbonito64.h413 #define BONITO_PCIMEMBASECFGBASE(WIN,BASE) (((BASE)>>(BONITO_PCIMEMBASECFG_ASHIFT-BONITO_PCIMEMBASE… argument
/linux-2.4.37.9/drivers/net/
Dsmc9194.h99 #define BASE 2 macro
/linux-2.4.37.9/arch/mips/kernel/
Dtraps.c407 #define BASE 0x03e00000 macro
437 vaddr = (unsigned long *)((long)(regs->regs[(opcode & BASE) >> 21]) + offset); in simulate_ll()
480 vaddr = (unsigned long *)((long)(regs->regs[(opcode & BASE) >> 21]) + offset); in simulate_sc()
/linux-2.4.37.9/arch/mips64/kernel/
Dtraps.c417 #define BASE 0x03e00000 macro
447 vaddr = (unsigned long *)((long)(regs->regs[(opcode & BASE) >> 21]) + offset); in simulate_ll()
490 vaddr = (unsigned long *)((long)(regs->regs[(opcode & BASE) >> 21]) + offset); in simulate_sc()

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