Searched refs:B4_R1_CSR (Results 1 – 2 of 2) sorted by relevance
791 outpd(ADDR(B4_R1_CSR),CSR_IRQ_CL_P) ;796 outpd(ADDR(B4_R1_CSR),CSR_IRQ_CL_C) ;833 outpd(ADDR(B4_R1_CSR),CSR_IRQ_CL_F) ;840 outpd(ADDR(B4_R1_CSR),CSR_IRQ_CL_F) ;
1172 #define B4_R1_CSR 0x021c /* 32 bit BMU Control/Status Register */ macro