1 // ---------------------------------------------------------------------------- 2 // ATMEL Microcontroller Software Support - ROUSSET - 3 // ---------------------------------------------------------------------------- 4 // The software is delivered "AS IS" without warranty or condition of any 5 // kind, either express, implied or statutory. This includes without 6 // limitation any warranty or condition with respect to merchantability or 7 // fitness for any particular purpose, or against the infringements of 8 // intellectual property rights of others. 9 // ---------------------------------------------------------------------------- 10 // File Name : AT91RM9200.h 11 // Object : AT91RM9200 / UDP Device definitions 12 // Generated : AT91 SW Application Group 12/03/2002 (10:48:02) 13 // 14 // ---------------------------------------------------------------------------- 15 16 #ifndef AT91RM9200_UDP_H 17 #define AT91RM9200_UDP_H 18 19 // ***************************************************************************** 20 // SOFTWARE API DEFINITION FOR USB Device Interface 21 // ***************************************************************************** 22 #ifndef __ASSEMBLY__ 23 24 typedef struct _AT91S_UDP { 25 AT91_REG UDP_NUM; // Frame Number Register 26 AT91_REG UDP_GLBSTATE; // Global State Register 27 AT91_REG UDP_FADDR; // Function Address Register 28 AT91_REG Reserved0[1]; // 29 AT91_REG UDP_IER; // Interrupt Enable Register 30 AT91_REG UDP_IDR; // Interrupt Disable Register 31 AT91_REG UDP_IMR; // Interrupt Mask Register 32 AT91_REG UDP_ISR; // Interrupt Status Register 33 AT91_REG UDP_ICR; // Interrupt Clear Register 34 AT91_REG Reserved1[1]; // 35 AT91_REG UDP_RSTEP; // Reset Endpoint Register 36 AT91_REG Reserved2[1]; // 37 AT91_REG UDP_CSR[8]; // Endpoint Control and Status Register 38 AT91_REG UDP_FDR[8]; // Endpoint FIFO Data Register 39 } AT91S_UDP, *AT91PS_UDP; 40 41 #endif 42 43 // -------- UDP_FRM_NUM : (UDP Offset: 0x0) USB Frame Number Register -------- 44 #define AT91C_UDP_FRM_NUM ( 0x7FF << 0) // (UDP) Frame Number as Defined in the Packet Field Formats 45 #define AT91C_UDP_FRM_ERR ( 0x1 << 16) // (UDP) Frame Error 46 #define AT91C_UDP_FRM_OK ( 0x1 << 17) // (UDP) Frame OK 47 // -------- UDP_GLB_STATE : (UDP Offset: 0x4) USB Global State Register -------- 48 #define AT91C_UDP_FADDEN ( 0x1 << 0) // (UDP) Function Address Enable 49 #define AT91C_UDP_CONFG ( 0x1 << 1) // (UDP) Configured 50 #define AT91C_UDP_RMWUPE ( 0x1 << 2) // (UDP) Remote Wake Up Enable 51 #define AT91C_UDP_RSMINPR ( 0x1 << 3) // (UDP) A Resume Has Been Sent to the Host 52 // -------- UDP_FADDR : (UDP Offset: 0x8) USB Function Address Register -------- 53 #define AT91C_UDP_FADD ( 0xFF << 0) // (UDP) Function Address Value 54 #define AT91C_UDP_FEN ( 0x1 << 8) // (UDP) Function Enable 55 // -------- UDP_IER : (UDP Offset: 0x10) USB Interrupt Enable Register -------- 56 #define AT91C_UDP_EPINT0 ( 0x1 << 0) // (UDP) Endpoint 0 Interrupt 57 #define AT91C_UDP_EPINT1 ( 0x1 << 1) // (UDP) Endpoint 0 Interrupt 58 #define AT91C_UDP_EPINT2 ( 0x1 << 2) // (UDP) Endpoint 2 Interrupt 59 #define AT91C_UDP_EPINT3 ( 0x1 << 3) // (UDP) Endpoint 3 Interrupt 60 #define AT91C_UDP_EPINT4 ( 0x1 << 4) // (UDP) Endpoint 4 Interrupt 61 #define AT91C_UDP_EPINT5 ( 0x1 << 5) // (UDP) Endpoint 5 Interrupt 62 #define AT91C_UDP_EPINT6 ( 0x1 << 6) // (UDP) Endpoint 6 Interrupt 63 #define AT91C_UDP_EPINT7 ( 0x1 << 7) // (UDP) Endpoint 7 Interrupt 64 #define AT91C_UDP_RXSUSP ( 0x1 << 8) // (UDP) USB Suspend Interrupt 65 #define AT91C_UDP_RXRSM ( 0x1 << 9) // (UDP) USB Resume Interrupt 66 #define AT91C_UDP_EXTRSM ( 0x1 << 10) // (UDP) USB External Resume Interrupt 67 #define AT91C_UDP_SOFINT ( 0x1 << 11) // (UDP) USB Start Of frame Interrupt 68 #define AT91C_UDP_WAKEUP ( 0x1 << 13) // (UDP) USB Resume Interrupt 69 // -------- UDP_IDR : (UDP Offset: 0x14) USB Interrupt Disable Register -------- 70 // -------- UDP_IMR : (UDP Offset: 0x18) USB Interrupt Mask Register -------- 71 // -------- UDP_ISR : (UDP Offset: 0x1c) USB Interrupt Status Register -------- 72 #define AT91C_UDP_ENDBUSRES ( 0x1 << 12) // (UDP) USB End Of Bus Reset Interrupt 73 // -------- UDP_ICR : (UDP Offset: 0x20) USB Interrupt Clear Register -------- 74 // -------- UDP_RST_EP : (UDP Offset: 0x28) USB Reset Endpoint Register -------- 75 #define AT91C_UDP_EP0 ( 0x1 << 0) // (UDP) Reset Endpoint 0 76 #define AT91C_UDP_EP1 ( 0x1 << 1) // (UDP) Reset Endpoint 1 77 #define AT91C_UDP_EP2 ( 0x1 << 2) // (UDP) Reset Endpoint 2 78 #define AT91C_UDP_EP3 ( 0x1 << 3) // (UDP) Reset Endpoint 3 79 #define AT91C_UDP_EP4 ( 0x1 << 4) // (UDP) Reset Endpoint 4 80 #define AT91C_UDP_EP5 ( 0x1 << 5) // (UDP) Reset Endpoint 5 81 #define AT91C_UDP_EP6 ( 0x1 << 6) // (UDP) Reset Endpoint 6 82 #define AT91C_UDP_EP7 ( 0x1 << 7) // (UDP) Reset Endpoint 7 83 // -------- UDP_CSR : (UDP Offset: 0x30) USB Endpoint Control and Status Register -------- 84 #define AT91C_UDP_TXCOMP ( 0x1 << 0) // (UDP) Generates an IN packet with data previously written in the DPR 85 #define AT91C_UDP_RX_DATA_BK0 ( 0x1 << 1) // (UDP) Receive Data Bank 0 86 #define AT91C_UDP_RXSETUP ( 0x1 << 2) // (UDP) Sends STALL to the Host (Control endpoints) 87 #define AT91C_UDP_ISOERROR ( 0x1 << 3) // (UDP) Isochronous error (Isochronous endpoints) 88 #define AT91C_UDP_TXPKTRDY ( 0x1 << 4) // (UDP) Transmit Packet Ready 89 #define AT91C_UDP_FORCESTALL ( 0x1 << 5) // (UDP) Force Stall (used by Control, Bulk and Isochronous endpoints). 90 #define AT91C_UDP_RX_DATA_BK1 ( 0x1 << 6) // (UDP) Receive Data Bank 1 (only used by endpoints with ping-pong attributes). 91 #define AT91C_UDP_DIR ( 0x1 << 7) // (UDP) Transfer Direction 92 #define AT91C_UDP_EPTYPE ( 0x7 << 8) // (UDP) Endpoint type 93 #define AT91C_UDP_EPTYPE_CTRL ( 0x0 << 8) // (UDP) Control 94 #define AT91C_UDP_EPTYPE_ISO_OUT ( 0x1 << 8) // (UDP) Isochronous OUT 95 #define AT91C_UDP_EPTYPE_BULK_OUT ( 0x2 << 8) // (UDP) Bulk OUT 96 #define AT91C_UDP_EPTYPE_INT_OUT ( 0x3 << 8) // (UDP) Interrupt OUT 97 #define AT91C_UDP_EPTYPE_ISO_IN ( 0x5 << 8) // (UDP) Isochronous IN 98 #define AT91C_UDP_EPTYPE_BULK_IN ( 0x6 << 8) // (UDP) Bulk IN 99 #define AT91C_UDP_EPTYPE_INT_IN ( 0x7 << 8) // (UDP) Interrupt IN 100 #define AT91C_UDP_DTGLE ( 0x1 << 11) // (UDP) Data Toggle 101 #define AT91C_UDP_EPEDS ( 0x1 << 15) // (UDP) Endpoint Enable Disable 102 #define AT91C_UDP_RXBYTECNT ( 0x7FF << 16) // (UDP) Number Of Bytes Available in the FIFO 103 104 #endif 105