Searched refs:ARMCSR_BASE (Results 1 – 6 of 6) sorted by relevance
| /linux-2.4.37.9/include/asm-arm/arch-ebsa285/ |
| D | hardware.h | 37 #define ARMCSR_BASE 0xfe000000 macro
71 #define ARMCSR_BASE 0x7cf00000 macro
98 #define UNCACHEABLE_ADDR (ARMCSR_BASE + 0x108)
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| /linux-2.4.37.9/arch/arm/mach-footbridge/ |
| D | mm.c | 31 { ARMCSR_BASE, DC21285_ARMCSR_BASE, ARMCSR_SIZE, DOMAIN_IO, 0, 1, 0, 0 },
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| /linux-2.4.37.9/include/asm-arm/hardware/ |
| D | dec21285.h | 24 #define DC21285_IO(x) ((volatile unsigned long *)(ARMCSR_BASE+(x)))
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| /linux-2.4.37.9/arch/arm/kernel/ |
| D | debug-armv.S | 133 .equ dc21285_high, ARMCSR_BASE & 0xff000000
134 .equ dc21285_low, ARMCSR_BASE & 0x00ffffff
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| D | dec21285.c | 48 addr = ARMCSR_BASE; in dc21285_base_address()
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| D | entry-armv.S | 220 .equ dc21285_high, ARMCSR_BASE & 0xff000000
221 .equ dc21285_low, ARMCSR_BASE & 0x00ffffff
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