/glibc-2.36/sysdeps/ia64/ |
D | memcpy.S | 62 #define tmp4 r25 macro 129 (p[MEMLAT+1]) st8 [dest] = tmp4, 8 ; \ 130 (p[MEMLAT]) shrp tmp4 = s[MEMLAT], r[MEMLAT], shift ; \ 151 (p[MEMLAT+1]) st8 [dest] = tmp4, 8 ; \ 152 (p[MEMLAT]) shrp tmp4 = s[MEMLAT], r[MEMLAT], shift ; \ 172 and tmp4 = 7, in0 // check if destination is aligned 194 cmp.eq p_scr, p0 = tmp4, r0 // is destination aligned? 195 sub loopcnt = 7, tmp4 // 218 and tmp4 = 7, src // ready for alignment check 222 cmp.ne p_scr, p0 = tmp4, r0 // is source also aligned [all …]
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D | memmove.S | 49 #define tmp4 r25 macro 96 and tmp4 = 7, tmp3 // tmp4 = (dest | src | len) & 7 105 cmp.ne p6, p0 = tmp4, r0 // if ((dest | src | len) & 7 != 0) 157 addl tmp4 = @ltoff(.table), gp 167 ld8 ptable = [tmp4];; // ptable = &table 170 ld8 tmp4 = [tmp3];; // tmp4 = loop offset 171 sub loopaddr = ploop56,tmp4 // loopadd = &loop56 - loop offset 215 cmp.ne p6, p0 = tmp4, r0 // if ((dest | src | len) & 7 != 0)
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/glibc-2.36/sysdeps/sparc/sparc32/sparcv9/ |
D | mul_1.S | 31 #define tmp4 %o4 macro 45 mulx tmp2, s2_limb, tmp4 51 add carry, tmp4, tmp4 52 stw tmp4, [res_ptr - 0x04] 54 srlx tmp4, 32, carry
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D | addmul_1.S | 33 #define tmp4 %l3 macro 49 lduw [res_ptr + 0x04], tmp4 59 add tmp4, tmp64_2, tmp64_2
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D | submul_1.S | 33 #define tmp4 %l3 macro 49 lduw [res_ptr + 0x04], tmp4 61 subcc tmp4, tmp64_2, tmp64_2
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/glibc-2.36/sysdeps/sparc/sparc64/multiarch/ |
D | mul_1-vis3.S | 31 #define tmp4 %o4 macro 42 ldx [s1_ptr + 0x08], tmp4 47 mulx tmp4, s2_limb, tmp1 49 umulxhi tmp4, s2_limb, tmp4 54 addxc %g0, tmp4, carry
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D | add_n-vis3.S | 30 #define tmp4 %o4 macro 46 ldx [s1_ptr - 0x08], tmp4 50 addxccc tmp3, tmp4, tmp3
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D | sub_n-vis3.S | 30 #define tmp4 %o4 macro 46 ldx [s1_ptr - 0x08], tmp4 52 addxccc tmp3, tmp4, tmp3
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D | addmul_1-vis3.S | 31 #define tmp4 %o4 macro 49 ldx [res_ptr + 0x08], tmp4 64 addcc tmp4, tmp7, tmp7
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D | submul_1-vis3.S | 31 #define tmp4 %o4 macro 49 ldx [res_ptr + 0x08], tmp4 64 subcc tmp4, tmp7, tmp7
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/glibc-2.36/sysdeps/aarch64/multiarch/ |
D | strlen_asimd.S | 39 #define tmp4 x7 macro 110 orr tmp4, data2, REP8_7f 112 bic has_nul2, tmp3, tmp4 137 orr tmp4, data2, REP8_7f 139 bic has_nul2, tmp3, tmp4
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D | memchr_nosimd.S | 45 #define tmp4 x5 macro 165 orr tmp4, data2, REP8_7f 168 bic has_chr2, tmp2, tmp4
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/glibc-2.36/stdlib/ |
D | longlong.h | 1427 UDItype tmp1, tmp2, tmp3, tmp4; \ 1452 "=&r" (tmp1), "=&r" (tmp2), "=&r" (tmp3), "=&r" (tmp4) \
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