| /glibc-2.36/sysdeps/powerpc/powerpc64/power8/ |
| D | memcmp.S | 35 #define rN r5 /* Max string length. */ macro
76 cmpldi cr6, rN, 0
77 cmpldi cr1, rN, 8
116 subf rN, r10, rN
126 cmpldi cr6, rN, 8
128 addi rN, rN, -8
133 srdi. r6, rN, 6
165 clrldi rN, rN, 58
170 cmpdi cr6, rN, 0
177 addi rN, rN, -16
[all …]
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| /glibc-2.36/sysdeps/powerpc/powerpc64/power7/ |
| D | memcmp.S | 34 #define rN r5 /* max string length */ macro
75 cmpldi cr6, rN, 0
76 cmpldi cr1, rN, 12
124 add rN, rN, r12
126 srdi r0, rN, 5 /* Divide by 32 */
127 andi. r12, rN, 24 /* Get the DW remainder */
131 cmpldi cr7, rN, 32
132 clrldi rN, rN, 61
182 andi. r12, rN, 24 /* Get the DW remainder */
183 srdi r0, rN, 5 /* Divide by 32 */
[all …]
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| D | strncmp.S | 39 #define rN r5 /* max string length */ macro
57 cmpldi cr1,rN,0
62 srdi. rTMP,rN,3
63 clrldi rN,rN,61
66 cmpldi cr1,rN,0
181 cmpldi cr1,rN,0
183 mtctr rN
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| /glibc-2.36/sysdeps/powerpc/powerpc32/power4/ |
| D | memcmp.S | 32 #define rN r5 /* max string length */ macro
43 cmplwi cr6, rN, 0
44 cmplwi cr1, rN, 12
80 add rN, rN, r12
82 srwi r0, rN, 4 /* Divide by 16 */
83 andi. r12, rN, 12 /* Get the word remainder */
94 cmplwi cr7, rN, 16
95 clrlwi rN, rN, 30
159 andi. r12, rN, 12 /* Get the word remainder */
160 srwi r0, rN, 4 /* Divide by 16 */
[all …]
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| D | strncmp.S | 31 #define rN r5 /* max string length */ macro
47 cmplwi cr1, rN, 0
52 srwi. rTMP, rN, 2
53 clrlwi rN, rN, 30
56 cmplwi cr1, rN, 0
149 cmplwi cr1, rN, 0
151 mtctr rN /* Power4 wants mtctr 1st in dispatch group */
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| /glibc-2.36/sysdeps/powerpc/powerpc32/power7/ |
| D | memcmp.S | 32 #define rN r5 /* max string length */ macro
43 cmplwi cr6, rN, 0
44 cmplwi cr1, rN, 12
80 add rN, rN, r12
82 srwi r0, rN, 4 /* Divide by 16 */
83 andi. r12, rN, 12 /* Get the word remainder */
94 cmplwi cr7, rN, 16
95 clrlwi rN, rN, 30
159 andi. r12, rN, 12 /* Get the word remainder */
160 srwi r0, rN, 4 /* Divide by 16 */
[all …]
|
| D | strncmp.S | 33 #define rN r5 /* max string length */ macro
51 cmplwi cr1,rN,0
56 srwi. rTMP,rN,2
57 clrlwi rN,rN,30
60 cmplwi cr1,rN,0
152 cmplwi cr1,rN,0
154 mtctr rN
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| /glibc-2.36/sysdeps/powerpc/powerpc64/power4/ |
| D | memcmp.S | 43 #define rN r5 /* max string length */ macro
54 cmpldi cr6, rN, 0
55 cmpldi cr1, rN, 12
89 add rN, rN, r12
91 srdi r0, rN, 5 /* Divide by 32 */
92 andi. r12, rN, 24 /* Get the DW remainder */
103 cmpldi cr7, rN, 32
104 clrldi rN, rN, 61
168 andi. r12, rN, 24 /* Get the DW remainder */
169 srdi r0, rN, 5 /* Divide by 32 */
[all …]
|
| D | strncmp.S | 36 #define rN r5 /* max string length */ macro
52 cmpldi cr1, rN, 0
57 srdi. rTMP, rN, 3
58 clrldi rN, rN, 61
61 cmpldi cr1, rN, 0
178 cmpldi cr1, rN, 0
180 mtctr rN /* Power4 wants mtctr 1st in dispatch group */
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| /glibc-2.36/sysdeps/powerpc/powerpc32/ |
| D | strncmp.S | 31 #define rN r5 /* max string length */ macro
45 cmplwi cr1, rN, 0
50 srwi. rTMP, rN, 2
51 clrlwi rN, rN, 30
54 cmplwi cr1, rN, 0
147 cmplwi cr1, rN, 0
149 mtctr rN /* Power4 wants mtctr 1st in dispatch group */
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| /glibc-2.36/sysdeps/powerpc/powerpc64/ |
| D | strncmp.S | 36 #define rN r5 /* max string length */ macro
50 cmpldi cr1, rN, 0
55 srdi. rTMP, rN, 3
56 clrldi rN, rN, 61
59 cmpldi cr1, rN, 0
176 cmpldi cr1, rN, 0
178 mtctr rN /* Power4 wants mtctr 1st in dispatch group */
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| /glibc-2.36/sysdeps/ia64/fpu/ |
| D | s_expm1f.S | 149 rN = r27 define
433 addl rN = 0xffff-63, rNJ // biased and shifted n
443 shr rN = rN, 6 // biased n
455 shl rN = rN , 52 // 2^n bits in DP format
460 or rN = rN, rJ // bits of 2^n * 2^(j/64) in DP format
467 setf.d fT = rN // 2^n
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| D | e_expf.S | 134 rN = r24 define
392 addl rN = 0xFFFF - 63, rNJ // biased and shifted n
401 shr rN = rN, 6 // biased n
408 shl rN = rN, 52 // 2^n bits in DP format
413 or rN = rN, rJ // bits of 2^n * 2^(j/64) in DP format
420 setf.d fT = rN // 2^n * 2^(j/64)
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| D | e_coshf.S | 144 rN = r24 define
406 addl rN = 0xFFBF - 63, rNJ // biased and shifted n-1,j
420 and rN = rN_mask, rN // biased, shifted n-1
432 shl rN = rN, 46 // 2^(n-1) bits in DP format
449 or rN = rN, rJ // bits of 2^n * 2^(j/64) in DP format
456 setf.d fT = rN // 2^(n-1) * 2^(j/64)
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| D | e_sinhf.S | 148 rN = r24 define
411 addl rN = 0xFFBF - 63, rNJ // biased and shifted n-1,j
425 and rN = rN_mask, rN // biased, shifted n-1
437 shl rN = rN, 46 // 2^(n-1) bits in DP format
454 or rN = rN, rJ // bits of 2^n * 2^(j/64) in DP format
461 setf.d fT = rN // 2^(n-1) * 2^(j/64)
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| D | e_cosh.S | 128 rN = r18 define
464 getf.sig rN = fW_2TO56_RSH
478 and rIndex_1 = 0x0f, rN
480 shr rM = rN, 0x7
483 and rIndex_2_16 = 0x70, rN
485 sub rN_neg = r0, rN
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| D | e_sinh.S | 133 rN = r18 define
470 getf.sig rN = fW_2TO56_RSH
484 and rIndex_1 = 0x0f, rN
486 shr rM = rN, 0x7
489 and rIndex_2_16 = 0x70, rN
491 sub rN_neg = r0, rN
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| D | e_exp.S | 127 rN = r18 define
416 getf.sig rN = fW_2TO56_RSH
431 and rIndex_1 = 0x0f, rN
433 shr rM = rN, 0x7
436 and rIndex_2_16 = 0x70, rN
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| D | s_expm1.S | 137 rN = r18 define
526 getf.sig rN = fW_2TO56_RSH
540 and rIndex_1 = 0x0f, rN
542 shr rM = rN, 0x7
545 and rIndex_2_16 = 0x70, rN
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| D | e_atanh.S | 168 rN = r25 define
764 sub rN = rExpb, rBias // exponent
770 setf.sig fN4Cvt = rN
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| /glibc-2.36/ChangeLog.old/ |
| D | ChangeLog.18 | 62981 Formatting. Consistently use rXXX register defines or rN defines.
62984 regs used as shift registers for unaligned loop, using rN defines
|